2 * This file contains the power_save function for Power7 CPUs.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
10 #include <linux/threads.h>
11 #include <asm/processor.h>
13 #include <asm/cputable.h>
14 #include <asm/thread_info.h>
15 #include <asm/ppc_asm.h>
16 #include <asm/asm-offsets.h>
17 #include <asm/ppc-opcode.h>
18 #include <asm/hw_irq.h>
19 #include <asm/kvm_book3s_asm.h>
21 #include <asm/cpuidle.h>
22 #include <asm/mmu-hash64.h>
27 * Use unused space in the interrupt stack to save and restore
28 * registers for winkle support.
40 /* Idle state entry routines */
42 #define IDLE_STATE_ENTER_SEQ(IDLE_INST) \
43 /* Magic NAP/SLEEP/WINKLE mode enter sequence */ \
55 * Pass requested state in r3:
56 * r3 - PNV_THREAD_NAP/SLEEP/WINKLE
58 * To check IRQ_HAPPENED in r4
62 _GLOBAL(power7_powersave_common)
63 /* Use r3 to pass state nap/sleep/winkle */
64 /* NAP is a state loss, we create a regs frame on the
65 * stack, fill it up with the state we care about and
66 * stick a pointer to it in PACAR1. We really only
67 * need to save PC, some CR bits and the NV GPRs,
68 * but for now an interrupt frame will do.
72 stdu r1,-INT_FRAME_SIZE(r1)
77 /* Make sure FPU, VSX etc... are flushed as we may lose
78 * state when going to nap mode
80 bl discard_lazy_cpu_state
81 #endif /* CONFIG_SMP */
83 /* Hard disable interrupts */
87 mtmsrd r9,1 /* hard-disable interrupts */
89 /* Check if something happened while soft-disabled */
90 lbz r0,PACAIRQHAPPENED(r13)
91 andi. r0,r0,~PACA_IRQ_HARD_DIS@l
95 addi r1,r1,INT_FRAME_SIZE
100 1: /* We mark irqs hard disabled as this is the state we'll
101 * be in when returning and we need to tell arch_local_irq_restore()
104 li r0,PACA_IRQ_HARD_DIS
105 stb r0,PACAIRQHAPPENED(r13)
107 /* We haven't lost state ... yet */
109 stb r0,PACA_NAPSTATELOST(r13)
111 /* Continue saving state */
120 * Go to real mode to do the nap, as required by the architecture.
121 * Also, we need to be in real mode before setting hwthread_state,
122 * because as soon as we do that, another thread can switch
123 * the MMU context to the guest.
125 LOAD_REG_IMMEDIATE(r5, MSR_IDLE)
128 LOAD_REG_ADDR(r7, power7_enter_nap_mode)
129 mtmsrd r6, 1 /* clear RI before setting SRR0/1 */
134 .globl power7_enter_nap_mode
135 power7_enter_nap_mode:
136 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
137 /* Tell KVM we're napping */
138 li r4,KVM_HWTHREAD_IN_NAP
139 stb r4,HSTATE_HWTHREAD_STATE(r13)
141 stb r3,PACA_THREAD_IDLE_STATE(r13)
142 cmpwi cr3,r3,PNV_THREAD_SLEEP
144 IDLE_STATE_ENTER_SEQ(PPC_NAP)
147 /* Sleep or winkle */
148 lbz r7,PACA_THREAD_MASK(r13)
149 ld r14,PACA_CORE_IDLE_STATE_PTR(r13)
152 andc r15,r15,r7 /* Clear thread bit */
154 andi. r15,r15,PNV_CORE_IDLE_THREAD_BITS
157 * If cr0 = 0, then current thread is the last thread of the core entering
158 * sleep. Last thread needs to execute the hardware bug workaround code if
159 * required by the platform.
160 * Make the workaround call unconditionally here. The below branch call is
161 * patched out when the idle states are discovered if the platform does not
164 .global pnv_fastsleep_workaround_at_entry
165 pnv_fastsleep_workaround_at_entry:
166 beq fastsleep_workaround_at_entry
172 common_enter: /* common code for all the threads entering sleep or winkle */
174 IDLE_STATE_ENTER_SEQ(PPC_SLEEP)
176 fastsleep_workaround_at_entry:
177 ori r15,r15,PNV_CORE_IDLE_LOCK_BIT
182 /* Fast sleep workaround */
185 li r0,OPAL_CONFIG_CPU_IDLE_STATE
186 bl opal_call_realmode
196 * Note all register i.e per-core, per-subcore or per-thread is saved
197 * here since any thread in the core might wake up first
217 IDLE_STATE_ENTER_SEQ(PPC_WINKLE)
220 /* Now check if user or arch enabled NAP mode */
221 LOAD_REG_ADDRBASE(r3,powersave_nap)
222 lwz r4,ADDROFF(powersave_nap)(r3)
231 b power7_powersave_common
234 _GLOBAL(power7_sleep)
235 li r3,PNV_THREAD_SLEEP
237 b power7_powersave_common
240 _GLOBAL(power7_winkle)
243 b power7_powersave_common
246 #define CHECK_HMI_INTERRUPT \
247 mfspr r0,SPRN_SRR1; \
248 BEGIN_FTR_SECTION_NESTED(66); \
249 rlwinm r0,r0,45-31,0xf; /* extract wake reason field (P8) */ \
250 FTR_SECTION_ELSE_NESTED(66); \
251 rlwinm r0,r0,45-31,0xe; /* P7 wake reason field is 3 bits */ \
252 ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66); \
253 cmpwi r0,0xa; /* Hypervisor maintenance ? */ \
255 /* Invoke opal call to handle hmi */ \
256 ld r2,PACATOC(r13); \
258 std r3,ORIG_GPR3(r1); /* Save original r3 */ \
259 li r0,OPAL_HANDLE_HMI; /* Pass opal token argument*/ \
260 bl opal_call_realmode; \
261 ld r3,ORIG_GPR3(r1); /* Restore original r3 */ \
265 _GLOBAL(power7_wakeup_tb_loss)
269 * Before entering any idle state, the NVGPRs are saved in the stack
270 * and they are restored before switching to the process context. Hence
271 * until they are restored, they are free to be used.
273 * Save SRR1 in a NVGPR as it might be clobbered in opal_call_realmode
274 * (called in CHECK_HMI_INTERRUPT). SRR1 is required to determine the
275 * wakeup reason if we branch to kvm_start_guest.
281 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
283 lbz r7,PACA_THREAD_MASK(r13)
284 ld r14,PACA_CORE_IDLE_STATE_PTR(r13)
287 andi. r9,r15,PNV_CORE_IDLE_LOCK_BIT
289 * Lock bit is set in one of the 2 cases-
290 * a. In the sleep/winkle enter path, the last thread is executing
291 * fastsleep workaround code.
292 * b. In the wake up path, another thread is executing fastsleep
293 * workaround undo code or resyncing timebase or restoring context
294 * In either case loop until the lock bit is cleared.
296 bne core_idle_lock_held
299 lbz r4,PACA_SUBCORE_SIBLING_MASK(r13)
301 cmpwi cr1,r4,0 /* Check if first in subcore */
305 * cr1 - 0b0100 if first thread to wakeup in subcore
306 * cr2 - 0b0100 if first thread to wakeup in core
307 * cr3- 0b0010 if waking up from sleep or winkle
308 * cr4 - 0b0100 if waking up from winkle
311 or r15,r15,r7 /* Set thread bit */
313 beq cr1,first_thread_in_subcore
315 /* Not first thread in subcore to wake up */
325 andi. r9,r15,PNV_CORE_IDLE_LOCK_BIT
326 bne core_idle_lock_loop
330 first_thread_in_subcore:
331 /* First thread in subcore to wakeup */
332 ori r15,r15,PNV_CORE_IDLE_LOCK_BIT
338 * If waking up from sleep, subcore state is not lost. Hence
339 * skip subcore state restore
341 bne cr4,subcore_state_restored
343 /* Restore per-subcore state */
351 subcore_state_restored:
353 * Check if the thread is also the first thread in the core. If not,
354 * skip to clear_lock.
358 first_thread_in_core:
361 * First thread in the core waking up from fastsleep. It needs to
362 * call the fastsleep workaround code if the platform requires it.
363 * Call it unconditionally here. The below branch instruction will
364 * be patched out when the idle states are discovered if platform
365 * does not require workaround.
367 .global pnv_fastsleep_workaround_at_exit
368 pnv_fastsleep_workaround_at_exit:
369 b fastsleep_workaround_at_exit
372 /* Do timebase resync if we are waking up from sleep. Use cr3 value
373 * set in exceptions-64s.S */
375 /* Time base re-sync */
376 li r0,OPAL_RESYNC_TIMEBASE
377 bl opal_call_realmode;
378 /* TODO: Check r3 for failure */
381 * If waking up from sleep, per core state is not lost, skip to
386 /* Restore per core state */
393 andi. r15,r15,PNV_CORE_IDLE_THREAD_BITS
399 * Common to all threads.
401 * If waking up from sleep, hypervisor state is not lost. Hence
402 * skip hypervisor state restore.
404 bne cr4,hypervisor_state_restored
406 /* Waking up from winkle */
408 /* Restore per thread state */
409 bl __restore_cpu_power8
411 /* Restore SLB from PACA */
412 ld r8,PACA_SLBSHADOWPTR(r13)
415 li r3, SLBSHADOW_SAVEAREA
419 andis. r7,r5,SLB_ESID_V@h
434 hypervisor_state_restored:
436 li r5,PNV_THREAD_RUNNING
437 stb r5,PACA_THREAD_IDLE_STATE(r13)
440 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
441 li r0,KVM_HWTHREAD_IN_KERNEL
442 stb r0,HSTATE_HWTHREAD_STATE(r13)
443 /* Order setting hwthread_state vs. testing hwthread_req */
445 lbz r0,HSTATE_HWTHREAD_REQ(r13)
457 addi r1,r1,INT_FRAME_SIZE
459 mfspr r3,SPRN_SRR1 /* Return SRR1 */
464 fastsleep_workaround_at_exit:
467 li r0,OPAL_CONFIG_CPU_IDLE_STATE
468 bl opal_call_realmode
472 * R3 here contains the value that will be returned to the caller
475 _GLOBAL(power7_wakeup_loss)
479 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
485 addi r1,r1,INT_FRAME_SIZE
492 * R3 here contains the value that will be returned to the caller
495 _GLOBAL(power7_wakeup_noloss)
496 lbz r0,PACA_NAPSTATELOST(r13)
498 bne power7_wakeup_loss
501 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
505 addi r1,r1,INT_FRAME_SIZE