2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
4 * Rewrite, cleanup, new allocation schemes, virtual merging:
5 * Copyright (C) 2004 Olof Johansson, IBM Corporation
6 * and Ben. Herrenschmidt, IBM Corporation
8 * Dynamic DMA mapping support, bus-independent parts.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <linux/init.h>
27 #include <linux/types.h>
28 #include <linux/slab.h>
30 #include <linux/spinlock.h>
31 #include <linux/string.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/bitops.h>
34 #include <linux/iommu-helper.h>
37 #include <asm/iommu.h>
38 #include <asm/pci-bridge.h>
39 #include <asm/machdep.h>
40 #include <asm/kdump.h>
44 #ifdef CONFIG_IOMMU_VMERGE
45 static int novmerge = 0;
47 static int novmerge = 1;
50 static int protect4gb = 1;
52 static inline unsigned long iommu_num_pages(unsigned long vaddr,
57 npages = IOMMU_PAGE_ALIGN(vaddr + slen) - (vaddr & IOMMU_PAGE_MASK);
58 npages >>= IOMMU_PAGE_SHIFT;
63 static int __init setup_protect4gb(char *str)
65 if (strcmp(str, "on") == 0)
67 else if (strcmp(str, "off") == 0)
73 static int __init setup_iommu(char *str)
75 if (!strcmp(str, "novmerge"))
77 else if (!strcmp(str, "vmerge"))
82 __setup("protect4gb=", setup_protect4gb);
83 __setup("iommu=", setup_iommu);
85 static unsigned long iommu_range_alloc(struct device *dev,
86 struct iommu_table *tbl,
88 unsigned long *handle,
90 unsigned int align_order)
92 unsigned long n, end, start;
94 int largealloc = npages > 15;
96 unsigned long align_mask;
97 unsigned long boundary_size;
99 align_mask = 0xffffffffffffffffl >> (64 - align_order);
101 /* This allocator was derived from x86_64's bit string search */
104 if (unlikely(npages == 0)) {
105 if (printk_ratelimit())
107 return DMA_ERROR_CODE;
110 if (handle && *handle)
113 start = largealloc ? tbl->it_largehint : tbl->it_hint;
115 /* Use only half of the table for small allocs (15 pages or less) */
116 limit = largealloc ? tbl->it_size : tbl->it_halfpoint;
118 if (largealloc && start < tbl->it_halfpoint)
119 start = tbl->it_halfpoint;
121 /* The case below can happen if we have a small segment appended
122 * to a large, or when the previous alloc was at the very end of
123 * the available space. If so, go back to the initial start.
126 start = largealloc ? tbl->it_largehint : tbl->it_hint;
130 if (limit + tbl->it_offset > mask) {
131 limit = mask - tbl->it_offset + 1;
132 /* If we're constrained on address range, first try
133 * at the masked hint to avoid O(n) search complexity,
134 * but on second pass, start at 0.
136 if ((start & mask) >= limit || pass > 0)
143 boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1,
144 1 << IOMMU_PAGE_SHIFT);
146 boundary_size = ALIGN(1UL << 32, 1 << IOMMU_PAGE_SHIFT);
147 /* 4GB boundary for iseries_hv_alloc and iseries_hv_map */
149 n = iommu_area_alloc(tbl->it_map, limit, start, npages,
150 tbl->it_offset, boundary_size >> IOMMU_PAGE_SHIFT,
153 if (likely(pass < 2)) {
154 /* First failure, just rescan the half of the table.
155 * Second failure, rescan the other half of the table.
157 start = (largealloc ^ pass) ? tbl->it_halfpoint : 0;
158 limit = pass ? tbl->it_size : limit;
162 /* Third failure, give up */
163 return DMA_ERROR_CODE;
169 /* Bump the hint to a new block for small allocs. */
171 /* Don't bump to new block to avoid fragmentation */
172 tbl->it_largehint = end;
174 /* Overflow will be taken care of at the next allocation */
175 tbl->it_hint = (end + tbl->it_blocksize - 1) &
176 ~(tbl->it_blocksize - 1);
179 /* Update handle for SG allocations */
186 static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl,
187 void *page, unsigned int npages,
188 enum dma_data_direction direction,
189 unsigned long mask, unsigned int align_order)
191 unsigned long entry, flags;
192 dma_addr_t ret = DMA_ERROR_CODE;
194 spin_lock_irqsave(&(tbl->it_lock), flags);
196 entry = iommu_range_alloc(dev, tbl, npages, NULL, mask, align_order);
198 if (unlikely(entry == DMA_ERROR_CODE)) {
199 spin_unlock_irqrestore(&(tbl->it_lock), flags);
200 return DMA_ERROR_CODE;
203 entry += tbl->it_offset; /* Offset into real TCE table */
204 ret = entry << IOMMU_PAGE_SHIFT; /* Set the return dma address */
206 /* Put the TCEs in the HW table */
207 ppc_md.tce_build(tbl, entry, npages, (unsigned long)page & IOMMU_PAGE_MASK,
211 /* Flush/invalidate TLB caches if necessary */
212 if (ppc_md.tce_flush)
213 ppc_md.tce_flush(tbl);
215 spin_unlock_irqrestore(&(tbl->it_lock), flags);
217 /* Make sure updates are seen by hardware */
223 static void __iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
226 unsigned long entry, free_entry;
228 entry = dma_addr >> IOMMU_PAGE_SHIFT;
229 free_entry = entry - tbl->it_offset;
231 if (((free_entry + npages) > tbl->it_size) ||
232 (entry < tbl->it_offset)) {
233 if (printk_ratelimit()) {
234 printk(KERN_INFO "iommu_free: invalid entry\n");
235 printk(KERN_INFO "\tentry = 0x%lx\n", entry);
236 printk(KERN_INFO "\tdma_addr = 0x%lx\n", (u64)dma_addr);
237 printk(KERN_INFO "\tTable = 0x%lx\n", (u64)tbl);
238 printk(KERN_INFO "\tbus# = 0x%lx\n", (u64)tbl->it_busno);
239 printk(KERN_INFO "\tsize = 0x%lx\n", (u64)tbl->it_size);
240 printk(KERN_INFO "\tstartOff = 0x%lx\n", (u64)tbl->it_offset);
241 printk(KERN_INFO "\tindex = 0x%lx\n", (u64)tbl->it_index);
247 ppc_md.tce_free(tbl, entry, npages);
248 iommu_area_free(tbl->it_map, free_entry, npages);
251 static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
256 spin_lock_irqsave(&(tbl->it_lock), flags);
258 __iommu_free(tbl, dma_addr, npages);
260 /* Make sure TLB cache is flushed if the HW needs it. We do
261 * not do an mb() here on purpose, it is not needed on any of
262 * the current platforms.
264 if (ppc_md.tce_flush)
265 ppc_md.tce_flush(tbl);
267 spin_unlock_irqrestore(&(tbl->it_lock), flags);
270 int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
271 struct scatterlist *sglist, int nelems,
272 unsigned long mask, enum dma_data_direction direction)
274 dma_addr_t dma_next = 0, dma_addr;
276 struct scatterlist *s, *outs, *segstart;
277 int outcount, incount, i;
279 unsigned long handle;
280 unsigned int max_seg_size;
282 BUG_ON(direction == DMA_NONE);
284 if ((nelems == 0) || !tbl)
287 outs = s = segstart = &sglist[0];
292 /* Init first segment length for backout at failure */
293 outs->dma_length = 0;
295 DBG("sg mapping %d elements:\n", nelems);
297 spin_lock_irqsave(&(tbl->it_lock), flags);
299 max_seg_size = dma_get_max_seg_size(dev);
300 for_each_sg(sglist, s, nelems, i) {
301 unsigned long vaddr, npages, entry, slen;
309 /* Allocate iommu entries for that segment */
310 vaddr = (unsigned long) sg_virt(s);
311 npages = iommu_num_pages(vaddr, slen);
313 if (IOMMU_PAGE_SHIFT < PAGE_SHIFT && slen >= PAGE_SIZE &&
314 (vaddr & ~PAGE_MASK) == 0)
315 align = PAGE_SHIFT - IOMMU_PAGE_SHIFT;
316 entry = iommu_range_alloc(dev, tbl, npages, &handle,
317 mask >> IOMMU_PAGE_SHIFT, align);
319 DBG(" - vaddr: %lx, size: %lx\n", vaddr, slen);
322 if (unlikely(entry == DMA_ERROR_CODE)) {
323 if (printk_ratelimit())
324 printk(KERN_INFO "iommu_alloc failed, tbl %p vaddr %lx"
325 " npages %lx\n", tbl, vaddr, npages);
329 /* Convert entry to a dma_addr_t */
330 entry += tbl->it_offset;
331 dma_addr = entry << IOMMU_PAGE_SHIFT;
332 dma_addr |= (s->offset & ~IOMMU_PAGE_MASK);
334 DBG(" - %lu pages, entry: %lx, dma_addr: %lx\n",
335 npages, entry, dma_addr);
337 /* Insert into HW table */
338 ppc_md.tce_build(tbl, entry, npages, vaddr & IOMMU_PAGE_MASK, direction);
340 /* If we are in an open segment, try merging */
342 DBG(" - trying merge...\n");
343 /* We cannot merge if:
344 * - allocated dma_addr isn't contiguous to previous allocation
346 if (novmerge || (dma_addr != dma_next) ||
347 (outs->dma_length + s->length > max_seg_size)) {
348 /* Can't merge: create a new segment */
351 outs = sg_next(outs);
352 DBG(" can't merge, new segment.\n");
354 outs->dma_length += s->length;
355 DBG(" merged, new len: %ux\n", outs->dma_length);
360 /* This is a new segment, fill entries */
361 DBG(" - filling new segment.\n");
362 outs->dma_address = dma_addr;
363 outs->dma_length = slen;
366 /* Calculate next page pointer for contiguous check */
367 dma_next = dma_addr + slen;
369 DBG(" - dma next is: %lx\n", dma_next);
372 /* Flush/invalidate TLB caches if necessary */
373 if (ppc_md.tce_flush)
374 ppc_md.tce_flush(tbl);
376 spin_unlock_irqrestore(&(tbl->it_lock), flags);
378 DBG("mapped %d elements:\n", outcount);
380 /* For the sake of iommu_unmap_sg, we clear out the length in the
381 * next entry of the sglist if we didn't fill the list completely
383 if (outcount < incount) {
384 outs = sg_next(outs);
385 outs->dma_address = DMA_ERROR_CODE;
386 outs->dma_length = 0;
389 /* Make sure updates are seen by hardware */
395 for_each_sg(sglist, s, nelems, i) {
396 if (s->dma_length != 0) {
397 unsigned long vaddr, npages;
399 vaddr = s->dma_address & IOMMU_PAGE_MASK;
400 npages = iommu_num_pages(s->dma_address, s->dma_length);
401 __iommu_free(tbl, vaddr, npages);
402 s->dma_address = DMA_ERROR_CODE;
408 spin_unlock_irqrestore(&(tbl->it_lock), flags);
413 void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
414 int nelems, enum dma_data_direction direction)
416 struct scatterlist *sg;
419 BUG_ON(direction == DMA_NONE);
424 spin_lock_irqsave(&(tbl->it_lock), flags);
429 dma_addr_t dma_handle = sg->dma_address;
431 if (sg->dma_length == 0)
433 npages = iommu_num_pages(dma_handle, sg->dma_length);
434 __iommu_free(tbl, dma_handle, npages);
438 /* Flush/invalidate TLBs if necessary. As for iommu_free(), we
439 * do not do an mb() here, the affected platforms do not need it
442 if (ppc_md.tce_flush)
443 ppc_md.tce_flush(tbl);
445 spin_unlock_irqrestore(&(tbl->it_lock), flags);
449 * Build a iommu_table structure. This contains a bit map which
450 * is used to manage allocation of the tce space.
452 struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid)
455 static int welcomed = 0;
458 /* Set aside 1/4 of the table for large allocations. */
459 tbl->it_halfpoint = tbl->it_size * 3 / 4;
461 /* number of bytes needed for the bitmap */
462 sz = (tbl->it_size + 7) >> 3;
464 page = alloc_pages_node(nid, GFP_ATOMIC, get_order(sz));
466 panic("iommu_init_table: Can't allocate %ld bytes\n", sz);
467 tbl->it_map = page_address(page);
468 memset(tbl->it_map, 0, sz);
471 tbl->it_largehint = tbl->it_halfpoint;
472 spin_lock_init(&tbl->it_lock);
474 #ifdef CONFIG_CRASH_DUMP
475 if (ppc_md.tce_get) {
477 unsigned long tceval;
478 unsigned long tcecount = 0;
481 * Reserve the existing mappings left by the first kernel.
483 for (index = 0; index < tbl->it_size; index++) {
484 tceval = ppc_md.tce_get(tbl, index + tbl->it_offset);
486 * Freed TCE entry contains 0x7fffffffffffffff on JS20
488 if (tceval && (tceval != 0x7fffffffffffffffUL)) {
489 __set_bit(index, tbl->it_map);
493 if ((tbl->it_size - tcecount) < KDUMP_MIN_TCE_ENTRIES) {
494 printk(KERN_WARNING "TCE table is full; ");
495 printk(KERN_WARNING "freeing %d entries for the kdump boot\n",
496 KDUMP_MIN_TCE_ENTRIES);
497 for (index = tbl->it_size - KDUMP_MIN_TCE_ENTRIES;
498 index < tbl->it_size; index++)
499 __clear_bit(index, tbl->it_map);
503 /* Clear the hardware table in case firmware left allocations in it */
504 ppc_md.tce_free(tbl, tbl->it_offset, tbl->it_size);
508 printk(KERN_INFO "IOMMU table initialized, virtual merging %s\n",
509 novmerge ? "disabled" : "enabled");
516 void iommu_free_table(struct iommu_table *tbl, const char *node_name)
518 unsigned long bitmap_sz, i;
521 if (!tbl || !tbl->it_map) {
522 printk(KERN_ERR "%s: expected TCE map for %s\n", __func__,
527 /* verify that table contains no entries */
528 /* it_size is in entries, and we're examining 64 at a time */
529 for (i = 0; i < (tbl->it_size/64); i++) {
530 if (tbl->it_map[i] != 0) {
531 printk(KERN_WARNING "%s: Unexpected TCEs for %s\n",
532 __func__, node_name);
537 /* calculate bitmap size in bytes */
538 bitmap_sz = (tbl->it_size + 7) / 8;
541 order = get_order(bitmap_sz);
542 free_pages((unsigned long) tbl->it_map, order);
548 /* Creates TCEs for a user provided buffer. The user buffer must be
549 * contiguous real kernel storage (not vmalloc). The address of the buffer
550 * passed here is the kernel (virtual) address of the buffer. The buffer
551 * need not be page aligned, the dma_addr_t returned will point to the same
552 * byte within the page as vaddr.
554 dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl,
555 void *vaddr, size_t size, unsigned long mask,
556 enum dma_data_direction direction)
558 dma_addr_t dma_handle = DMA_ERROR_CODE;
560 unsigned int npages, align;
562 BUG_ON(direction == DMA_NONE);
564 uaddr = (unsigned long)vaddr;
565 npages = iommu_num_pages(uaddr, size);
569 if (IOMMU_PAGE_SHIFT < PAGE_SHIFT && size >= PAGE_SIZE &&
570 ((unsigned long)vaddr & ~PAGE_MASK) == 0)
571 align = PAGE_SHIFT - IOMMU_PAGE_SHIFT;
573 dma_handle = iommu_alloc(dev, tbl, vaddr, npages, direction,
574 mask >> IOMMU_PAGE_SHIFT, align);
575 if (dma_handle == DMA_ERROR_CODE) {
576 if (printk_ratelimit()) {
577 printk(KERN_INFO "iommu_alloc failed, "
578 "tbl %p vaddr %p npages %d\n",
582 dma_handle |= (uaddr & ~IOMMU_PAGE_MASK);
588 void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
589 size_t size, enum dma_data_direction direction)
593 BUG_ON(direction == DMA_NONE);
596 npages = iommu_num_pages(dma_handle, size);
597 iommu_free(tbl, dma_handle, npages);
601 /* Allocates a contiguous real buffer and creates mappings over it.
602 * Returns the virtual address of the buffer and sets dma_handle
603 * to the dma address (mapping) of the first page.
605 void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
606 size_t size, dma_addr_t *dma_handle,
607 unsigned long mask, gfp_t flag, int node)
612 unsigned int nio_pages, io_order;
615 size = PAGE_ALIGN(size);
616 order = get_order(size);
619 * Client asked for way too much space. This is checked later
620 * anyway. It is easier to debug here for the drivers than in
623 if (order >= IOMAP_MAX_ORDER) {
624 printk("iommu_alloc_consistent size too large: 0x%lx\n", size);
631 /* Alloc enough pages (and possibly more) */
632 page = alloc_pages_node(node, flag, order);
635 ret = page_address(page);
636 memset(ret, 0, size);
638 /* Set up tces to cover the allocated range */
639 nio_pages = size >> IOMMU_PAGE_SHIFT;
640 io_order = get_iommu_order(size);
641 mapping = iommu_alloc(dev, tbl, ret, nio_pages, DMA_BIDIRECTIONAL,
642 mask >> IOMMU_PAGE_SHIFT, io_order);
643 if (mapping == DMA_ERROR_CODE) {
644 free_pages((unsigned long)ret, order);
647 *dma_handle = mapping;
651 void iommu_free_coherent(struct iommu_table *tbl, size_t size,
652 void *vaddr, dma_addr_t dma_handle)
655 unsigned int nio_pages;
657 size = PAGE_ALIGN(size);
658 nio_pages = size >> IOMMU_PAGE_SHIFT;
659 iommu_free(tbl, dma_handle, nio_pages);
660 size = PAGE_ALIGN(size);
661 free_pages((unsigned long)vaddr, get_order(size));