2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * and Paul Mackerras (paulus@samba.org)
14 * This file handles the architecture-dependent parts of hardware exceptions
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
21 #include <linux/stddef.h>
22 #include <linux/unistd.h>
23 #include <linux/ptrace.h>
24 #include <linux/slab.h>
25 #include <linux/user.h>
26 #include <linux/interrupt.h>
27 #include <linux/init.h>
28 #include <linux/module.h>
29 #include <linux/prctl.h>
30 #include <linux/delay.h>
31 #include <linux/kprobes.h>
32 #include <linux/kexec.h>
33 #include <linux/backlight.h>
34 #include <linux/bug.h>
35 #include <linux/kdebug.h>
36 #include <linux/debugfs.h>
38 #include <asm/emulated_ops.h>
39 #include <asm/pgtable.h>
40 #include <asm/uaccess.h>
41 #include <asm/system.h>
43 #include <asm/machdep.h>
49 #ifdef CONFIG_PMAC_BACKLIGHT
50 #include <asm/backlight.h>
53 #include <asm/firmware.h>
54 #include <asm/processor.h>
56 #include <asm/kexec.h>
57 #include <asm/ppc-opcode.h>
58 #ifdef CONFIG_FSL_BOOKE
59 #include <asm/dbell.h>
62 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
63 int (*__debugger)(struct pt_regs *regs) __read_mostly;
64 int (*__debugger_ipi)(struct pt_regs *regs) __read_mostly;
65 int (*__debugger_bpt)(struct pt_regs *regs) __read_mostly;
66 int (*__debugger_sstep)(struct pt_regs *regs) __read_mostly;
67 int (*__debugger_iabr_match)(struct pt_regs *regs) __read_mostly;
68 int (*__debugger_dabr_match)(struct pt_regs *regs) __read_mostly;
69 int (*__debugger_fault_handler)(struct pt_regs *regs) __read_mostly;
71 EXPORT_SYMBOL(__debugger);
72 EXPORT_SYMBOL(__debugger_ipi);
73 EXPORT_SYMBOL(__debugger_bpt);
74 EXPORT_SYMBOL(__debugger_sstep);
75 EXPORT_SYMBOL(__debugger_iabr_match);
76 EXPORT_SYMBOL(__debugger_dabr_match);
77 EXPORT_SYMBOL(__debugger_fault_handler);
81 * Trap & Exception support
84 #ifdef CONFIG_PMAC_BACKLIGHT
85 static void pmac_backlight_unblank(void)
87 mutex_lock(&pmac_backlight_mutex);
89 struct backlight_properties *props;
91 props = &pmac_backlight->props;
92 props->brightness = props->max_brightness;
93 props->power = FB_BLANK_UNBLANK;
94 backlight_update_status(pmac_backlight);
96 mutex_unlock(&pmac_backlight_mutex);
99 static inline void pmac_backlight_unblank(void) { }
102 int die(const char *str, struct pt_regs *regs, long err)
107 int lock_owner_depth;
109 .lock = __RAW_SPIN_LOCK_UNLOCKED(die.lock),
111 .lock_owner_depth = 0
113 static int die_counter;
121 if (die.lock_owner != raw_smp_processor_id()) {
123 raw_spin_lock_irqsave(&die.lock, flags);
124 die.lock_owner = smp_processor_id();
125 die.lock_owner_depth = 0;
127 if (machine_is(powermac))
128 pmac_backlight_unblank();
130 local_save_flags(flags);
133 if (++die.lock_owner_depth < 3) {
134 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
135 #ifdef CONFIG_PREEMPT
139 printk("SMP NR_CPUS=%d ", NR_CPUS);
141 #ifdef CONFIG_DEBUG_PAGEALLOC
142 printk("DEBUG_PAGEALLOC ");
147 printk("%s\n", ppc_md.name ? ppc_md.name : "");
149 sysfs_printk_last_file();
150 if (notify_die(DIE_OOPS, str, regs, err, 255,
151 SIGSEGV) == NOTIFY_STOP)
157 printk("Recursive die() failure, output suppressed\n");
162 add_taint(TAINT_DIE);
163 raw_spin_unlock_irqrestore(&die.lock, flags);
165 if (kexec_should_crash(current) ||
166 kexec_sr_activated(smp_processor_id()))
168 crash_kexec_secondary(regs);
171 panic("Fatal exception in interrupt");
174 panic("Fatal exception");
182 void user_single_step_siginfo(struct task_struct *tsk,
183 struct pt_regs *regs, siginfo_t *info)
185 memset(info, 0, sizeof(*info));
186 info->si_signo = SIGTRAP;
187 info->si_code = TRAP_TRACE;
188 info->si_addr = (void __user *)regs->nip;
191 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
194 const char fmt32[] = KERN_INFO "%s[%d]: unhandled signal %d " \
195 "at %08lx nip %08lx lr %08lx code %x\n";
196 const char fmt64[] = KERN_INFO "%s[%d]: unhandled signal %d " \
197 "at %016lx nip %016lx lr %016lx code %x\n";
199 if (!user_mode(regs)) {
200 if (die("Exception in kernel mode", regs, signr))
202 } else if (show_unhandled_signals &&
203 unhandled_signal(current, signr) &&
204 printk_ratelimit()) {
205 printk(regs->msr & MSR_SF ? fmt64 : fmt32,
206 current->comm, current->pid, signr,
207 addr, regs->nip, regs->link, code);
210 memset(&info, 0, sizeof(info));
211 info.si_signo = signr;
213 info.si_addr = (void __user *) addr;
214 force_sig_info(signr, &info, current);
218 void system_reset_exception(struct pt_regs *regs)
220 /* See if any machine dependent calls */
221 if (ppc_md.system_reset_exception) {
222 if (ppc_md.system_reset_exception(regs))
227 cpu_set(smp_processor_id(), cpus_in_sr);
230 die("System Reset", regs, SIGABRT);
233 * Some CPUs when released from the debugger will execute this path.
234 * These CPUs entered the debugger via a soft-reset. If the CPU was
235 * hung before entering the debugger it will return to the hung
236 * state when exiting this function. This causes a problem in
237 * kdump since the hung CPU(s) will not respond to the IPI sent
238 * from kdump. To prevent the problem we call crash_kexec_secondary()
239 * here. If a kdump had not been initiated or we exit the debugger
240 * with the "exit and recover" command (x) crash_kexec_secondary()
241 * will return after 5ms and the CPU returns to its previous state.
243 crash_kexec_secondary(regs);
245 /* Must die if the interrupt is not recoverable */
246 if (!(regs->msr & MSR_RI))
247 panic("Unrecoverable System Reset");
249 /* What should we do here? We could issue a shutdown or hard reset. */
254 * I/O accesses can cause machine checks on powermacs.
255 * Check if the NIP corresponds to the address of a sync
256 * instruction for which there is an entry in the exception
258 * Note that the 601 only takes a machine check on TEA
259 * (transfer error ack) signal assertion, and does not
260 * set any of the top 16 bits of SRR1.
263 static inline int check_io_access(struct pt_regs *regs)
266 unsigned long msr = regs->msr;
267 const struct exception_table_entry *entry;
268 unsigned int *nip = (unsigned int *)regs->nip;
270 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
271 && (entry = search_exception_tables(regs->nip)) != NULL) {
273 * Check that it's a sync instruction, or somewhere
274 * in the twi; isync; nop sequence that inb/inw/inl uses.
275 * As the address is in the exception table
276 * we should be able to read the instr there.
277 * For the debug message, we look at the preceding
280 if (*nip == 0x60000000) /* nop */
282 else if (*nip == 0x4c00012c) /* isync */
284 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
289 rb = (*nip >> 11) & 0x1f;
290 printk(KERN_DEBUG "%s bad port %lx at %p\n",
291 (*nip & 0x100)? "OUT to": "IN from",
292 regs->gpr[rb] - _IO_BASE, nip);
294 regs->nip = entry->fixup;
298 #endif /* CONFIG_PPC32 */
302 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
303 /* On 4xx, the reason for the machine check or program exception
305 #define get_reason(regs) ((regs)->dsisr)
306 #ifndef CONFIG_FSL_BOOKE
307 #define get_mc_reason(regs) ((regs)->dsisr)
309 #define get_mc_reason(regs) (mfspr(SPRN_MCSR) & MCSR_MASK)
311 #define REASON_FP ESR_FP
312 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
313 #define REASON_PRIVILEGED ESR_PPR
314 #define REASON_TRAP ESR_PTR
316 /* single-step stuff */
317 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
318 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
321 /* On non-4xx, the reason for the machine check or program
322 exception is in the MSR. */
323 #define get_reason(regs) ((regs)->msr)
324 #define get_mc_reason(regs) ((regs)->msr)
325 #define REASON_FP 0x100000
326 #define REASON_ILLEGAL 0x80000
327 #define REASON_PRIVILEGED 0x40000
328 #define REASON_TRAP 0x20000
330 #define single_stepping(regs) ((regs)->msr & MSR_SE)
331 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
334 #if defined(CONFIG_4xx)
335 int machine_check_4xx(struct pt_regs *regs)
337 unsigned long reason = get_mc_reason(regs);
339 if (reason & ESR_IMCP) {
340 printk("Instruction");
341 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
344 printk(" machine check in kernel mode.\n");
349 int machine_check_440A(struct pt_regs *regs)
351 unsigned long reason = get_mc_reason(regs);
353 printk("Machine check in kernel mode.\n");
354 if (reason & ESR_IMCP){
355 printk("Instruction Synchronous Machine Check exception\n");
356 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
359 u32 mcsr = mfspr(SPRN_MCSR);
361 printk("Instruction Read PLB Error\n");
363 printk("Data Read PLB Error\n");
365 printk("Data Write PLB Error\n");
366 if (mcsr & MCSR_TLBP)
367 printk("TLB Parity Error\n");
368 if (mcsr & MCSR_ICP){
369 flush_instruction_cache();
370 printk("I-Cache Parity Error\n");
372 if (mcsr & MCSR_DCSP)
373 printk("D-Cache Search Parity Error\n");
374 if (mcsr & MCSR_DCFP)
375 printk("D-Cache Flush Parity Error\n");
376 if (mcsr & MCSR_IMPE)
377 printk("Machine Check exception is imprecise\n");
380 mtspr(SPRN_MCSR, mcsr);
384 #elif defined(CONFIG_E500)
385 int machine_check_e500(struct pt_regs *regs)
387 unsigned long reason = get_mc_reason(regs);
389 printk("Machine check in kernel mode.\n");
390 printk("Caused by (from MCSR=%lx): ", reason);
392 if (reason & MCSR_MCP)
393 printk("Machine Check Signal\n");
394 if (reason & MCSR_ICPERR)
395 printk("Instruction Cache Parity Error\n");
396 if (reason & MCSR_DCP_PERR)
397 printk("Data Cache Push Parity Error\n");
398 if (reason & MCSR_DCPERR)
399 printk("Data Cache Parity Error\n");
400 if (reason & MCSR_BUS_IAERR)
401 printk("Bus - Instruction Address Error\n");
402 if (reason & MCSR_BUS_RAERR)
403 printk("Bus - Read Address Error\n");
404 if (reason & MCSR_BUS_WAERR)
405 printk("Bus - Write Address Error\n");
406 if (reason & MCSR_BUS_IBERR)
407 printk("Bus - Instruction Data Error\n");
408 if (reason & MCSR_BUS_RBERR)
409 printk("Bus - Read Data Bus Error\n");
410 if (reason & MCSR_BUS_WBERR)
411 printk("Bus - Read Data Bus Error\n");
412 if (reason & MCSR_BUS_IPERR)
413 printk("Bus - Instruction Parity Error\n");
414 if (reason & MCSR_BUS_RPERR)
415 printk("Bus - Read Parity Error\n");
419 #elif defined(CONFIG_E200)
420 int machine_check_e200(struct pt_regs *regs)
422 unsigned long reason = get_mc_reason(regs);
424 printk("Machine check in kernel mode.\n");
425 printk("Caused by (from MCSR=%lx): ", reason);
427 if (reason & MCSR_MCP)
428 printk("Machine Check Signal\n");
429 if (reason & MCSR_CP_PERR)
430 printk("Cache Push Parity Error\n");
431 if (reason & MCSR_CPERR)
432 printk("Cache Parity Error\n");
433 if (reason & MCSR_EXCP_ERR)
434 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
435 if (reason & MCSR_BUS_IRERR)
436 printk("Bus - Read Bus Error on instruction fetch\n");
437 if (reason & MCSR_BUS_DRERR)
438 printk("Bus - Read Bus Error on data load\n");
439 if (reason & MCSR_BUS_WRERR)
440 printk("Bus - Write Bus Error on buffered store or cache line push\n");
445 int machine_check_generic(struct pt_regs *regs)
447 unsigned long reason = get_mc_reason(regs);
449 printk("Machine check in kernel mode.\n");
450 printk("Caused by (from SRR1=%lx): ", reason);
451 switch (reason & 0x601F0000) {
453 printk("Machine check signal\n");
455 case 0: /* for 601 */
457 case 0x140000: /* 7450 MSS error and TEA */
458 printk("Transfer error ack signal\n");
461 printk("Data parity error signal\n");
464 printk("Address parity error signal\n");
467 printk("L1 Data Cache error\n");
470 printk("L1 Instruction Cache error\n");
473 printk("L2 data cache parity error\n");
476 printk("Unknown values in msr\n");
480 #endif /* everything else */
482 void machine_check_exception(struct pt_regs *regs)
486 __get_cpu_var(irq_stat).mce_exceptions++;
488 /* See if any machine dependent calls. In theory, we would want
489 * to call the CPU first, and call the ppc_md. one if the CPU
490 * one returns a positive number. However there is existing code
491 * that assumes the board gets a first chance, so let's keep it
492 * that way for now and fix things later. --BenH.
494 if (ppc_md.machine_check_exception)
495 recover = ppc_md.machine_check_exception(regs);
496 else if (cur_cpu_spec->machine_check)
497 recover = cur_cpu_spec->machine_check(regs);
502 if (user_mode(regs)) {
504 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
508 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
509 /* the qspan pci read routines can cause machine checks -- Cort
511 * yuck !!! that totally needs to go away ! There are better ways
512 * to deal with that than having a wart in the mcheck handler.
515 bad_page_fault(regs, regs->dar, SIGBUS);
519 if (debugger_fault_handler(regs)) {
524 if (check_io_access(regs))
527 if (debugger_fault_handler(regs))
529 die("Machine check", regs, SIGBUS);
531 /* Must die if the interrupt is not recoverable */
532 if (!(regs->msr & MSR_RI))
533 panic("Unrecoverable Machine check");
536 void SMIException(struct pt_regs *regs)
538 die("System Management Interrupt", regs, SIGABRT);
541 void unknown_exception(struct pt_regs *regs)
543 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
544 regs->nip, regs->msr, regs->trap);
546 _exception(SIGTRAP, regs, 0, 0);
549 void instruction_breakpoint_exception(struct pt_regs *regs)
551 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
552 5, SIGTRAP) == NOTIFY_STOP)
554 if (debugger_iabr_match(regs))
556 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
559 void RunModeException(struct pt_regs *regs)
561 _exception(SIGTRAP, regs, 0, 0);
564 void __kprobes single_step_exception(struct pt_regs *regs)
566 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
568 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
569 5, SIGTRAP) == NOTIFY_STOP)
571 if (debugger_sstep(regs))
574 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
578 * After we have successfully emulated an instruction, we have to
579 * check if the instruction was being single-stepped, and if so,
580 * pretend we got a single-step exception. This was pointed out
581 * by Kumar Gala. -- paulus
583 static void emulate_single_step(struct pt_regs *regs)
585 if (single_stepping(regs)) {
586 clear_single_step(regs);
587 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
591 static inline int __parse_fpscr(unsigned long fpscr)
595 /* Invalid operation */
596 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
600 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
604 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
608 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
612 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
618 static void parse_fpe(struct pt_regs *regs)
622 flush_fp_to_thread(current);
624 code = __parse_fpscr(current->thread.fpscr.val);
626 _exception(SIGFPE, regs, code, regs->nip);
630 * Illegal instruction emulation support. Originally written to
631 * provide the PVR to user applications using the mfspr rd, PVR.
632 * Return non-zero if we can't emulate, or -EFAULT if the associated
633 * memory access caused an access fault. Return zero on success.
635 * There are a couple of ways to do this, either "decode" the instruction
636 * or directly match lots of bits. In this case, matching lots of
637 * bits is faster and easier.
640 static int emulate_string_inst(struct pt_regs *regs, u32 instword)
642 u8 rT = (instword >> 21) & 0x1f;
643 u8 rA = (instword >> 16) & 0x1f;
644 u8 NB_RB = (instword >> 11) & 0x1f;
649 /* Early out if we are an invalid form of lswx */
650 if ((instword & PPC_INST_STRING_MASK) == PPC_INST_LSWX)
651 if ((rT == rA) || (rT == NB_RB))
654 EA = (rA == 0) ? 0 : regs->gpr[rA];
656 switch (instword & PPC_INST_STRING_MASK) {
660 num_bytes = regs->xer & 0x7f;
664 num_bytes = (NB_RB == 0) ? 32 : NB_RB;
670 while (num_bytes != 0)
673 u32 shift = 8 * (3 - (pos & 0x3));
675 switch ((instword & PPC_INST_STRING_MASK)) {
678 if (get_user(val, (u8 __user *)EA))
680 /* first time updating this reg,
684 regs->gpr[rT] |= val << shift;
688 val = regs->gpr[rT] >> shift;
689 if (put_user(val, (u8 __user *)EA))
693 /* move EA to next address */
697 /* manage our position within the register */
708 static int emulate_popcntb_inst(struct pt_regs *regs, u32 instword)
713 ra = (instword >> 16) & 0x1f;
714 rs = (instword >> 21) & 0x1f;
717 tmp = tmp - ((tmp >> 1) & 0x5555555555555555ULL);
718 tmp = (tmp & 0x3333333333333333ULL) + ((tmp >> 2) & 0x3333333333333333ULL);
719 tmp = (tmp + (tmp >> 4)) & 0x0f0f0f0f0f0f0f0fULL;
725 static int emulate_isel(struct pt_regs *regs, u32 instword)
727 u8 rT = (instword >> 21) & 0x1f;
728 u8 rA = (instword >> 16) & 0x1f;
729 u8 rB = (instword >> 11) & 0x1f;
730 u8 BC = (instword >> 6) & 0x1f;
734 tmp = (rA == 0) ? 0 : regs->gpr[rA];
735 bit = (regs->ccr >> (31 - BC)) & 0x1;
737 regs->gpr[rT] = bit ? tmp : regs->gpr[rB];
742 static int emulate_instruction(struct pt_regs *regs)
747 if (!user_mode(regs) || (regs->msr & MSR_LE))
749 CHECK_FULL_REGS(regs);
751 if (get_user(instword, (u32 __user *)(regs->nip)))
754 /* Emulate the mfspr rD, PVR. */
755 if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) {
756 PPC_WARN_EMULATED(mfpvr, regs);
757 rd = (instword >> 21) & 0x1f;
758 regs->gpr[rd] = mfspr(SPRN_PVR);
762 /* Emulating the dcba insn is just a no-op. */
763 if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA) {
764 PPC_WARN_EMULATED(dcba, regs);
768 /* Emulate the mcrxr insn. */
769 if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) {
770 int shift = (instword >> 21) & 0x1c;
771 unsigned long msk = 0xf0000000UL >> shift;
773 PPC_WARN_EMULATED(mcrxr, regs);
774 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
775 regs->xer &= ~0xf0000000UL;
779 /* Emulate load/store string insn. */
780 if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING) {
781 PPC_WARN_EMULATED(string, regs);
782 return emulate_string_inst(regs, instword);
785 /* Emulate the popcntb (Population Count Bytes) instruction. */
786 if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) {
787 PPC_WARN_EMULATED(popcntb, regs);
788 return emulate_popcntb_inst(regs, instword);
791 /* Emulate isel (Integer Select) instruction */
792 if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) {
793 PPC_WARN_EMULATED(isel, regs);
794 return emulate_isel(regs, instword);
800 int is_valid_bugaddr(unsigned long addr)
802 return is_kernel_addr(addr);
805 void __kprobes program_check_exception(struct pt_regs *regs)
807 unsigned int reason = get_reason(regs);
808 extern int do_mathemu(struct pt_regs *regs);
810 /* We can now get here via a FP Unavailable exception if the core
811 * has no FPU, in that case the reason flags will be 0 */
813 if (reason & REASON_FP) {
814 /* IEEE FP exception */
818 if (reason & REASON_TRAP) {
820 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP)
823 if (debugger_bpt(regs))
826 if (!(regs->msr & MSR_PR) && /* not user-mode */
827 report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) {
831 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
837 #ifdef CONFIG_MATH_EMULATION
838 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
839 * but there seems to be a hardware bug on the 405GP (RevD)
840 * that means ESR is sometimes set incorrectly - either to
841 * ESR_DST (!?) or 0. In the process of chasing this with the
842 * hardware people - not sure if it can happen on any illegal
843 * instruction or only on FP instructions, whether there is a
844 * pattern to occurences etc. -dgibson 31/Mar/2003 */
845 switch (do_mathemu(regs)) {
847 emulate_single_step(regs);
851 code = __parse_fpscr(current->thread.fpscr.val);
852 _exception(SIGFPE, regs, code, regs->nip);
856 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
859 /* fall through on any other errors */
860 #endif /* CONFIG_MATH_EMULATION */
862 /* Try to emulate it if we should. */
863 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
864 switch (emulate_instruction(regs)) {
867 emulate_single_step(regs);
870 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
875 if (reason & REASON_PRIVILEGED)
876 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
878 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
881 void alignment_exception(struct pt_regs *regs)
883 int sig, code, fixed = 0;
885 /* we don't implement logging of alignment exceptions */
886 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS))
887 fixed = fix_alignment(regs);
890 regs->nip += 4; /* skip over emulated instruction */
891 emulate_single_step(regs);
895 /* Operand address was bad */
896 if (fixed == -EFAULT) {
904 _exception(sig, regs, code, regs->dar);
906 bad_page_fault(regs, regs->dar, sig);
909 void StackOverflow(struct pt_regs *regs)
911 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
912 current, regs->gpr[1]);
915 panic("kernel stack overflow");
918 void nonrecoverable_exception(struct pt_regs *regs)
920 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
921 regs->nip, regs->msr);
923 die("nonrecoverable exception", regs, SIGKILL);
926 void trace_syscall(struct pt_regs *regs)
928 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
929 current, task_pid_nr(current), regs->nip, regs->link, regs->gpr[0],
930 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
933 void kernel_fp_unavailable_exception(struct pt_regs *regs)
935 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
936 "%lx at %lx\n", regs->trap, regs->nip);
937 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
940 void altivec_unavailable_exception(struct pt_regs *regs)
942 if (user_mode(regs)) {
943 /* A user program has executed an altivec instruction,
944 but this kernel doesn't support altivec. */
945 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
949 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
950 "%lx at %lx\n", regs->trap, regs->nip);
951 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
954 void vsx_unavailable_exception(struct pt_regs *regs)
956 if (user_mode(regs)) {
957 /* A user program has executed an vsx instruction,
958 but this kernel doesn't support vsx. */
959 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
963 printk(KERN_EMERG "Unrecoverable VSX Unavailable Exception "
964 "%lx at %lx\n", regs->trap, regs->nip);
965 die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT);
968 void performance_monitor_exception(struct pt_regs *regs)
970 __get_cpu_var(irq_stat).pmu_irqs++;
976 void SoftwareEmulation(struct pt_regs *regs)
978 extern int do_mathemu(struct pt_regs *);
979 extern int Soft_emulate_8xx(struct pt_regs *);
980 #if defined(CONFIG_MATH_EMULATION) || defined(CONFIG_8XX_MINIMAL_FPEMU)
984 CHECK_FULL_REGS(regs);
986 if (!user_mode(regs)) {
988 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
991 #ifdef CONFIG_MATH_EMULATION
992 errcode = do_mathemu(regs);
994 PPC_WARN_EMULATED(math, regs);
998 emulate_single_step(regs);
1002 code = __parse_fpscr(current->thread.fpscr.val);
1003 _exception(SIGFPE, regs, code, regs->nip);
1007 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
1010 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1014 #elif defined(CONFIG_8XX_MINIMAL_FPEMU)
1015 errcode = Soft_emulate_8xx(regs);
1017 PPC_WARN_EMULATED(8xx, regs);
1021 emulate_single_step(regs);
1024 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1027 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
1031 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1034 #endif /* CONFIG_8xx */
1036 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1037 static void handle_debug(struct pt_regs *regs, unsigned long debug_status)
1041 * Determine the cause of the debug event, clear the
1042 * event flags and send a trap to the handler. Torez
1044 if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) {
1045 dbcr_dac(current) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1046 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1047 current->thread.dbcr2 &= ~DBCR2_DAC12MODE;
1049 do_send_trap(regs, mfspr(SPRN_DAC1), debug_status, TRAP_HWBKPT,
1052 } else if (debug_status & (DBSR_DAC2R | DBSR_DAC2W)) {
1053 dbcr_dac(current) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1054 do_send_trap(regs, mfspr(SPRN_DAC2), debug_status, TRAP_HWBKPT,
1057 } else if (debug_status & DBSR_IAC1) {
1058 current->thread.dbcr0 &= ~DBCR0_IAC1;
1059 dbcr_iac_range(current) &= ~DBCR_IAC12MODE;
1060 do_send_trap(regs, mfspr(SPRN_IAC1), debug_status, TRAP_HWBKPT,
1063 } else if (debug_status & DBSR_IAC2) {
1064 current->thread.dbcr0 &= ~DBCR0_IAC2;
1065 do_send_trap(regs, mfspr(SPRN_IAC2), debug_status, TRAP_HWBKPT,
1068 } else if (debug_status & DBSR_IAC3) {
1069 current->thread.dbcr0 &= ~DBCR0_IAC3;
1070 dbcr_iac_range(current) &= ~DBCR_IAC34MODE;
1071 do_send_trap(regs, mfspr(SPRN_IAC3), debug_status, TRAP_HWBKPT,
1074 } else if (debug_status & DBSR_IAC4) {
1075 current->thread.dbcr0 &= ~DBCR0_IAC4;
1076 do_send_trap(regs, mfspr(SPRN_IAC4), debug_status, TRAP_HWBKPT,
1081 * At the point this routine was called, the MSR(DE) was turned off.
1082 * Check all other debug flags and see if that bit needs to be turned
1085 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, current->thread.dbcr1))
1086 regs->msr |= MSR_DE;
1088 /* Make sure the IDM flag is off */
1089 current->thread.dbcr0 &= ~DBCR0_IDM;
1092 mtspr(SPRN_DBCR0, current->thread.dbcr0);
1095 void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
1097 current->thread.dbsr = debug_status;
1099 /* Hack alert: On BookE, Branch Taken stops on the branch itself, while
1100 * on server, it stops on the target of the branch. In order to simulate
1101 * the server behaviour, we thus restart right away with a single step
1102 * instead of stopping here when hitting a BT
1104 if (debug_status & DBSR_BT) {
1105 regs->msr &= ~MSR_DE;
1108 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_BT);
1109 /* Clear the BT event */
1110 mtspr(SPRN_DBSR, DBSR_BT);
1112 /* Do the single step trick only when coming from userspace */
1113 if (user_mode(regs)) {
1114 current->thread.dbcr0 &= ~DBCR0_BT;
1115 current->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
1116 regs->msr |= MSR_DE;
1120 if (notify_die(DIE_SSTEP, "block_step", regs, 5,
1121 5, SIGTRAP) == NOTIFY_STOP) {
1124 if (debugger_sstep(regs))
1126 } else if (debug_status & DBSR_IC) { /* Instruction complete */
1127 regs->msr &= ~MSR_DE;
1129 /* Disable instruction completion */
1130 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
1131 /* Clear the instruction completion event */
1132 mtspr(SPRN_DBSR, DBSR_IC);
1134 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
1135 5, SIGTRAP) == NOTIFY_STOP) {
1139 if (debugger_sstep(regs))
1142 if (user_mode(regs)) {
1143 current->thread.dbcr0 &= ~DBCR0_IC;
1144 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1145 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0,
1146 current->thread.dbcr1))
1147 regs->msr |= MSR_DE;
1149 /* Make sure the IDM bit is off */
1150 current->thread.dbcr0 &= ~DBCR0_IDM;
1154 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
1156 handle_debug(regs, debug_status);
1158 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1160 #if !defined(CONFIG_TAU_INT)
1161 void TAUException(struct pt_regs *regs)
1163 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
1164 regs->nip, regs->msr, regs->trap, print_tainted());
1166 #endif /* CONFIG_INT_TAU */
1168 #ifdef CONFIG_ALTIVEC
1169 void altivec_assist_exception(struct pt_regs *regs)
1173 if (!user_mode(regs)) {
1174 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
1175 " at %lx\n", regs->nip);
1176 die("Kernel VMX/Altivec assist exception", regs, SIGILL);
1179 flush_altivec_to_thread(current);
1181 PPC_WARN_EMULATED(altivec, regs);
1182 err = emulate_altivec(regs);
1184 regs->nip += 4; /* skip emulated instruction */
1185 emulate_single_step(regs);
1189 if (err == -EFAULT) {
1190 /* got an error reading the instruction */
1191 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1193 /* didn't recognize the instruction */
1194 /* XXX quick hack for now: set the non-Java bit in the VSCR */
1195 if (printk_ratelimit())
1196 printk(KERN_ERR "Unrecognized altivec instruction "
1197 "in %s at %lx\n", current->comm, regs->nip);
1198 current->thread.vscr.u[3] |= 0x10000;
1201 #endif /* CONFIG_ALTIVEC */
1204 void vsx_assist_exception(struct pt_regs *regs)
1206 if (!user_mode(regs)) {
1207 printk(KERN_EMERG "VSX assist exception in kernel mode"
1208 " at %lx\n", regs->nip);
1209 die("Kernel VSX assist exception", regs, SIGILL);
1212 flush_vsx_to_thread(current);
1213 printk(KERN_INFO "VSX assist not supported at %lx\n", regs->nip);
1214 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1216 #endif /* CONFIG_VSX */
1218 #ifdef CONFIG_FSL_BOOKE
1220 void doorbell_exception(struct pt_regs *regs)
1223 int cpu = smp_processor_id();
1226 if (num_online_cpus() < 2)
1229 for (msg = 0; msg < 4; msg++)
1230 if (test_and_clear_bit(msg, &dbell_smp_message[cpu]))
1231 smp_message_recv(msg);
1233 printk(KERN_WARNING "Received doorbell on non-smp system\n");
1237 void CacheLockingException(struct pt_regs *regs, unsigned long address,
1238 unsigned long error_code)
1240 /* We treat cache locking instructions from the user
1241 * as priv ops, in the future we could try to do
1244 if (error_code & (ESR_DLK|ESR_ILK))
1245 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
1248 #endif /* CONFIG_FSL_BOOKE */
1251 void SPEFloatingPointException(struct pt_regs *regs)
1253 extern int do_spe_mathemu(struct pt_regs *regs);
1254 unsigned long spefscr;
1260 if (regs->msr & MSR_SPE)
1261 giveup_spe(current);
1264 spefscr = current->thread.spefscr;
1265 fpexc_mode = current->thread.fpexc_mode;
1267 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
1270 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
1273 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
1275 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
1278 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
1281 err = do_spe_mathemu(regs);
1283 regs->nip += 4; /* skip emulated instruction */
1284 emulate_single_step(regs);
1288 if (err == -EFAULT) {
1289 /* got an error reading the instruction */
1290 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1291 } else if (err == -EINVAL) {
1292 /* didn't recognize the instruction */
1293 printk(KERN_ERR "unrecognized spe instruction "
1294 "in %s at %lx\n", current->comm, regs->nip);
1296 _exception(SIGFPE, regs, code, regs->nip);
1302 void SPEFloatingPointRoundException(struct pt_regs *regs)
1304 extern int speround_handler(struct pt_regs *regs);
1308 if (regs->msr & MSR_SPE)
1309 giveup_spe(current);
1313 err = speround_handler(regs);
1315 regs->nip += 4; /* skip emulated instruction */
1316 emulate_single_step(regs);
1320 if (err == -EFAULT) {
1321 /* got an error reading the instruction */
1322 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1323 } else if (err == -EINVAL) {
1324 /* didn't recognize the instruction */
1325 printk(KERN_ERR "unrecognized spe instruction "
1326 "in %s at %lx\n", current->comm, regs->nip);
1328 _exception(SIGFPE, regs, 0, regs->nip);
1335 * We enter here if we get an unrecoverable exception, that is, one
1336 * that happened at a point where the RI (recoverable interrupt) bit
1337 * in the MSR is 0. This indicates that SRR0/1 are live, and that
1338 * we therefore lost state by taking this exception.
1340 void unrecoverable_exception(struct pt_regs *regs)
1342 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
1343 regs->trap, regs->nip);
1344 die("Unrecoverable exception", regs, SIGABRT);
1347 #ifdef CONFIG_BOOKE_WDT
1349 * Default handler for a Watchdog exception,
1350 * spins until a reboot occurs
1352 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
1354 /* Generic WatchdogHandler, implement your own */
1355 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
1359 void WatchdogException(struct pt_regs *regs)
1361 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
1362 WatchdogHandler(regs);
1367 * We enter here if we discover during exception entry that we are
1368 * running in supervisor mode with a userspace value in the stack pointer.
1370 void kernel_bad_stack(struct pt_regs *regs)
1372 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
1373 regs->gpr[1], regs->nip);
1374 die("Bad kernel stack pointer", regs, SIGABRT);
1377 void __init trap_init(void)
1382 #ifdef CONFIG_PPC_EMULATED_STATS
1384 #define WARN_EMULATED_SETUP(type) .type = { .name = #type }
1386 struct ppc_emulated ppc_emulated = {
1387 #ifdef CONFIG_ALTIVEC
1388 WARN_EMULATED_SETUP(altivec),
1390 WARN_EMULATED_SETUP(dcba),
1391 WARN_EMULATED_SETUP(dcbz),
1392 WARN_EMULATED_SETUP(fp_pair),
1393 WARN_EMULATED_SETUP(isel),
1394 WARN_EMULATED_SETUP(mcrxr),
1395 WARN_EMULATED_SETUP(mfpvr),
1396 WARN_EMULATED_SETUP(multiple),
1397 WARN_EMULATED_SETUP(popcntb),
1398 WARN_EMULATED_SETUP(spe),
1399 WARN_EMULATED_SETUP(string),
1400 WARN_EMULATED_SETUP(unaligned),
1401 #ifdef CONFIG_MATH_EMULATION
1402 WARN_EMULATED_SETUP(math),
1403 #elif defined(CONFIG_8XX_MINIMAL_FPEMU)
1404 WARN_EMULATED_SETUP(8xx),
1407 WARN_EMULATED_SETUP(vsx),
1411 u32 ppc_warn_emulated;
1413 void ppc_warn_emulated_print(const char *type)
1415 if (printk_ratelimit())
1416 pr_warning("%s used emulated %s instruction\n", current->comm,
1420 static int __init ppc_warn_emulated_init(void)
1422 struct dentry *dir, *d;
1424 struct ppc_emulated_entry *entries = (void *)&ppc_emulated;
1426 if (!powerpc_debugfs_root)
1429 dir = debugfs_create_dir("emulated_instructions",
1430 powerpc_debugfs_root);
1434 d = debugfs_create_u32("do_warn", S_IRUGO | S_IWUSR, dir,
1435 &ppc_warn_emulated);
1439 for (i = 0; i < sizeof(ppc_emulated)/sizeof(*entries); i++) {
1440 d = debugfs_create_u32(entries[i].name, S_IRUGO | S_IWUSR, dir,
1441 (u32 *)&entries[i].val.counter);
1449 debugfs_remove_recursive(dir);
1453 device_initcall(ppc_warn_emulated_init);
1455 #endif /* CONFIG_PPC_EMULATED_STATS */