2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * and Paul Mackerras (paulus@samba.org)
14 * This file handles the architecture-dependent parts of hardware exceptions
17 #include <linux/config.h>
18 #include <linux/errno.h>
19 #include <linux/sched.h>
20 #include <linux/kernel.h>
22 #include <linux/stddef.h>
23 #include <linux/unistd.h>
24 #include <linux/ptrace.h>
25 #include <linux/slab.h>
26 #include <linux/user.h>
27 #include <linux/a.out.h>
28 #include <linux/interrupt.h>
29 #include <linux/init.h>
30 #include <linux/module.h>
31 #include <linux/prctl.h>
32 #include <linux/delay.h>
33 #include <linux/kprobes.h>
35 #include <asm/kdebug.h>
36 #include <asm/pgtable.h>
37 #include <asm/uaccess.h>
38 #include <asm/system.h>
40 #include <asm/machdep.h>
45 #include <asm/perfmon.h>
47 #ifdef CONFIG_PMAC_BACKLIGHT
48 #include <asm/backlight.h>
51 #include <asm/firmware.h>
52 #include <asm/processor.h>
53 #include <asm/systemcfg.h>
57 #ifdef CONFIG_PPC64 /* XXX */
58 #define _IO_BASE pci_io_base
61 #ifdef CONFIG_DEBUGGER
62 int (*__debugger)(struct pt_regs *regs);
63 int (*__debugger_ipi)(struct pt_regs *regs);
64 int (*__debugger_bpt)(struct pt_regs *regs);
65 int (*__debugger_sstep)(struct pt_regs *regs);
66 int (*__debugger_iabr_match)(struct pt_regs *regs);
67 int (*__debugger_dabr_match)(struct pt_regs *regs);
68 int (*__debugger_fault_handler)(struct pt_regs *regs);
70 EXPORT_SYMBOL(__debugger);
71 EXPORT_SYMBOL(__debugger_ipi);
72 EXPORT_SYMBOL(__debugger_bpt);
73 EXPORT_SYMBOL(__debugger_sstep);
74 EXPORT_SYMBOL(__debugger_iabr_match);
75 EXPORT_SYMBOL(__debugger_dabr_match);
76 EXPORT_SYMBOL(__debugger_fault_handler);
79 struct notifier_block *powerpc_die_chain;
80 static DEFINE_SPINLOCK(die_notifier_lock);
82 int register_die_notifier(struct notifier_block *nb)
87 spin_lock_irqsave(&die_notifier_lock, flags);
88 err = notifier_chain_register(&powerpc_die_chain, nb);
89 spin_unlock_irqrestore(&die_notifier_lock, flags);
94 * Trap & Exception support
97 static DEFINE_SPINLOCK(die_lock);
99 int die(const char *str, struct pt_regs *regs, long err)
101 static int die_counter;
108 spin_lock_irq(&die_lock);
110 #ifdef CONFIG_PMAC_BACKLIGHT
111 if (_machine == _MACH_Pmac) {
112 set_backlight_enable(1);
113 set_backlight_level(BACKLIGHT_MAX);
116 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
117 #ifdef CONFIG_PREEMPT
122 printk("SMP NR_CPUS=%d ", NR_CPUS);
125 #ifdef CONFIG_DEBUG_PAGEALLOC
126 printk("DEBUG_PAGEALLOC ");
134 switch (systemcfg->platform) {
135 case PLATFORM_PSERIES:
139 case PLATFORM_PSERIES_LPAR:
140 printk("PSERIES LPAR ");
143 case PLATFORM_ISERIES_LPAR:
144 printk("ISERIES LPAR ");
147 case PLATFORM_POWERMAC:
162 spin_unlock_irq(&die_lock);
165 panic("Fatal exception in interrupt");
169 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
172 panic("Fatal exception");
179 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
183 if (!user_mode(regs)) {
184 if (die("Exception in kernel mode", regs, signr))
188 memset(&info, 0, sizeof(info));
189 info.si_signo = signr;
191 info.si_addr = (void __user *) addr;
192 force_sig_info(signr, &info, current);
195 * Init gets no signals that it doesn't have a handler for.
196 * That's all very well, but if it has caused a synchronous
197 * exception and we ignore the resulting signal, it will just
198 * generate the same exception over and over again and we get
199 * nowhere. Better to kill it and let the kernel panic.
201 if (current->pid == 1) {
202 __sighandler_t handler;
204 spin_lock_irq(¤t->sighand->siglock);
205 handler = current->sighand->action[signr-1].sa.sa_handler;
206 spin_unlock_irq(¤t->sighand->siglock);
207 if (handler == SIG_DFL) {
208 /* init has generated a synchronous exception
209 and it doesn't have a handler for the signal */
210 printk(KERN_CRIT "init has generated signal %d "
211 "but has no handler for it\n", signr);
218 void system_reset_exception(struct pt_regs *regs)
220 /* See if any machine dependent calls */
221 if (ppc_md.system_reset_exception)
222 ppc_md.system_reset_exception(regs);
224 die("System Reset", regs, SIGABRT);
226 /* Must die if the interrupt is not recoverable */
227 if (!(regs->msr & MSR_RI))
228 panic("Unrecoverable System Reset");
230 /* What should we do here? We could issue a shutdown or hard reset. */
235 * I/O accesses can cause machine checks on powermacs.
236 * Check if the NIP corresponds to the address of a sync
237 * instruction for which there is an entry in the exception
239 * Note that the 601 only takes a machine check on TEA
240 * (transfer error ack) signal assertion, and does not
241 * set any of the top 16 bits of SRR1.
244 static inline int check_io_access(struct pt_regs *regs)
246 #ifdef CONFIG_PPC_PMAC
247 unsigned long msr = regs->msr;
248 const struct exception_table_entry *entry;
249 unsigned int *nip = (unsigned int *)regs->nip;
251 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
252 && (entry = search_exception_tables(regs->nip)) != NULL) {
254 * Check that it's a sync instruction, or somewhere
255 * in the twi; isync; nop sequence that inb/inw/inl uses.
256 * As the address is in the exception table
257 * we should be able to read the instr there.
258 * For the debug message, we look at the preceding
261 if (*nip == 0x60000000) /* nop */
263 else if (*nip == 0x4c00012c) /* isync */
265 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
270 rb = (*nip >> 11) & 0x1f;
271 printk(KERN_DEBUG "%s bad port %lx at %p\n",
272 (*nip & 0x100)? "OUT to": "IN from",
273 regs->gpr[rb] - _IO_BASE, nip);
275 regs->nip = entry->fixup;
279 #endif /* CONFIG_PPC_PMAC */
283 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
284 /* On 4xx, the reason for the machine check or program exception
286 #define get_reason(regs) ((regs)->dsisr)
287 #ifndef CONFIG_FSL_BOOKE
288 #define get_mc_reason(regs) ((regs)->dsisr)
290 #define get_mc_reason(regs) (mfspr(SPRN_MCSR))
292 #define REASON_FP ESR_FP
293 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
294 #define REASON_PRIVILEGED ESR_PPR
295 #define REASON_TRAP ESR_PTR
297 /* single-step stuff */
298 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
299 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
302 /* On non-4xx, the reason for the machine check or program
303 exception is in the MSR. */
304 #define get_reason(regs) ((regs)->msr)
305 #define get_mc_reason(regs) ((regs)->msr)
306 #define REASON_FP 0x100000
307 #define REASON_ILLEGAL 0x80000
308 #define REASON_PRIVILEGED 0x40000
309 #define REASON_TRAP 0x20000
311 #define single_stepping(regs) ((regs)->msr & MSR_SE)
312 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
316 * This is "fall-back" implementation for configurations
317 * which don't provide platform-specific machine check info
319 void __attribute__ ((weak))
320 platform_machine_check(struct pt_regs *regs)
324 void machine_check_exception(struct pt_regs *regs)
329 /* See if any machine dependent calls */
330 if (ppc_md.machine_check_exception)
331 recover = ppc_md.machine_check_exception(regs);
336 unsigned long reason = get_mc_reason(regs);
338 if (user_mode(regs)) {
340 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
344 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
345 /* the qspan pci read routines can cause machine checks -- Cort */
346 bad_page_fault(regs, regs->dar, SIGBUS);
350 if (debugger_fault_handler(regs)) {
355 if (check_io_access(regs))
358 #if defined(CONFIG_4xx) && !defined(CONFIG_440A)
359 if (reason & ESR_IMCP) {
360 printk("Instruction");
361 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
364 printk(" machine check in kernel mode.\n");
365 #elif defined(CONFIG_440A)
366 printk("Machine check in kernel mode.\n");
367 if (reason & ESR_IMCP){
368 printk("Instruction Synchronous Machine Check exception\n");
369 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
372 u32 mcsr = mfspr(SPRN_MCSR);
374 printk("Instruction Read PLB Error\n");
376 printk("Data Read PLB Error\n");
378 printk("Data Write PLB Error\n");
379 if (mcsr & MCSR_TLBP)
380 printk("TLB Parity Error\n");
381 if (mcsr & MCSR_ICP){
382 flush_instruction_cache();
383 printk("I-Cache Parity Error\n");
385 if (mcsr & MCSR_DCSP)
386 printk("D-Cache Search Parity Error\n");
387 if (mcsr & MCSR_DCFP)
388 printk("D-Cache Flush Parity Error\n");
389 if (mcsr & MCSR_IMPE)
390 printk("Machine Check exception is imprecise\n");
393 mtspr(SPRN_MCSR, mcsr);
395 #elif defined (CONFIG_E500)
396 printk("Machine check in kernel mode.\n");
397 printk("Caused by (from MCSR=%lx): ", reason);
399 if (reason & MCSR_MCP)
400 printk("Machine Check Signal\n");
401 if (reason & MCSR_ICPERR)
402 printk("Instruction Cache Parity Error\n");
403 if (reason & MCSR_DCP_PERR)
404 printk("Data Cache Push Parity Error\n");
405 if (reason & MCSR_DCPERR)
406 printk("Data Cache Parity Error\n");
407 if (reason & MCSR_GL_CI)
408 printk("Guarded Load or Cache-Inhibited stwcx.\n");
409 if (reason & MCSR_BUS_IAERR)
410 printk("Bus - Instruction Address Error\n");
411 if (reason & MCSR_BUS_RAERR)
412 printk("Bus - Read Address Error\n");
413 if (reason & MCSR_BUS_WAERR)
414 printk("Bus - Write Address Error\n");
415 if (reason & MCSR_BUS_IBERR)
416 printk("Bus - Instruction Data Error\n");
417 if (reason & MCSR_BUS_RBERR)
418 printk("Bus - Read Data Bus Error\n");
419 if (reason & MCSR_BUS_WBERR)
420 printk("Bus - Read Data Bus Error\n");
421 if (reason & MCSR_BUS_IPERR)
422 printk("Bus - Instruction Parity Error\n");
423 if (reason & MCSR_BUS_RPERR)
424 printk("Bus - Read Parity Error\n");
425 #elif defined (CONFIG_E200)
426 printk("Machine check in kernel mode.\n");
427 printk("Caused by (from MCSR=%lx): ", reason);
429 if (reason & MCSR_MCP)
430 printk("Machine Check Signal\n");
431 if (reason & MCSR_CP_PERR)
432 printk("Cache Push Parity Error\n");
433 if (reason & MCSR_CPERR)
434 printk("Cache Parity Error\n");
435 if (reason & MCSR_EXCP_ERR)
436 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
437 if (reason & MCSR_BUS_IRERR)
438 printk("Bus - Read Bus Error on instruction fetch\n");
439 if (reason & MCSR_BUS_DRERR)
440 printk("Bus - Read Bus Error on data load\n");
441 if (reason & MCSR_BUS_WRERR)
442 printk("Bus - Write Bus Error on buffered store or cache line push\n");
443 #else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */
444 printk("Machine check in kernel mode.\n");
445 printk("Caused by (from SRR1=%lx): ", reason);
446 switch (reason & 0x601F0000) {
448 printk("Machine check signal\n");
450 case 0: /* for 601 */
452 case 0x140000: /* 7450 MSS error and TEA */
453 printk("Transfer error ack signal\n");
456 printk("Data parity error signal\n");
459 printk("Address parity error signal\n");
462 printk("L1 Data Cache error\n");
465 printk("L1 Instruction Cache error\n");
468 printk("L2 data cache parity error\n");
471 printk("Unknown values in msr\n");
473 #endif /* CONFIG_4xx */
476 * Optional platform-provided routine to print out
477 * additional info, e.g. bus error registers.
479 platform_machine_check(regs);
480 #endif /* CONFIG_PPC64 */
482 if (debugger_fault_handler(regs))
484 die("Machine check", regs, SIGBUS);
486 /* Must die if the interrupt is not recoverable */
487 if (!(regs->msr & MSR_RI))
488 panic("Unrecoverable Machine check");
491 void SMIException(struct pt_regs *regs)
493 die("System Management Interrupt", regs, SIGABRT);
496 void unknown_exception(struct pt_regs *regs)
498 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
499 regs->nip, regs->msr, regs->trap);
501 _exception(SIGTRAP, regs, 0, 0);
504 void instruction_breakpoint_exception(struct pt_regs *regs)
506 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
507 5, SIGTRAP) == NOTIFY_STOP)
509 if (debugger_iabr_match(regs))
511 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
514 void RunModeException(struct pt_regs *regs)
516 _exception(SIGTRAP, regs, 0, 0);
519 void __kprobes single_step_exception(struct pt_regs *regs)
521 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
523 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
524 5, SIGTRAP) == NOTIFY_STOP)
526 if (debugger_sstep(regs))
529 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
533 * After we have successfully emulated an instruction, we have to
534 * check if the instruction was being single-stepped, and if so,
535 * pretend we got a single-step exception. This was pointed out
536 * by Kumar Gala. -- paulus
538 static void emulate_single_step(struct pt_regs *regs)
540 if (single_stepping(regs)) {
541 clear_single_step(regs);
542 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
546 static void parse_fpe(struct pt_regs *regs)
551 flush_fp_to_thread(current);
553 fpscr = current->thread.fpscr;
555 /* Invalid operation */
556 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
560 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
564 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
568 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
572 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
575 _exception(SIGFPE, regs, code, regs->nip);
579 * Illegal instruction emulation support. Originally written to
580 * provide the PVR to user applications using the mfspr rd, PVR.
581 * Return non-zero if we can't emulate, or -EFAULT if the associated
582 * memory access caused an access fault. Return zero on success.
584 * There are a couple of ways to do this, either "decode" the instruction
585 * or directly match lots of bits. In this case, matching lots of
586 * bits is faster and easier.
589 #define INST_MFSPR_PVR 0x7c1f42a6
590 #define INST_MFSPR_PVR_MASK 0xfc1fffff
592 #define INST_DCBA 0x7c0005ec
593 #define INST_DCBA_MASK 0x7c0007fe
595 #define INST_MCRXR 0x7c000400
596 #define INST_MCRXR_MASK 0x7c0007fe
598 #define INST_STRING 0x7c00042a
599 #define INST_STRING_MASK 0x7c0007fe
600 #define INST_STRING_GEN_MASK 0x7c00067e
601 #define INST_LSWI 0x7c0004aa
602 #define INST_LSWX 0x7c00042a
603 #define INST_STSWI 0x7c0005aa
604 #define INST_STSWX 0x7c00052a
606 static int emulate_string_inst(struct pt_regs *regs, u32 instword)
608 u8 rT = (instword >> 21) & 0x1f;
609 u8 rA = (instword >> 16) & 0x1f;
610 u8 NB_RB = (instword >> 11) & 0x1f;
615 /* Early out if we are an invalid form of lswx */
616 if ((instword & INST_STRING_MASK) == INST_LSWX)
617 if ((rT == rA) || (rT == NB_RB))
620 EA = (rA == 0) ? 0 : regs->gpr[rA];
622 switch (instword & INST_STRING_MASK) {
626 num_bytes = regs->xer & 0x7f;
630 num_bytes = (NB_RB == 0) ? 32 : NB_RB;
636 while (num_bytes != 0)
639 u32 shift = 8 * (3 - (pos & 0x3));
641 switch ((instword & INST_STRING_MASK)) {
644 if (get_user(val, (u8 __user *)EA))
646 /* first time updating this reg,
650 regs->gpr[rT] |= val << shift;
654 val = regs->gpr[rT] >> shift;
655 if (put_user(val, (u8 __user *)EA))
659 /* move EA to next address */
663 /* manage our position within the register */
674 static int emulate_instruction(struct pt_regs *regs)
679 if (!user_mode(regs))
681 CHECK_FULL_REGS(regs);
683 if (get_user(instword, (u32 __user *)(regs->nip)))
686 /* Emulate the mfspr rD, PVR. */
687 if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
688 rd = (instword >> 21) & 0x1f;
689 regs->gpr[rd] = mfspr(SPRN_PVR);
693 /* Emulating the dcba insn is just a no-op. */
694 if ((instword & INST_DCBA_MASK) == INST_DCBA)
697 /* Emulate the mcrxr insn. */
698 if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
699 int shift = (instword >> 21) & 0x1c;
700 unsigned long msk = 0xf0000000UL >> shift;
702 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
703 regs->xer &= ~0xf0000000UL;
707 /* Emulate load/store string insn. */
708 if ((instword & INST_STRING_GEN_MASK) == INST_STRING)
709 return emulate_string_inst(regs, instword);
715 * Look through the list of trap instructions that are used for BUG(),
716 * BUG_ON() and WARN_ON() and see if we hit one. At this point we know
717 * that the exception was caused by a trap instruction of some kind.
718 * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
721 extern struct bug_entry __start___bug_table[], __stop___bug_table[];
723 #ifndef CONFIG_MODULES
724 #define module_find_bug(x) NULL
727 struct bug_entry *find_bug(unsigned long bugaddr)
729 struct bug_entry *bug;
731 for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
732 if (bugaddr == bug->bug_addr)
734 return module_find_bug(bugaddr);
737 static int check_bug_trap(struct pt_regs *regs)
739 struct bug_entry *bug;
742 if (regs->msr & MSR_PR)
743 return 0; /* not in kernel */
744 addr = regs->nip; /* address of trap instruction */
745 if (addr < PAGE_OFFSET)
747 bug = find_bug(regs->nip);
750 if (bug->line & BUG_WARNING_TRAP) {
751 /* this is a WARN_ON rather than BUG/BUG_ON */
753 xmon_printf(KERN_ERR "Badness in %s at %s:%d\n",
754 bug->function, bug->file,
755 bug->line & ~BUG_WARNING_TRAP);
756 #endif /* CONFIG_XMON */
757 printk(KERN_ERR "Badness in %s at %s:%d\n",
758 bug->function, bug->file,
759 bug->line & ~BUG_WARNING_TRAP);
764 xmon_printf(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
765 bug->function, bug->file, bug->line);
767 #endif /* CONFIG_XMON */
768 printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
769 bug->function, bug->file, bug->line);
774 void __kprobes program_check_exception(struct pt_regs *regs)
776 unsigned int reason = get_reason(regs);
777 extern int do_mathemu(struct pt_regs *regs);
779 #ifdef CONFIG_MATH_EMULATION
780 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
781 * but there seems to be a hardware bug on the 405GP (RevD)
782 * that means ESR is sometimes set incorrectly - either to
783 * ESR_DST (!?) or 0. In the process of chasing this with the
784 * hardware people - not sure if it can happen on any illegal
785 * instruction or only on FP instructions, whether there is a
786 * pattern to occurences etc. -dgibson 31/Mar/2003 */
787 if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) {
788 emulate_single_step(regs);
791 #endif /* CONFIG_MATH_EMULATION */
793 if (reason & REASON_FP) {
794 /* IEEE FP exception */
798 if (reason & REASON_TRAP) {
800 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP)
803 if (debugger_bpt(regs))
805 if (check_bug_trap(regs)) {
809 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
813 /* Try to emulate it if we should. */
814 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
815 switch (emulate_instruction(regs)) {
818 emulate_single_step(regs);
821 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
826 if (reason & REASON_PRIVILEGED)
827 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
829 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
832 void alignment_exception(struct pt_regs *regs)
836 fixed = fix_alignment(regs);
839 regs->nip += 4; /* skip over emulated instruction */
840 emulate_single_step(regs);
844 /* Operand address was bad */
845 if (fixed == -EFAULT) {
847 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar);
849 /* Search exception table */
850 bad_page_fault(regs, regs->dar, SIGSEGV);
853 _exception(SIGBUS, regs, BUS_ADRALN, regs->dar);
856 void StackOverflow(struct pt_regs *regs)
858 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
859 current, regs->gpr[1]);
862 panic("kernel stack overflow");
865 void nonrecoverable_exception(struct pt_regs *regs)
867 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
868 regs->nip, regs->msr);
870 die("nonrecoverable exception", regs, SIGKILL);
873 void trace_syscall(struct pt_regs *regs)
875 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
876 current, current->pid, regs->nip, regs->link, regs->gpr[0],
877 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
880 void kernel_fp_unavailable_exception(struct pt_regs *regs)
882 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
883 "%lx at %lx\n", regs->trap, regs->nip);
884 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
887 void altivec_unavailable_exception(struct pt_regs *regs)
889 #if !defined(CONFIG_ALTIVEC)
890 if (user_mode(regs)) {
891 /* A user program has executed an altivec instruction,
892 but this kernel doesn't support altivec. */
893 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
897 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
898 "%lx at %lx\n", regs->trap, regs->nip);
899 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
903 extern perf_irq_t perf_irq;
906 #if defined(CONFIG_PPC64) || defined(CONFIG_E500)
907 void performance_monitor_exception(struct pt_regs *regs)
914 void SoftwareEmulation(struct pt_regs *regs)
916 extern int do_mathemu(struct pt_regs *);
917 extern int Soft_emulate_8xx(struct pt_regs *);
920 CHECK_FULL_REGS(regs);
922 if (!user_mode(regs)) {
924 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
927 #ifdef CONFIG_MATH_EMULATION
928 errcode = do_mathemu(regs);
930 errcode = Soft_emulate_8xx(regs);
934 _exception(SIGFPE, regs, 0, 0);
935 else if (errcode == -EFAULT)
936 _exception(SIGSEGV, regs, 0, 0);
938 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
940 emulate_single_step(regs);
942 #endif /* CONFIG_8xx */
944 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
946 void DebugException(struct pt_regs *regs, unsigned long debug_status)
948 if (debug_status & DBSR_IC) { /* instruction completion */
949 regs->msr &= ~MSR_DE;
950 if (user_mode(regs)) {
951 current->thread.dbcr0 &= ~DBCR0_IC;
953 /* Disable instruction completion */
954 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
955 /* Clear the instruction completion event */
956 mtspr(SPRN_DBSR, DBSR_IC);
957 if (debugger_sstep(regs))
960 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
963 #endif /* CONFIG_4xx || CONFIG_BOOKE */
965 #if !defined(CONFIG_TAU_INT)
966 void TAUException(struct pt_regs *regs)
968 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
969 regs->nip, regs->msr, regs->trap, print_tainted());
971 #endif /* CONFIG_INT_TAU */
973 #ifdef CONFIG_ALTIVEC
974 void altivec_assist_exception(struct pt_regs *regs)
978 if (!user_mode(regs)) {
979 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
980 " at %lx\n", regs->nip);
981 die("Kernel VMX/Altivec assist exception", regs, SIGILL);
984 flush_altivec_to_thread(current);
986 err = emulate_altivec(regs);
988 regs->nip += 4; /* skip emulated instruction */
989 emulate_single_step(regs);
993 if (err == -EFAULT) {
994 /* got an error reading the instruction */
995 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
997 /* didn't recognize the instruction */
998 /* XXX quick hack for now: set the non-Java bit in the VSCR */
999 if (printk_ratelimit())
1000 printk(KERN_ERR "Unrecognized altivec instruction "
1001 "in %s at %lx\n", current->comm, regs->nip);
1002 current->thread.vscr.u[3] |= 0x10000;
1005 #endif /* CONFIG_ALTIVEC */
1007 #ifdef CONFIG_FSL_BOOKE
1008 void CacheLockingException(struct pt_regs *regs, unsigned long address,
1009 unsigned long error_code)
1011 /* We treat cache locking instructions from the user
1012 * as priv ops, in the future we could try to do
1015 if (error_code & (ESR_DLK|ESR_ILK))
1016 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
1019 #endif /* CONFIG_FSL_BOOKE */
1022 void SPEFloatingPointException(struct pt_regs *regs)
1024 unsigned long spefscr;
1028 spefscr = current->thread.spefscr;
1029 fpexc_mode = current->thread.fpexc_mode;
1031 /* Hardware does not neccessarily set sticky
1032 * underflow/overflow/invalid flags */
1033 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
1035 spefscr |= SPEFSCR_FOVFS;
1037 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
1039 spefscr |= SPEFSCR_FUNFS;
1041 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
1043 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
1045 spefscr |= SPEFSCR_FINVS;
1047 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
1050 current->thread.spefscr = spefscr;
1052 _exception(SIGFPE, regs, code, regs->nip);
1058 * We enter here if we get an unrecoverable exception, that is, one
1059 * that happened at a point where the RI (recoverable interrupt) bit
1060 * in the MSR is 0. This indicates that SRR0/1 are live, and that
1061 * we therefore lost state by taking this exception.
1063 void unrecoverable_exception(struct pt_regs *regs)
1065 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
1066 regs->trap, regs->nip);
1067 die("Unrecoverable exception", regs, SIGABRT);
1070 #ifdef CONFIG_BOOKE_WDT
1072 * Default handler for a Watchdog exception,
1073 * spins until a reboot occurs
1075 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
1077 /* Generic WatchdogHandler, implement your own */
1078 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
1082 void WatchdogException(struct pt_regs *regs)
1084 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
1085 WatchdogHandler(regs);
1090 * We enter here if we discover during exception entry that we are
1091 * running in supervisor mode with a userspace value in the stack pointer.
1093 void kernel_bad_stack(struct pt_regs *regs)
1095 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
1096 regs->gpr[1], regs->nip);
1097 die("Bad kernel stack pointer", regs, SIGABRT);
1100 void __init trap_init(void)