1 #include <asm/processor.h>
2 #include <asm/ppc_asm.h>
4 #include <asm/asm-offsets.h>
5 #include <asm/cputable.h>
6 #include <asm/thread_info.h>
8 #include <asm/ptrace.h>
10 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
11 /* void do_load_up_transact_altivec(struct thread_struct *thread)
13 * This is similar to load_up_altivec but for the transactional version of the
14 * vector regs. It doesn't mess with the task MSR or valid flags.
15 * Furthermore, VEC laziness is not supported with TM currently.
17 _GLOBAL(do_load_up_transact_altivec)
24 stw r4,THREAD_USED_VR(r3)
26 li r10,THREAD_TRANSACT_VRSTATE+VRSTATE_VSCR
29 addi r10,r3,THREAD_TRANSACT_VRSTATE
32 /* Disable VEC again. */
40 * Load state from memory into VMX registers including VSCR.
41 * Assumes the caller has enabled VMX in the MSR.
43 _GLOBAL(load_vr_state)
51 * Store VMX state into memory, including VSCR.
52 * Assumes the caller has enabled VMX in the MSR.
54 _GLOBAL(store_vr_state)
62 * Disable VMX for the task which had it previously,
63 * and save its vector registers in its thread_struct.
64 * Enables the VMX for use in the kernel on return.
65 * On SMP we know the VMX is free, since we give it up every
66 * switch (ie, no lazy save of the vector registers).
68 _GLOBAL(load_up_altivec)
69 mfmsr r5 /* grab the current MSR */
71 MTMSRD(r5) /* enable use of AltiVec now */
75 * For SMP, we don't do lazy VMX switching because it just gets too
76 * horrendously complex, especially when a task switches from one CPU
77 * to another. Instead we call giveup_altvec in switch_to.
78 * VRSAVE isn't dealt with here, that is done in the normal context
79 * switch code. Note that we could rely on vrsave value to eventually
80 * avoid saving all of the VREGs here...
83 LOAD_REG_ADDRBASE(r3, last_task_used_altivec)
85 PPC_LL r4,ADDROFF(last_task_used_altivec)(r3)
89 /* Save VMX state to last_task_used_altivec's THREAD struct */
92 addi r7,r4,THREAD_VRSTATE
97 /* Disable VMX for last_task_used_altivec */
100 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
103 PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
105 #endif /* CONFIG_SMP */
107 /* Hack: if we get an altivec unavailable trap with VRSAVE
108 * set to all zeros, we assume this is a broken application
109 * that fails to set it properly, and thus we switch it to
118 /* enable use of VMX after return */
120 mfspr r5,SPRN_SPRG_THREAD /* current task's THREAD (phys) */
123 ld r4,PACACURRENT(r13)
124 addi r5,r4,THREAD /* Get THREAD */
125 oris r12,r12,MSR_VEC@h
128 addi r7,r5,THREAD_VRSTATE
131 stw r4,THREAD_USED_VR(r5)
136 /* Update last_task_used_altivec to 'current' */
137 subi r4,r5,THREAD /* Back to 'current' */
139 PPC_STL r4,ADDROFF(last_task_used_altivec)(r3)
140 #endif /* CONFIG_SMP */
141 /* restore registers and return */
144 _GLOBAL(giveup_altivec_notask)
146 andis. r4,r3,MSR_VEC@h
147 bnelr /* Already enabled? */
150 MTMSRD(r3) /* enable use of VMX now */
155 * giveup_altivec(tsk)
156 * Disable VMX for the task given as the argument,
157 * and save the vector registers in its thread_struct.
158 * Enables the VMX for use in the kernel on return.
160 _GLOBAL(giveup_altivec)
164 MTMSRD(r5) /* enable use of VMX now */
167 beqlr /* if no previous owner, done */
168 addi r3,r3,THREAD /* want THREAD of task */
169 PPC_LL r7,THREAD_VRSAVEAREA(r3)
170 PPC_LL r5,PT_REGS(r3)
173 addi r7,r3,THREAD_VRSTATE
180 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
183 lis r3,(MSR_VEC|MSR_VSX)@h
186 ALT_FTR_SECTION_END_IFSET(CPU_FTR_VSX)
190 andc r4,r4,r3 /* disable FP for previous task */
191 PPC_STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
195 LOAD_REG_ADDRBASE(r4,last_task_used_altivec)
196 PPC_STL r5,ADDROFF(last_task_used_altivec)(r4)
197 #endif /* CONFIG_SMP */
203 #error This asm code isn't ready for 32-bit kernels
207 * load_up_vsx(unused, unused, tsk)
208 * Disable VSX for the task which had it previously,
209 * and save its vector registers in its thread_struct.
210 * Reuse the fp and vsx saves, but first check to see if they have
211 * been saved already.
214 /* Load FP and VSX registers if they haven't been done yet */
216 beql+ load_up_fpu /* skip if already loaded */
217 andis. r5,r12,MSR_VEC@h
218 beql+ load_up_altivec /* skip if already loaded */
221 ld r3,last_task_used_vsx@got(r2)
225 /* Disable VSX for last_task_used_vsx */
228 ld r4,_MSR-STACK_FRAME_OVERHEAD(r5)
231 std r6,_MSR-STACK_FRAME_OVERHEAD(r5)
233 #endif /* CONFIG_SMP */
234 ld r4,PACACURRENT(r13)
235 addi r4,r4,THREAD /* Get THREAD */
237 stw r6,THREAD_USED_VSR(r4) /* ... also set thread used vsr */
238 /* enable use of VSX after return */
239 oris r12,r12,MSR_VSX@h
242 /* Update last_task_used_vsx to 'current' */
243 ld r4,PACACURRENT(r13)
245 #endif /* CONFIG_SMP */
246 b fast_exception_return
250 * Disable VSX for the task given as the argument.
251 * Does NOT save vsx registers.
252 * Enables the VSX for use in the kernel on return.
254 _GLOBAL(__giveup_vsx)
257 mtmsrd r5 /* enable use of VSX now */
261 beqlr- /* if no previous owner, done */
262 addi r3,r3,THREAD /* want THREAD of task */
266 ld r4,_MSR-STACK_FRAME_OVERHEAD(r5)
268 andc r4,r4,r3 /* disable VSX for previous task */
269 std r4,_MSR-STACK_FRAME_OVERHEAD(r5)
273 ld r4,last_task_used_vsx@got(r2)
275 #endif /* CONFIG_SMP */
278 #endif /* CONFIG_VSX */
282 * The routines below are in assembler so we can closely control the
283 * usage of floating-point registers. These routines must be called
284 * with preempt disabled.
291 .long 0x3f800000 /* 1.0 in single-precision FP */
293 .long 0x3f000000 /* 0.5 in single-precision FP */
295 #define LDCONST(fr, name) \
304 .tc FD_3ff00000_0[TC],0x3ff0000000000000 /* 1.0 */
306 .tc FD_3fe00000_0[TC],0x3fe0000000000000 /* 0.5 */
308 #define LDCONST(fr, name) \
314 * Internal routine to enable floating point and set FPSCR to 0.
315 * Don't call it from C; it doesn't use the normal calling convention.
347 * Vector add, floating point.
364 * Vector subtract, floating point.
381 * Vector multiply and add, floating point.
393 fmadds fr0,fr0,fr2,fr1
401 * Vector negative multiply and subtract, floating point.
413 fnmsubs fr0,fr0,fr2,fr1
421 * Vector reciprocal estimate. We just compute 1.0/x.
422 * r3 -> destination, r4 -> source.
439 * Vector reciprocal square-root estimate, floating point.
440 * We use the frsqrte instruction for the initial estimate followed
441 * by 2 iterations of Newton-Raphson to get sufficient accuracy.
442 * r3 -> destination, r4 -> source.
457 frsqrte fr1,fr0 /* r = frsqrte(s) */
458 fmuls fr3,fr1,fr0 /* r * s */
459 fmuls fr2,fr1,fr5 /* r * 0.5 */
460 fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
461 fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
462 fmuls fr3,fr1,fr0 /* r * s */
463 fmuls fr2,fr1,fr5 /* r * 0.5 */
464 fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
465 fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */