2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright IBM Corp. 2008
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
20 #include <asm/kvm_ppc.h>
22 #include <asm/dcr-regs.h>
23 #include <asm/disassemble.h>
34 #define XOP_WRTEEI 163
41 static inline void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid)
43 if (vcpu->arch.pid != new_pid) {
44 vcpu->arch.pid = new_pid;
45 vcpu->arch.swap_pid = 1;
49 static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
51 vcpu->arch.pc = vcpu->arch.srr0;
52 kvmppc_set_msr(vcpu, vcpu->arch.srr1);
55 int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
56 unsigned int inst, int *advance)
58 int emulated = EMULATE_DONE;
67 switch (get_op(inst)) {
70 switch (get_xop(inst)) {
72 kvmppc_emul_rfi(vcpu);
77 emulated = EMULATE_FAIL;
83 switch (get_xop(inst)) {
87 vcpu->arch.gpr[rt] = vcpu->arch.msr;
92 kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]);
97 vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
98 | (vcpu->arch.gpr[rs] & MSR_EE);
102 vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
107 dcrn = get_dcrn(inst);
110 /* The guest may access CPR0 registers to determine the timebase
111 * frequency, and it must know the real host frequency because it
112 * can directly access the timebase registers.
114 * It would be possible to emulate those accesses in userspace,
115 * but userspace can really only figure out the end frequency.
116 * We could decompose that into the factors that compute it, but
117 * that's tricky math, and it's easier to just report the real
121 case DCRN_CPR0_CONFIG_ADDR:
122 vcpu->arch.gpr[rt] = vcpu->arch.cpr0_cfgaddr;
124 case DCRN_CPR0_CONFIG_DATA:
126 mtdcr(DCRN_CPR0_CONFIG_ADDR,
127 vcpu->arch.cpr0_cfgaddr);
128 vcpu->arch.gpr[rt] = mfdcr(DCRN_CPR0_CONFIG_DATA);
132 run->dcr.dcrn = dcrn;
134 run->dcr.is_write = 0;
135 vcpu->arch.io_gpr = rt;
136 vcpu->arch.dcr_needed = 1;
137 emulated = EMULATE_DO_DCR;
143 dcrn = get_dcrn(inst);
146 /* emulate some access in kernel */
148 case DCRN_CPR0_CONFIG_ADDR:
149 vcpu->arch.cpr0_cfgaddr = vcpu->arch.gpr[rs];
152 run->dcr.dcrn = dcrn;
153 run->dcr.data = vcpu->arch.gpr[rs];
154 run->dcr.is_write = 1;
155 vcpu->arch.dcr_needed = 1;
156 emulated = EMULATE_DO_DCR;
165 emulated = kvmppc_44x_emul_tlbwe(vcpu, ra, rs, ws);
173 emulated = kvmppc_44x_emul_tlbsx(vcpu, rt, ra, rb, rc);
180 emulated = EMULATE_FAIL;
186 emulated = EMULATE_FAIL;
192 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
196 vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break;
198 kvmppc_set_pid(vcpu, vcpu->arch.gpr[rs]); break;
200 vcpu->arch.ccr0 = vcpu->arch.gpr[rs]; break;
202 vcpu->arch.ccr1 = vcpu->arch.gpr[rs]; break;
204 vcpu->arch.dear = vcpu->arch.gpr[rs]; break;
206 vcpu->arch.esr = vcpu->arch.gpr[rs]; break;
208 vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break;
210 vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break;
212 vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break;
214 vcpu->arch.tcr = vcpu->arch.gpr[rs];
215 kvmppc_emulate_dec(vcpu);
218 /* Note: SPRG4-7 are user-readable. These values are
219 * loaded into the real SPRGs when resuming the
222 vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break;
224 vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break;
226 vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break;
228 vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break;
231 vcpu->arch.ivpr = vcpu->arch.gpr[rs];
234 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs];
237 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs];
240 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs];
243 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs];
246 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs];
249 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs];
252 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs];
255 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs];
258 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs];
261 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs];
264 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs];
267 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs];
270 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs];
273 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs];
276 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs];
279 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs];
289 int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
294 vcpu->arch.gpr[rt] = vcpu->arch.mmucr; break;
296 vcpu->arch.gpr[rt] = vcpu->arch.ccr0; break;
298 vcpu->arch.gpr[rt] = vcpu->arch.ccr1; break;
302 vcpu->arch.gpr[rt] = vcpu->arch.pid; break;
304 vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break;
306 vcpu->arch.gpr[rt] = vcpu->arch.dear; break;
308 vcpu->arch.gpr[rt] = vcpu->arch.esr; break;
310 vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break;
312 vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break;
315 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
318 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
321 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
324 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
327 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
330 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
333 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
336 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
339 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
342 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
345 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
348 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
351 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
354 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
357 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
360 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];