2 * Copyright (C) 2010 SUSE Linux Products GmbH. All rights reserved.
5 * Alexander Graf <agraf@suse.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2, as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
21 #include <linux/kvm_host.h>
23 #include <asm/kvm_ppc.h>
24 #include <asm/kvm_book3s.h>
25 #include <asm/mmu-hash32.h>
26 #include <asm/machdep.h>
27 #include <asm/mmu_context.h>
28 #include <asm/hw_irq.h>
30 /* #define DEBUG_MMU */
31 /* #define DEBUG_SR */
34 #define dprintk_mmu(a, ...) printk(KERN_INFO a, __VA_ARGS__)
36 #define dprintk_mmu(a, ...) do { } while(0)
40 #define dprintk_sr(a, ...) printk(KERN_INFO a, __VA_ARGS__)
42 #define dprintk_sr(a, ...) do { } while(0)
46 #error Unknown page size
50 #error XXX need to grab mmu_hash_lock
53 #ifdef CONFIG_PTE_64BIT
54 #error Only 32 bit pages are supported for now
60 void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte)
64 /* Remove from host HTAB */
65 pteg = (u32*)pte->slot;
68 /* And make sure it's gone from the TLB too */
69 asm volatile ("sync");
70 asm volatile ("tlbie %0" : : "r" (pte->pte.eaddr) : "memory");
71 asm volatile ("sync");
72 asm volatile ("tlbsync");
75 /* We keep 512 gvsid->hvsid entries, mapping the guest ones to the array using
76 * a hash, so we don't waste cycles on looping */
77 static u16 kvmppc_sid_hash(struct kvm_vcpu *vcpu, u64 gvsid)
79 return (u16)(((gvsid >> (SID_MAP_BITS * 7)) & SID_MAP_MASK) ^
80 ((gvsid >> (SID_MAP_BITS * 6)) & SID_MAP_MASK) ^
81 ((gvsid >> (SID_MAP_BITS * 5)) & SID_MAP_MASK) ^
82 ((gvsid >> (SID_MAP_BITS * 4)) & SID_MAP_MASK) ^
83 ((gvsid >> (SID_MAP_BITS * 3)) & SID_MAP_MASK) ^
84 ((gvsid >> (SID_MAP_BITS * 2)) & SID_MAP_MASK) ^
85 ((gvsid >> (SID_MAP_BITS * 1)) & SID_MAP_MASK) ^
86 ((gvsid >> (SID_MAP_BITS * 0)) & SID_MAP_MASK));
90 static struct kvmppc_sid_map *find_sid_vsid(struct kvm_vcpu *vcpu, u64 gvsid)
92 struct kvmppc_sid_map *map;
95 if (kvmppc_get_msr(vcpu) & MSR_PR)
98 sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
99 map = &to_book3s(vcpu)->sid_map[sid_map_mask];
100 if (map->guest_vsid == gvsid) {
101 dprintk_sr("SR: Searching 0x%llx -> 0x%llx\n",
102 gvsid, map->host_vsid);
106 map = &to_book3s(vcpu)->sid_map[SID_MAP_MASK - sid_map_mask];
107 if (map->guest_vsid == gvsid) {
108 dprintk_sr("SR: Searching 0x%llx -> 0x%llx\n",
109 gvsid, map->host_vsid);
113 dprintk_sr("SR: Searching 0x%llx -> not found\n", gvsid);
117 static u32 *kvmppc_mmu_get_pteg(struct kvm_vcpu *vcpu, u32 vsid, u32 eaddr,
123 page = (eaddr & ~ESID_MASK) >> 12;
125 hash = ((vsid ^ page) << 6);
133 dprintk_mmu("htab: %lx | hash: %x | htabmask: %x | pteg: %lx\n",
134 htab, hash, htabmask, pteg);
141 int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte,
147 struct kvmppc_sid_map *map;
149 u32 eaddr = orig_pte->eaddr;
152 bool primary = false;
154 struct hpte_cache *pte;
158 /* Get host physical address for gpa */
159 hpaddr = kvmppc_gpa_to_pfn(vcpu, orig_pte->raddr, iswrite, &writable);
160 if (is_error_noslot_pfn(hpaddr)) {
161 printk(KERN_INFO "Couldn't get guest page for gpa %lx!\n",
166 hpaddr <<= PAGE_SHIFT;
168 /* and write the mapping ea -> hpa into the pt */
169 vcpu->arch.mmu.esid_to_vsid(vcpu, orig_pte->eaddr >> SID_SHIFT, &vsid);
170 map = find_sid_vsid(vcpu, vsid);
172 kvmppc_mmu_map_segment(vcpu, eaddr);
173 map = find_sid_vsid(vcpu, vsid);
177 vsid = map->host_vsid;
178 vpn = (vsid << (SID_SHIFT - VPN_SHIFT)) |
179 ((eaddr & ~ESID_MASK) >> VPN_SHIFT);
187 pteg = kvmppc_mmu_get_pteg(vcpu, vsid, eaddr, primary);
189 /* not evicting yet */
190 if (!evict && (pteg[rr] & PTE_V)) {
195 dprintk_mmu("KVM: old PTEG: %p (%d)\n", pteg, rr);
196 dprintk_mmu("KVM: %08x - %08x\n", pteg[0], pteg[1]);
197 dprintk_mmu("KVM: %08x - %08x\n", pteg[2], pteg[3]);
198 dprintk_mmu("KVM: %08x - %08x\n", pteg[4], pteg[5]);
199 dprintk_mmu("KVM: %08x - %08x\n", pteg[6], pteg[7]);
200 dprintk_mmu("KVM: %08x - %08x\n", pteg[8], pteg[9]);
201 dprintk_mmu("KVM: %08x - %08x\n", pteg[10], pteg[11]);
202 dprintk_mmu("KVM: %08x - %08x\n", pteg[12], pteg[13]);
203 dprintk_mmu("KVM: %08x - %08x\n", pteg[14], pteg[15]);
205 pteg0 = ((eaddr & 0x0fffffff) >> 22) | (vsid << 7) | PTE_V |
206 (primary ? 0 : PTE_SEC);
207 pteg1 = hpaddr | PTE_M | PTE_R | PTE_C;
209 if (orig_pte->may_write && writable) {
211 mark_page_dirty(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT);
216 if (orig_pte->may_execute)
217 kvmppc_mmu_flush_icache(hpaddr >> PAGE_SHIFT);
223 asm volatile ("sync");
225 pteg[rr + 1] = pteg1;
227 asm volatile ("sync");
231 dprintk_mmu("KVM: new PTEG: %p\n", pteg);
232 dprintk_mmu("KVM: %08x - %08x\n", pteg[0], pteg[1]);
233 dprintk_mmu("KVM: %08x - %08x\n", pteg[2], pteg[3]);
234 dprintk_mmu("KVM: %08x - %08x\n", pteg[4], pteg[5]);
235 dprintk_mmu("KVM: %08x - %08x\n", pteg[6], pteg[7]);
236 dprintk_mmu("KVM: %08x - %08x\n", pteg[8], pteg[9]);
237 dprintk_mmu("KVM: %08x - %08x\n", pteg[10], pteg[11]);
238 dprintk_mmu("KVM: %08x - %08x\n", pteg[12], pteg[13]);
239 dprintk_mmu("KVM: %08x - %08x\n", pteg[14], pteg[15]);
242 /* Now tell our Shadow PTE code about the new page */
244 pte = kvmppc_mmu_hpte_cache_next(vcpu);
246 kvm_release_pfn_clean(hpaddr >> PAGE_SHIFT);
251 dprintk_mmu("KVM: %c%c Map 0x%llx: [%lx] 0x%llx (0x%llx) -> %lx\n",
252 orig_pte->may_write ? 'w' : '-',
253 orig_pte->may_execute ? 'x' : '-',
254 orig_pte->eaddr, (ulong)pteg, vpn,
255 orig_pte->vpage, hpaddr);
257 pte->slot = (ulong)&pteg[rr];
259 pte->pte = *orig_pte;
260 pte->pfn = hpaddr >> PAGE_SHIFT;
262 kvmppc_mmu_hpte_cache_map(vcpu, pte);
264 kvm_release_pfn_clean(hpaddr >> PAGE_SHIFT);
269 void kvmppc_mmu_unmap_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
271 kvmppc_mmu_pte_vflush(vcpu, pte->vpage, 0xfffffffffULL);
274 static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
276 struct kvmppc_sid_map *map;
277 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
279 static int backwards_map = 0;
281 if (kvmppc_get_msr(vcpu) & MSR_PR)
284 /* We might get collisions that trap in preceding order, so let's
285 map them differently */
287 sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
289 sid_map_mask = SID_MAP_MASK - sid_map_mask;
291 map = &to_book3s(vcpu)->sid_map[sid_map_mask];
293 /* Make sure we're taking the other map next time */
294 backwards_map = !backwards_map;
296 /* Uh-oh ... out of mappings. Let's flush! */
297 if (vcpu_book3s->vsid_next >= VSID_POOL_SIZE) {
298 vcpu_book3s->vsid_next = 0;
299 memset(vcpu_book3s->sid_map, 0,
300 sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);
301 kvmppc_mmu_pte_flush(vcpu, 0, 0);
302 kvmppc_mmu_flush_segments(vcpu);
304 map->host_vsid = vcpu_book3s->vsid_pool[vcpu_book3s->vsid_next];
305 vcpu_book3s->vsid_next++;
307 map->guest_vsid = gvsid;
313 int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr)
315 u32 esid = eaddr >> SID_SHIFT;
318 struct kvmppc_sid_map *map;
319 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
322 if (vcpu->arch.mmu.esid_to_vsid(vcpu, esid, &gvsid)) {
323 /* Invalidate an entry */
324 svcpu->sr[esid] = SR_INVALID;
329 map = find_sid_vsid(vcpu, gvsid);
331 map = create_sid_map(vcpu, gvsid);
333 map->guest_esid = esid;
334 sr = map->host_vsid | SR_KP;
335 svcpu->sr[esid] = sr;
337 dprintk_sr("MMU: mtsr %d, 0x%x\n", esid, sr);
344 void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu)
347 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
349 dprintk_sr("MMU: flushing all segments (%d)\n", ARRAY_SIZE(svcpu->sr));
350 for (i = 0; i < ARRAY_SIZE(svcpu->sr); i++)
351 svcpu->sr[i] = SR_INVALID;
356 void kvmppc_mmu_destroy_pr(struct kvm_vcpu *vcpu)
360 kvmppc_mmu_hpte_destroy(vcpu);
362 for (i = 0; i < SID_CONTEXTS; i++)
363 __destroy_context(to_book3s(vcpu)->context_id[i]);
367 /* From mm/mmu_context_hash32.c */
368 #define CTX_TO_VSID(c, id) ((((c) * (897 * 16)) + (id * 0x111)) & 0xffffff)
370 int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
372 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
378 for (i = 0; i < SID_CONTEXTS; i++) {
379 err = __init_new_context();
382 vcpu3s->context_id[i] = err;
384 /* Remember context id for this combination */
385 for (j = 0; j < 16; j++)
386 vcpu3s->vsid_pool[(i * 16) + j] = CTX_TO_VSID(err, j);
389 vcpu3s->vsid_next = 0;
391 /* Remember where the HTAB is */
392 asm ( "mfsdr1 %0" : "=r"(sdr1) );
393 htabmask = ((sdr1 & 0x1FF) << 16) | 0xFFC0;
394 htab = (ulong)__va(sdr1 & 0xffff0000);
396 kvmppc_mmu_hpte_init(vcpu);
401 for (j = 0; j < i; j++) {
402 if (!vcpu3s->context_id[j])
405 __destroy_context(to_book3s(vcpu)->context_id[j]);