2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright SUSE Linux Products GmbH 2009
17 * Authors: Alexander Graf <agraf@suse.de>
20 #include <linux/types.h>
21 #include <linux/string.h>
22 #include <linux/kvm.h>
23 #include <linux/kvm_host.h>
24 #include <linux/highmem.h>
26 #include <asm/tlbflush.h>
27 #include <asm/kvm_ppc.h>
28 #include <asm/kvm_book3s.h>
29 #include <asm/book3s/64/mmu-hash.h>
31 /* #define DEBUG_MMU */
34 #define dprintk(X...) printk(KERN_INFO X)
36 #define dprintk(X...) do { } while(0)
39 static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
41 kvmppc_set_msr(vcpu, vcpu->arch.intr_msr);
44 static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
45 struct kvm_vcpu *vcpu,
49 u64 esid = GET_ESID(eaddr);
50 u64 esid_1t = GET_ESID_1T(eaddr);
52 for (i = 0; i < vcpu->arch.slb_nr; i++) {
55 if (!vcpu->arch.slb[i].valid)
58 if (vcpu->arch.slb[i].tb)
61 if (vcpu->arch.slb[i].esid == cmp_esid)
62 return &vcpu->arch.slb[i];
65 dprintk("KVM: No SLB entry found for 0x%lx [%llx | %llx]\n",
66 eaddr, esid, esid_1t);
67 for (i = 0; i < vcpu->arch.slb_nr; i++) {
68 if (vcpu->arch.slb[i].vsid)
69 dprintk(" %d: %c%c%c %llx %llx\n", i,
70 vcpu->arch.slb[i].valid ? 'v' : ' ',
71 vcpu->arch.slb[i].large ? 'l' : ' ',
72 vcpu->arch.slb[i].tb ? 't' : ' ',
73 vcpu->arch.slb[i].esid,
74 vcpu->arch.slb[i].vsid);
80 static int kvmppc_slb_sid_shift(struct kvmppc_slb *slbe)
82 return slbe->tb ? SID_SHIFT_1T : SID_SHIFT;
85 static u64 kvmppc_slb_offset_mask(struct kvmppc_slb *slbe)
87 return (1ul << kvmppc_slb_sid_shift(slbe)) - 1;
90 static u64 kvmppc_slb_calc_vpn(struct kvmppc_slb *slb, gva_t eaddr)
92 eaddr &= kvmppc_slb_offset_mask(slb);
94 return (eaddr >> VPN_SHIFT) |
95 ((slb->vsid) << (kvmppc_slb_sid_shift(slb) - VPN_SHIFT));
98 static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
101 struct kvmppc_slb *slb;
103 slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
107 return kvmppc_slb_calc_vpn(slb, eaddr);
110 static int mmu_pagesize(int mmu_pg)
121 static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe)
123 return mmu_pagesize(slbe->base_page_size);
126 static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr)
128 int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
130 return ((eaddr & kvmppc_slb_offset_mask(slbe)) >> p);
133 static hva_t kvmppc_mmu_book3s_64_get_pteg(struct kvm_vcpu *vcpu,
134 struct kvmppc_slb *slbe, gva_t eaddr,
137 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
138 u64 hash, pteg, htabsize;
143 htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1);
145 vpn = kvmppc_slb_calc_vpn(slbe, eaddr);
146 ssize = slbe->tb ? MMU_SEGSIZE_1T : MMU_SEGSIZE_256M;
147 hash = hpt_hash(vpn, kvmppc_mmu_book3s_64_get_pagesize(slbe), ssize);
150 hash &= ((1ULL << 39ULL) - 1ULL);
154 pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
157 dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
158 page, vcpu_book3s->sdr1, pteg, slbe->vsid);
160 /* When running a PAPR guest, SDR1 contains a HVA address instead
162 if (vcpu->arch.papr_enabled)
165 r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
167 if (kvm_is_error_hva(r))
169 return r | (pteg & ~PAGE_MASK);
172 static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr)
174 int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
177 avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
178 avpn |= slbe->vsid << (kvmppc_slb_sid_shift(slbe) - p);
181 avpn >>= ((80 - p) - 56) - 8; /* 16 - p */
189 * Return page size encoded in the second word of a HPTE, or
190 * -1 for an invalid encoding for the base page size indicated by
191 * the SLB entry. This doesn't handle mixed pagesize segments yet.
193 static int decode_pagesize(struct kvmppc_slb *slbe, u64 r)
195 switch (slbe->base_page_size) {
197 if ((r & 0xf000) == 0x1000)
201 if ((r & 0xff000) == 0)
208 static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
209 struct kvmppc_pte *gpte, bool data,
212 struct kvmppc_slb *slbe;
224 ulong mp_ea = vcpu->arch.magic_page_ea;
226 /* Magic page override */
227 if (unlikely(mp_ea) &&
228 unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
229 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
231 gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
232 gpte->raddr = vcpu->arch.magic_page_pa | (gpte->raddr & 0xfff);
233 gpte->raddr &= KVM_PAM;
234 gpte->may_execute = true;
235 gpte->may_read = true;
236 gpte->may_write = true;
237 gpte->page_size = MMU_PAGE_4K;
242 slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
246 avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr);
247 v_val = avpn & HPTE_V_AVPN;
250 v_val |= SLB_VSID_B_1T;
252 v_val |= HPTE_V_LARGE;
253 v_val |= HPTE_V_VALID;
255 v_mask = SLB_VSID_B | HPTE_V_AVPN | HPTE_V_LARGE | HPTE_V_VALID |
258 pgsize = slbe->large ? MMU_PAGE_16M : MMU_PAGE_4K;
260 mutex_lock(&vcpu->kvm->arch.hpt_mutex);
263 ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu, slbe, eaddr, second);
264 if (kvm_is_error_hva(ptegp))
267 if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
268 printk_ratelimited(KERN_ERR
269 "KVM: Can't copy data from 0x%lx!\n", ptegp);
273 if ((kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Kp)
275 else if (!(kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Ks)
278 for (i=0; i<16; i+=2) {
279 u64 pte0 = be64_to_cpu(pteg[i]);
280 u64 pte1 = be64_to_cpu(pteg[i + 1]);
282 /* Check all relevant fields of 1st dword */
283 if ((pte0 & v_mask) == v_val) {
284 /* If large page bit is set, check pgsize encoding */
286 (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
287 pgsize = decode_pagesize(slbe, pte1);
299 v_val |= HPTE_V_SECONDARY;
304 v = be64_to_cpu(pteg[i]);
305 r = be64_to_cpu(pteg[i+1]);
306 pp = (r & HPTE_R_PP) | key;
311 gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
313 eaddr_mask = (1ull << mmu_pagesize(pgsize)) - 1;
314 gpte->raddr = (r & HPTE_R_RPN & ~eaddr_mask) | (eaddr & eaddr_mask);
315 gpte->page_size = pgsize;
316 gpte->may_execute = ((r & HPTE_R_N) ? false : true);
317 if (unlikely(vcpu->arch.disable_kernel_nx) &&
318 !(kvmppc_get_msr(vcpu) & MSR_PR))
319 gpte->may_execute = true;
320 gpte->may_read = false;
321 gpte->may_write = false;
328 gpte->may_write = true;
334 gpte->may_read = true;
338 dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx "
340 eaddr, avpn, gpte->vpage, gpte->raddr);
342 /* Update PTE R and C bits, so the guest's swapper knows we used the
344 if (gpte->may_read && !(r & HPTE_R_R)) {
346 * Set the accessed flag.
347 * We have to write this back with a single byte write
348 * because another vcpu may be accessing this on
349 * non-PAPR platforms such as mac99, and this is
350 * what real hardware does.
352 char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64));
354 put_user(r >> 8, addr + 6);
356 if (iswrite && gpte->may_write && !(r & HPTE_R_C)) {
357 /* Set the dirty flag */
358 /* Use a single byte write */
359 char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64));
361 put_user(r, addr + 7);
364 mutex_unlock(&vcpu->kvm->arch.hpt_mutex);
366 if (!gpte->may_read || (iswrite && !gpte->may_write))
371 mutex_unlock(&vcpu->kvm->arch.hpt_mutex);
375 dprintk("KVM MMU: Trigger segment fault\n");
379 static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
383 struct kvmppc_slb *slbe;
385 dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb);
388 esid_1t = GET_ESID_1T(rb);
391 if (slb_nr > vcpu->arch.slb_nr)
394 slbe = &vcpu->arch.slb[slb_nr];
396 slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
397 slbe->tb = (rs & SLB_VSID_B_1T) ? 1 : 0;
398 slbe->esid = slbe->tb ? esid_1t : esid;
399 slbe->vsid = (rs & ~SLB_VSID_B) >> (kvmppc_slb_sid_shift(slbe) - 16);
400 slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
401 slbe->Ks = (rs & SLB_VSID_KS) ? 1 : 0;
402 slbe->Kp = (rs & SLB_VSID_KP) ? 1 : 0;
403 slbe->nx = (rs & SLB_VSID_N) ? 1 : 0;
404 slbe->class = (rs & SLB_VSID_C) ? 1 : 0;
406 slbe->base_page_size = MMU_PAGE_4K;
408 if (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE) {
409 switch (rs & SLB_VSID_LP) {
411 slbe->base_page_size = MMU_PAGE_16M;
414 slbe->base_page_size = MMU_PAGE_64K;
418 slbe->base_page_size = MMU_PAGE_16M;
421 slbe->orige = rb & (ESID_MASK | SLB_ESID_V);
424 /* Map the new segment */
425 kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT);
428 static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr)
430 struct kvmppc_slb *slbe;
432 if (slb_nr > vcpu->arch.slb_nr)
435 slbe = &vcpu->arch.slb[slb_nr];
440 static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr)
442 struct kvmppc_slb *slbe;
444 if (slb_nr > vcpu->arch.slb_nr)
447 slbe = &vcpu->arch.slb[slb_nr];
452 static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea)
454 struct kvmppc_slb *slbe;
457 dprintk("KVM MMU: slbie(0x%llx)\n", ea);
459 slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
464 dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid);
470 seg_size = 1ull << kvmppc_slb_sid_shift(slbe);
471 kvmppc_mmu_flush_segment(vcpu, ea & ~(seg_size - 1), seg_size);
474 static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
478 dprintk("KVM MMU: slbia()\n");
480 for (i = 1; i < vcpu->arch.slb_nr; i++) {
481 vcpu->arch.slb[i].valid = false;
482 vcpu->arch.slb[i].orige = 0;
483 vcpu->arch.slb[i].origv = 0;
486 if (kvmppc_get_msr(vcpu) & MSR_IR) {
487 kvmppc_mmu_flush_segments(vcpu);
488 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
492 static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
498 * According to Book3 2.01 mtsrin is implemented as:
500 * The SLB entry specified by (RB)32:35 is loaded from register
503 * SLBE Bit Source SLB Field
505 * 0:31 0x0000_0000 ESID-0:31
506 * 32:35 (RB)32:35 ESID-32:35
508 * 37:61 0x00_0000|| 0b0 VSID-0:24
509 * 62:88 (RS)37:63 VSID-25:51
510 * 89:91 (RS)33:35 Ks Kp N
511 * 92 (RS)36 L ((RS)36 must be 0b0)
515 dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);
518 rb |= (srnum & 0xf) << 28;
519 /* Set the valid bit */
525 rs |= (value & 0xfffffff) << 12;
527 rs |= ((value >> 28) & 0x7) << 9;
529 kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
532 static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va,
535 u64 mask = 0xFFFFFFFFFULL;
539 dprintk("KVM MMU: tlbie(0x%lx)\n", va);
542 * The tlbie instruction changed behaviour starting with
543 * POWER6. POWER6 and later don't have the large page flag
544 * in the instruction but in the RB value, along with bits
545 * indicating page and segment sizes.
547 if (vcpu->arch.hflags & BOOK3S_HFLAG_NEW_TLBIE) {
548 /* POWER6 or later */
549 if (va & 1) { /* L bit */
550 if ((va & 0xf000) == 0x1000)
551 mask = 0xFFFFFFFF0ULL; /* 64k page */
553 mask = 0xFFFFFF000ULL; /* 16M page */
556 /* older processors, e.g. PPC970 */
558 mask = 0xFFFFFF000ULL;
560 /* flush this VA on all vcpus */
561 kvm_for_each_vcpu(i, v, vcpu->kvm)
562 kvmppc_mmu_pte_vflush(v, va >> 12, mask);
565 #ifdef CONFIG_PPC_64K_PAGES
566 static int segment_contains_magic_page(struct kvm_vcpu *vcpu, ulong esid)
568 ulong mp_ea = vcpu->arch.magic_page_ea;
570 return mp_ea && !(kvmppc_get_msr(vcpu) & MSR_PR) &&
571 (mp_ea >> SID_SHIFT) == esid;
575 static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
578 ulong ea = esid << SID_SHIFT;
579 struct kvmppc_slb *slb;
581 ulong mp_ea = vcpu->arch.magic_page_ea;
582 int pagesize = MMU_PAGE_64K;
583 u64 msr = kvmppc_get_msr(vcpu);
585 if (msr & (MSR_DR|MSR_IR)) {
586 slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
589 pagesize = slb->base_page_size;
591 gvsid <<= SID_SHIFT_1T - SID_SHIFT;
592 gvsid |= esid & ((1ul << (SID_SHIFT_1T - SID_SHIFT)) - 1);
598 switch (msr & (MSR_DR|MSR_IR)) {
600 gvsid = VSID_REAL | esid;
603 gvsid |= VSID_REAL_IR;
606 gvsid |= VSID_REAL_DR;
618 #ifdef CONFIG_PPC_64K_PAGES
620 * Mark this as a 64k segment if the host is using
621 * 64k pages, the host MMU supports 64k pages and
622 * the guest segment page size is >= 64k,
623 * but not if this segment contains the magic page.
625 if (pagesize >= MMU_PAGE_64K &&
626 mmu_psize_defs[MMU_PAGE_64K].shift &&
627 !segment_contains_magic_page(vcpu, esid))
631 if (kvmppc_get_msr(vcpu) & MSR_PR)
638 /* Catch magic page case */
639 if (unlikely(mp_ea) &&
640 unlikely(esid == (mp_ea >> SID_SHIFT)) &&
641 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
642 *vsid = VSID_REAL | esid;
649 static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
651 return (to_book3s(vcpu)->hid[5] & 0x80);
654 void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu)
656 struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
659 mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin;
660 mmu->slbmte = kvmppc_mmu_book3s_64_slbmte;
661 mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee;
662 mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev;
663 mmu->slbie = kvmppc_mmu_book3s_64_slbie;
664 mmu->slbia = kvmppc_mmu_book3s_64_slbia;
665 mmu->xlate = kvmppc_mmu_book3s_64_xlate;
666 mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr;
667 mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
668 mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid;
669 mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp;
670 mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32;
672 vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;