2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright Novell Inc 2010
17 * Authors: Alexander Graf <agraf@suse.de>
21 #include <asm/kvm_ppc.h>
22 #include <asm/disassemble.h>
23 #include <asm/kvm_book3s.h>
24 #include <asm/kvm_fpu.h>
26 #include <asm/cacheflush.h>
27 #include <linux/vmalloc.h>
32 #define dprintk printk
34 #define dprintk(...) do { } while(0);
50 #define OP_31_LFSX 535
51 #define OP_31_LFSUX 567
52 #define OP_31_LFDX 599
53 #define OP_31_LFDUX 631
54 #define OP_31_STFSX 663
55 #define OP_31_STFSUX 695
56 #define OP_31_STFX 727
57 #define OP_31_STFUX 759
58 #define OP_31_LWIZX 887
59 #define OP_31_STFIWX 983
61 #define OP_59_FADDS 21
62 #define OP_59_FSUBS 20
63 #define OP_59_FSQRTS 22
64 #define OP_59_FDIVS 18
66 #define OP_59_FMULS 25
67 #define OP_59_FRSQRTES 26
68 #define OP_59_FMSUBS 28
69 #define OP_59_FMADDS 29
70 #define OP_59_FNMSUBS 30
71 #define OP_59_FNMADDS 31
74 #define OP_63_FCPSGN 8
76 #define OP_63_FCTIW 14
77 #define OP_63_FCTIWZ 15
80 #define OP_63_FSQRT 22
84 #define OP_63_FRSQRTE 26
85 #define OP_63_FMSUB 28
86 #define OP_63_FMADD 29
87 #define OP_63_FNMSUB 30
88 #define OP_63_FNMADD 31
89 #define OP_63_FCMPO 32
90 #define OP_63_MTFSB1 38 // XXX
93 #define OP_63_MCRFS 64
94 #define OP_63_MTFSB0 70
96 #define OP_63_MTFSFI 134
97 #define OP_63_FABS 264
98 #define OP_63_MFFS 583
99 #define OP_63_MTFSF 711
101 #define OP_4X_PS_CMPU0 0
102 #define OP_4X_PSQ_LX 6
103 #define OP_4XW_PSQ_STX 7
104 #define OP_4A_PS_SUM0 10
105 #define OP_4A_PS_SUM1 11
106 #define OP_4A_PS_MULS0 12
107 #define OP_4A_PS_MULS1 13
108 #define OP_4A_PS_MADDS0 14
109 #define OP_4A_PS_MADDS1 15
110 #define OP_4A_PS_DIV 18
111 #define OP_4A_PS_SUB 20
112 #define OP_4A_PS_ADD 21
113 #define OP_4A_PS_SEL 23
114 #define OP_4A_PS_RES 24
115 #define OP_4A_PS_MUL 25
116 #define OP_4A_PS_RSQRTE 26
117 #define OP_4A_PS_MSUB 28
118 #define OP_4A_PS_MADD 29
119 #define OP_4A_PS_NMSUB 30
120 #define OP_4A_PS_NMADD 31
121 #define OP_4X_PS_CMPO0 32
122 #define OP_4X_PSQ_LUX 38
123 #define OP_4XW_PSQ_STUX 39
124 #define OP_4X_PS_NEG 40
125 #define OP_4X_PS_CMPU1 64
126 #define OP_4X_PS_MR 72
127 #define OP_4X_PS_CMPO1 96
128 #define OP_4X_PS_NABS 136
129 #define OP_4X_PS_ABS 264
130 #define OP_4X_PS_MERGE00 528
131 #define OP_4X_PS_MERGE01 560
132 #define OP_4X_PS_MERGE10 592
133 #define OP_4X_PS_MERGE11 624
135 #define SCALAR_NONE 0
136 #define SCALAR_HIGH (1 << 0)
137 #define SCALAR_LOW (1 << 1)
138 #define SCALAR_NO_PS0 (1 << 2)
139 #define SCALAR_NO_PS1 (1 << 3)
141 #define GQR_ST_TYPE_MASK 0x00000007
142 #define GQR_ST_TYPE_SHIFT 0
143 #define GQR_ST_SCALE_MASK 0x00003f00
144 #define GQR_ST_SCALE_SHIFT 8
145 #define GQR_LD_TYPE_MASK 0x00070000
146 #define GQR_LD_TYPE_SHIFT 16
147 #define GQR_LD_SCALE_MASK 0x3f000000
148 #define GQR_LD_SCALE_SHIFT 24
150 #define GQR_QUANTIZE_FLOAT 0
151 #define GQR_QUANTIZE_U8 4
152 #define GQR_QUANTIZE_U16 5
153 #define GQR_QUANTIZE_S8 6
154 #define GQR_QUANTIZE_S16 7
156 #define FPU_LS_SINGLE 0
157 #define FPU_LS_DOUBLE 1
158 #define FPU_LS_SINGLE_LOW 2
160 static inline void kvmppc_sync_qpr(struct kvm_vcpu *vcpu, int rt)
162 kvm_cvt_df(&vcpu->arch.fpr[rt], &vcpu->arch.qpr[rt]);
165 static void kvmppc_inject_pf(struct kvm_vcpu *vcpu, ulong eaddr, bool is_store)
169 vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 33, 36, 0);
170 vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 42, 47, 0);
171 vcpu->arch.dear = eaddr;
173 dsisr = kvmppc_set_field(0, 33, 33, 1);
175 to_book3s(vcpu)->dsisr = kvmppc_set_field(dsisr, 38, 38, 1);
176 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE);
179 static int kvmppc_emulate_fpr_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
180 int rs, ulong addr, int ls_type)
182 int emulated = EMULATE_FAIL;
185 int len = sizeof(u32);
187 if (ls_type == FPU_LS_DOUBLE)
190 /* read from memory */
191 r = kvmppc_ld(vcpu, &addr, len, tmp, true);
192 vcpu->arch.paddr_accessed = addr;
195 kvmppc_inject_pf(vcpu, addr, false);
197 } else if (r == EMULATE_DO_MMIO) {
198 emulated = kvmppc_handle_load(run, vcpu, KVM_REG_FPR | rs, len, 1);
202 emulated = EMULATE_DONE;
204 /* put in registers */
207 kvm_cvt_fd((u32*)tmp, &vcpu->arch.fpr[rs]);
208 vcpu->arch.qpr[rs] = *((u32*)tmp);
211 vcpu->arch.fpr[rs] = *((u64*)tmp);
215 dprintk(KERN_INFO "KVM: FPR_LD [0x%llx] at 0x%lx (%d)\n", *(u64*)tmp,
222 static int kvmppc_emulate_fpr_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
223 int rs, ulong addr, int ls_type)
225 int emulated = EMULATE_FAIL;
233 kvm_cvt_df(&vcpu->arch.fpr[rs], (u32*)tmp);
237 case FPU_LS_SINGLE_LOW:
238 *((u32*)tmp) = vcpu->arch.fpr[rs];
239 val = vcpu->arch.fpr[rs] & 0xffffffff;
243 *((u64*)tmp) = vcpu->arch.fpr[rs];
244 val = vcpu->arch.fpr[rs];
252 r = kvmppc_st(vcpu, &addr, len, tmp, true);
253 vcpu->arch.paddr_accessed = addr;
255 kvmppc_inject_pf(vcpu, addr, true);
256 } else if (r == EMULATE_DO_MMIO) {
257 emulated = kvmppc_handle_store(run, vcpu, val, len, 1);
259 emulated = EMULATE_DONE;
262 dprintk(KERN_INFO "KVM: FPR_ST [0x%llx] at 0x%lx (%d)\n",
268 static int kvmppc_emulate_psq_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
269 int rs, ulong addr, bool w, int i)
271 int emulated = EMULATE_FAIL;
276 /* read from memory */
278 r = kvmppc_ld(vcpu, &addr, sizeof(u32), tmp, true);
279 memcpy(&tmp[1], &one, sizeof(u32));
281 r = kvmppc_ld(vcpu, &addr, sizeof(u32) * 2, tmp, true);
283 vcpu->arch.paddr_accessed = addr;
285 kvmppc_inject_pf(vcpu, addr, false);
287 } else if ((r == EMULATE_DO_MMIO) && w) {
288 emulated = kvmppc_handle_load(run, vcpu, KVM_REG_FPR | rs, 4, 1);
289 vcpu->arch.qpr[rs] = tmp[1];
291 } else if (r == EMULATE_DO_MMIO) {
292 emulated = kvmppc_handle_load(run, vcpu, KVM_REG_FQPR | rs, 8, 1);
296 emulated = EMULATE_DONE;
298 /* put in registers */
299 kvm_cvt_fd(&tmp[0], &vcpu->arch.fpr[rs]);
300 vcpu->arch.qpr[rs] = tmp[1];
302 dprintk(KERN_INFO "KVM: PSQ_LD [0x%x, 0x%x] at 0x%lx (%d)\n", tmp[0],
303 tmp[1], addr, w ? 4 : 8);
309 static int kvmppc_emulate_psq_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
310 int rs, ulong addr, bool w, int i)
312 int emulated = EMULATE_FAIL;
315 int len = w ? sizeof(u32) : sizeof(u64);
317 kvm_cvt_df(&vcpu->arch.fpr[rs], &tmp[0]);
318 tmp[1] = vcpu->arch.qpr[rs];
320 r = kvmppc_st(vcpu, &addr, len, tmp, true);
321 vcpu->arch.paddr_accessed = addr;
323 kvmppc_inject_pf(vcpu, addr, true);
324 } else if ((r == EMULATE_DO_MMIO) && w) {
325 emulated = kvmppc_handle_store(run, vcpu, tmp[0], 4, 1);
326 } else if (r == EMULATE_DO_MMIO) {
327 u64 val = ((u64)tmp[0] << 32) | tmp[1];
328 emulated = kvmppc_handle_store(run, vcpu, val, 8, 1);
330 emulated = EMULATE_DONE;
333 dprintk(KERN_INFO "KVM: PSQ_ST [0x%x, 0x%x] at 0x%lx (%d)\n",
334 tmp[0], tmp[1], addr, len);
340 * Cuts out inst bits with ordering according to spec.
341 * That means the leftmost bit is zero. All given bits are included.
343 static inline u32 inst_get_field(u32 inst, int msb, int lsb)
345 return kvmppc_get_field(inst, msb + 32, lsb + 32);
349 * Replaces inst bits with ordering according to spec.
351 static inline u32 inst_set_field(u32 inst, int msb, int lsb, int value)
353 return kvmppc_set_field(inst, msb + 32, lsb + 32, value);
356 bool kvmppc_inst_is_paired_single(struct kvm_vcpu *vcpu, u32 inst)
358 if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE))
361 switch (get_op(inst)) {
377 switch (inst_get_field(inst, 21, 30)) {
388 case OP_4X_PS_MERGE00:
389 case OP_4X_PS_MERGE01:
390 case OP_4X_PS_MERGE10:
391 case OP_4X_PS_MERGE11:
395 switch (inst_get_field(inst, 25, 30)) {
397 case OP_4XW_PSQ_STUX:
401 switch (inst_get_field(inst, 26, 30)) {
406 case OP_4A_PS_MADDS0:
407 case OP_4A_PS_MADDS1:
414 case OP_4A_PS_RSQRTE:
423 switch (inst_get_field(inst, 21, 30)) {
431 switch (inst_get_field(inst, 26, 30)) {
441 switch (inst_get_field(inst, 21, 30)) {
463 switch (inst_get_field(inst, 26, 30)) {
474 switch (inst_get_field(inst, 21, 30)) {
492 static int get_d_signext(u32 inst)
494 int d = inst & 0x8ff;
502 static int kvmppc_ps_three_in(struct kvm_vcpu *vcpu, bool rc,
503 int reg_out, int reg_in1, int reg_in2,
504 int reg_in3, int scalar,
505 void (*func)(u64 *fpscr,
507 u32 *src2, u32 *src3))
509 u32 *qpr = vcpu->arch.qpr;
510 u64 *fpr = vcpu->arch.fpr;
512 u32 ps0_in1, ps0_in2, ps0_in3;
513 u32 ps1_in1, ps1_in2, ps1_in3;
519 kvm_cvt_df(&fpr[reg_in1], &ps0_in1);
520 kvm_cvt_df(&fpr[reg_in2], &ps0_in2);
521 kvm_cvt_df(&fpr[reg_in3], &ps0_in3);
523 if (scalar & SCALAR_LOW)
524 ps0_in2 = qpr[reg_in2];
526 func(&vcpu->arch.fpscr, &ps0_out, &ps0_in1, &ps0_in2, &ps0_in3);
528 dprintk(KERN_INFO "PS3 ps0 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n",
529 ps0_in1, ps0_in2, ps0_in3, ps0_out);
531 if (!(scalar & SCALAR_NO_PS0))
532 kvm_cvt_fd(&ps0_out, &fpr[reg_out]);
535 ps1_in1 = qpr[reg_in1];
536 ps1_in2 = qpr[reg_in2];
537 ps1_in3 = qpr[reg_in3];
539 if (scalar & SCALAR_HIGH)
542 if (!(scalar & SCALAR_NO_PS1))
543 func(&vcpu->arch.fpscr, &qpr[reg_out], &ps1_in1, &ps1_in2, &ps1_in3);
545 dprintk(KERN_INFO "PS3 ps1 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n",
546 ps1_in1, ps1_in2, ps1_in3, qpr[reg_out]);
551 static int kvmppc_ps_two_in(struct kvm_vcpu *vcpu, bool rc,
552 int reg_out, int reg_in1, int reg_in2,
554 void (*func)(u64 *fpscr,
558 u32 *qpr = vcpu->arch.qpr;
559 u64 *fpr = vcpu->arch.fpr;
561 u32 ps0_in1, ps0_in2;
563 u32 ps1_in1, ps1_in2;
569 kvm_cvt_df(&fpr[reg_in1], &ps0_in1);
571 if (scalar & SCALAR_LOW)
572 ps0_in2 = qpr[reg_in2];
574 kvm_cvt_df(&fpr[reg_in2], &ps0_in2);
576 func(&vcpu->arch.fpscr, &ps0_out, &ps0_in1, &ps0_in2);
578 if (!(scalar & SCALAR_NO_PS0)) {
579 dprintk(KERN_INFO "PS2 ps0 -> f(0x%x, 0x%x) = 0x%x\n",
580 ps0_in1, ps0_in2, ps0_out);
582 kvm_cvt_fd(&ps0_out, &fpr[reg_out]);
586 ps1_in1 = qpr[reg_in1];
587 ps1_in2 = qpr[reg_in2];
589 if (scalar & SCALAR_HIGH)
592 func(&vcpu->arch.fpscr, &ps1_out, &ps1_in1, &ps1_in2);
594 if (!(scalar & SCALAR_NO_PS1)) {
595 qpr[reg_out] = ps1_out;
597 dprintk(KERN_INFO "PS2 ps1 -> f(0x%x, 0x%x) = 0x%x\n",
598 ps1_in1, ps1_in2, qpr[reg_out]);
604 static int kvmppc_ps_one_in(struct kvm_vcpu *vcpu, bool rc,
605 int reg_out, int reg_in,
607 u32 *dst, u32 *src1))
609 u32 *qpr = vcpu->arch.qpr;
610 u64 *fpr = vcpu->arch.fpr;
618 kvm_cvt_df(&fpr[reg_in], &ps0_in);
619 func(&vcpu->arch.fpscr, &ps0_out, &ps0_in);
621 dprintk(KERN_INFO "PS1 ps0 -> f(0x%x) = 0x%x\n",
624 kvm_cvt_fd(&ps0_out, &fpr[reg_out]);
627 ps1_in = qpr[reg_in];
628 func(&vcpu->arch.fpscr, &qpr[reg_out], &ps1_in);
630 dprintk(KERN_INFO "PS1 ps1 -> f(0x%x) = 0x%x\n",
631 ps1_in, qpr[reg_out]);
636 int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu)
638 u32 inst = kvmppc_get_last_inst(vcpu);
639 enum emulation_result emulated = EMULATE_DONE;
641 int ax_rd = inst_get_field(inst, 6, 10);
642 int ax_ra = inst_get_field(inst, 11, 15);
643 int ax_rb = inst_get_field(inst, 16, 20);
644 int ax_rc = inst_get_field(inst, 21, 25);
645 short full_d = inst_get_field(inst, 16, 31);
647 u64 *fpr_d = &vcpu->arch.fpr[ax_rd];
648 u64 *fpr_a = &vcpu->arch.fpr[ax_ra];
649 u64 *fpr_b = &vcpu->arch.fpr[ax_rb];
650 u64 *fpr_c = &vcpu->arch.fpr[ax_rc];
652 bool rcomp = (inst & 1) ? true : false;
653 u32 cr = kvmppc_get_cr(vcpu);
658 if (!kvmppc_inst_is_paired_single(vcpu, inst))
661 if (!(vcpu->arch.msr & MSR_FP)) {
662 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL);
663 return EMULATE_AGAIN;
666 kvmppc_giveup_ext(vcpu, MSR_FP);
669 /* Do we need to clear FE0 / FE1 here? Don't think so. */
672 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) {
674 kvm_cvt_df(&vcpu->arch.fpr[i], &f);
675 dprintk(KERN_INFO "FPR[%d] = 0x%x / 0x%llx QPR[%d] = 0x%x\n",
676 i, f, vcpu->arch.fpr[i], i, vcpu->arch.qpr[i]);
680 switch (get_op(inst)) {
683 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
684 bool w = inst_get_field(inst, 16, 16) ? true : false;
685 int i = inst_get_field(inst, 17, 19);
687 addr += get_d_signext(inst);
688 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
693 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
694 bool w = inst_get_field(inst, 16, 16) ? true : false;
695 int i = inst_get_field(inst, 17, 19);
697 addr += get_d_signext(inst);
698 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
700 if (emulated == EMULATE_DONE)
701 kvmppc_set_gpr(vcpu, ax_ra, addr);
706 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
707 bool w = inst_get_field(inst, 16, 16) ? true : false;
708 int i = inst_get_field(inst, 17, 19);
710 addr += get_d_signext(inst);
711 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
716 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
717 bool w = inst_get_field(inst, 16, 16) ? true : false;
718 int i = inst_get_field(inst, 17, 19);
720 addr += get_d_signext(inst);
721 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
723 if (emulated == EMULATE_DONE)
724 kvmppc_set_gpr(vcpu, ax_ra, addr);
729 switch (inst_get_field(inst, 21, 30)) {
732 emulated = EMULATE_FAIL;
736 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
737 bool w = inst_get_field(inst, 21, 21) ? true : false;
738 int i = inst_get_field(inst, 22, 24);
740 addr += kvmppc_get_gpr(vcpu, ax_rb);
741 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
746 emulated = EMULATE_FAIL;
750 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
751 bool w = inst_get_field(inst, 21, 21) ? true : false;
752 int i = inst_get_field(inst, 22, 24);
754 addr += kvmppc_get_gpr(vcpu, ax_rb);
755 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
757 if (emulated == EMULATE_DONE)
758 kvmppc_set_gpr(vcpu, ax_ra, addr);
762 vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rb];
763 vcpu->arch.fpr[ax_rd] ^= 0x8000000000000000ULL;
764 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
765 vcpu->arch.qpr[ax_rd] ^= 0x80000000;
769 emulated = EMULATE_FAIL;
773 vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rb];
774 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
778 emulated = EMULATE_FAIL;
782 vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rb];
783 vcpu->arch.fpr[ax_rd] |= 0x8000000000000000ULL;
784 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
785 vcpu->arch.qpr[ax_rd] |= 0x80000000;
789 vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rb];
790 vcpu->arch.fpr[ax_rd] &= ~0x8000000000000000ULL;
791 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
792 vcpu->arch.qpr[ax_rd] &= ~0x80000000;
794 case OP_4X_PS_MERGE00:
796 vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_ra];
797 /* vcpu->arch.qpr[ax_rd] = vcpu->arch.fpr[ax_rb]; */
798 kvm_cvt_df(&vcpu->arch.fpr[ax_rb],
799 &vcpu->arch.qpr[ax_rd]);
801 case OP_4X_PS_MERGE01:
803 vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_ra];
804 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
806 case OP_4X_PS_MERGE10:
808 /* vcpu->arch.fpr[ax_rd] = vcpu->arch.qpr[ax_ra]; */
809 kvm_cvt_fd(&vcpu->arch.qpr[ax_ra],
810 &vcpu->arch.fpr[ax_rd]);
811 /* vcpu->arch.qpr[ax_rd] = vcpu->arch.fpr[ax_rb]; */
812 kvm_cvt_df(&vcpu->arch.fpr[ax_rb],
813 &vcpu->arch.qpr[ax_rd]);
815 case OP_4X_PS_MERGE11:
817 /* vcpu->arch.fpr[ax_rd] = vcpu->arch.qpr[ax_ra]; */
818 kvm_cvt_fd(&vcpu->arch.qpr[ax_ra],
819 &vcpu->arch.fpr[ax_rd]);
820 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
824 switch (inst_get_field(inst, 25, 30)) {
827 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
828 bool w = inst_get_field(inst, 21, 21) ? true : false;
829 int i = inst_get_field(inst, 22, 24);
831 addr += kvmppc_get_gpr(vcpu, ax_rb);
832 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
835 case OP_4XW_PSQ_STUX:
837 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
838 bool w = inst_get_field(inst, 21, 21) ? true : false;
839 int i = inst_get_field(inst, 22, 24);
841 addr += kvmppc_get_gpr(vcpu, ax_rb);
842 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
844 if (emulated == EMULATE_DONE)
845 kvmppc_set_gpr(vcpu, ax_ra, addr);
850 switch (inst_get_field(inst, 26, 30)) {
852 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
853 ax_rb, ax_ra, SCALAR_NO_PS0 | SCALAR_HIGH, fps_fadds);
854 vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_rc];
857 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
858 ax_ra, ax_rb, SCALAR_NO_PS1 | SCALAR_LOW, fps_fadds);
859 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rc];
862 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
863 ax_ra, ax_rc, SCALAR_HIGH, fps_fmuls);
866 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
867 ax_ra, ax_rc, SCALAR_LOW, fps_fmuls);
869 case OP_4A_PS_MADDS0:
870 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
871 ax_ra, ax_rc, ax_rb, SCALAR_HIGH, fps_fmadds);
873 case OP_4A_PS_MADDS1:
874 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
875 ax_ra, ax_rc, ax_rb, SCALAR_LOW, fps_fmadds);
878 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
879 ax_ra, ax_rb, SCALAR_NONE, fps_fdivs);
882 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
883 ax_ra, ax_rb, SCALAR_NONE, fps_fsubs);
886 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
887 ax_ra, ax_rb, SCALAR_NONE, fps_fadds);
890 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
891 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fsel);
894 emulated = kvmppc_ps_one_in(vcpu, rcomp, ax_rd,
898 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
899 ax_ra, ax_rc, SCALAR_NONE, fps_fmuls);
901 case OP_4A_PS_RSQRTE:
902 emulated = kvmppc_ps_one_in(vcpu, rcomp, ax_rd,
906 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
907 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fmsubs);
910 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
911 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fmadds);
914 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
915 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fnmsubs);
918 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
919 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fnmadds);
924 /* Real FPU operations */
928 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
930 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
936 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
938 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
941 if (emulated == EMULATE_DONE)
942 kvmppc_set_gpr(vcpu, ax_ra, addr);
947 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
949 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
955 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
957 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
960 if (emulated == EMULATE_DONE)
961 kvmppc_set_gpr(vcpu, ax_ra, addr);
966 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
968 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
974 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
976 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
979 if (emulated == EMULATE_DONE)
980 kvmppc_set_gpr(vcpu, ax_ra, addr);
985 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
987 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
993 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
995 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
998 if (emulated == EMULATE_DONE)
999 kvmppc_set_gpr(vcpu, ax_ra, addr);
1003 switch (inst_get_field(inst, 21, 30)) {
1006 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
1008 addr += kvmppc_get_gpr(vcpu, ax_rb);
1009 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1010 addr, FPU_LS_SINGLE);
1015 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1016 kvmppc_get_gpr(vcpu, ax_rb);
1018 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1019 addr, FPU_LS_SINGLE);
1021 if (emulated == EMULATE_DONE)
1022 kvmppc_set_gpr(vcpu, ax_ra, addr);
1027 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1028 kvmppc_get_gpr(vcpu, ax_rb);
1030 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1031 addr, FPU_LS_DOUBLE);
1036 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1037 kvmppc_get_gpr(vcpu, ax_rb);
1039 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1040 addr, FPU_LS_DOUBLE);
1042 if (emulated == EMULATE_DONE)
1043 kvmppc_set_gpr(vcpu, ax_ra, addr);
1048 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1049 kvmppc_get_gpr(vcpu, ax_rb);
1051 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1052 addr, FPU_LS_SINGLE);
1057 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1058 kvmppc_get_gpr(vcpu, ax_rb);
1060 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1061 addr, FPU_LS_SINGLE);
1063 if (emulated == EMULATE_DONE)
1064 kvmppc_set_gpr(vcpu, ax_ra, addr);
1069 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1070 kvmppc_get_gpr(vcpu, ax_rb);
1072 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1073 addr, FPU_LS_DOUBLE);
1078 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1079 kvmppc_get_gpr(vcpu, ax_rb);
1081 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1082 addr, FPU_LS_DOUBLE);
1084 if (emulated == EMULATE_DONE)
1085 kvmppc_set_gpr(vcpu, ax_ra, addr);
1090 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1091 kvmppc_get_gpr(vcpu, ax_rb);
1093 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1102 switch (inst_get_field(inst, 21, 30)) {
1104 fpd_fadds(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1105 kvmppc_sync_qpr(vcpu, ax_rd);
1108 fpd_fsubs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1109 kvmppc_sync_qpr(vcpu, ax_rd);
1112 fpd_fdivs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1113 kvmppc_sync_qpr(vcpu, ax_rd);
1116 fpd_fres(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1117 kvmppc_sync_qpr(vcpu, ax_rd);
1119 case OP_59_FRSQRTES:
1120 fpd_frsqrtes(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1121 kvmppc_sync_qpr(vcpu, ax_rd);
1124 switch (inst_get_field(inst, 26, 30)) {
1126 fpd_fmuls(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c);
1127 kvmppc_sync_qpr(vcpu, ax_rd);
1130 fpd_fmsubs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1131 kvmppc_sync_qpr(vcpu, ax_rd);
1134 fpd_fmadds(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1135 kvmppc_sync_qpr(vcpu, ax_rd);
1138 fpd_fnmsubs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1139 kvmppc_sync_qpr(vcpu, ax_rd);
1142 fpd_fnmadds(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1143 kvmppc_sync_qpr(vcpu, ax_rd);
1148 switch (inst_get_field(inst, 21, 30)) {
1153 /* XXX need to implement */
1156 /* XXX missing CR */
1157 *fpr_d = vcpu->arch.fpscr;
1160 /* XXX missing fm bits */
1161 /* XXX missing CR */
1162 vcpu->arch.fpscr = *fpr_b;
1167 u32 cr0_mask = 0xf0000000;
1168 u32 cr_shift = inst_get_field(inst, 6, 8) * 4;
1170 fpd_fcmpu(&vcpu->arch.fpscr, &tmp_cr, fpr_a, fpr_b);
1171 cr &= ~(cr0_mask >> cr_shift);
1172 cr |= (cr & cr0_mask) >> cr_shift;
1178 u32 cr0_mask = 0xf0000000;
1179 u32 cr_shift = inst_get_field(inst, 6, 8) * 4;
1181 fpd_fcmpo(&vcpu->arch.fpscr, &tmp_cr, fpr_a, fpr_b);
1182 cr &= ~(cr0_mask >> cr_shift);
1183 cr |= (cr & cr0_mask) >> cr_shift;
1187 fpd_fneg(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1193 fpd_fabs(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1196 fpd_fcpsgn(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1199 fpd_fdiv(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1202 fpd_fadd(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1205 fpd_fsub(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1208 fpd_fctiw(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1211 fpd_fctiwz(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1214 fpd_frsp(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1215 kvmppc_sync_qpr(vcpu, ax_rd);
1222 fpd_fsqrt(&vcpu->arch.fpscr, &cr, fpr_d, fpr_b);
1223 /* fD = 1.0f / fD */
1224 fpd_fdiv(&vcpu->arch.fpscr, &cr, fpr_d, (u64*)&one, fpr_d);
1228 switch (inst_get_field(inst, 26, 30)) {
1230 fpd_fmul(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c);
1233 fpd_fsel(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1236 fpd_fmsub(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1239 fpd_fmadd(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1242 fpd_fnmsub(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1245 fpd_fnmadd(&vcpu->arch.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1252 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) {
1254 kvm_cvt_df(&vcpu->arch.fpr[i], &f);
1255 dprintk(KERN_INFO "FPR[%d] = 0x%x\n", i, f);
1260 kvmppc_set_cr(vcpu, cr);