2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright Novell Inc 2010
17 * Authors: Alexander Graf <agraf@suse.de>
21 #include <asm/kvm_ppc.h>
22 #include <asm/disassemble.h>
23 #include <asm/kvm_book3s.h>
24 #include <asm/kvm_fpu.h>
26 #include <asm/cacheflush.h>
27 #include <asm/switch_to.h>
28 #include <linux/vmalloc.h>
33 #define dprintk printk
35 #define dprintk(...) do { } while(0);
51 #define OP_31_LFSX 535
52 #define OP_31_LFSUX 567
53 #define OP_31_LFDX 599
54 #define OP_31_LFDUX 631
55 #define OP_31_STFSX 663
56 #define OP_31_STFSUX 695
57 #define OP_31_STFX 727
58 #define OP_31_STFUX 759
59 #define OP_31_LWIZX 887
60 #define OP_31_STFIWX 983
62 #define OP_59_FADDS 21
63 #define OP_59_FSUBS 20
64 #define OP_59_FSQRTS 22
65 #define OP_59_FDIVS 18
67 #define OP_59_FMULS 25
68 #define OP_59_FRSQRTES 26
69 #define OP_59_FMSUBS 28
70 #define OP_59_FMADDS 29
71 #define OP_59_FNMSUBS 30
72 #define OP_59_FNMADDS 31
75 #define OP_63_FCPSGN 8
77 #define OP_63_FCTIW 14
78 #define OP_63_FCTIWZ 15
81 #define OP_63_FSQRT 22
85 #define OP_63_FRSQRTE 26
86 #define OP_63_FMSUB 28
87 #define OP_63_FMADD 29
88 #define OP_63_FNMSUB 30
89 #define OP_63_FNMADD 31
90 #define OP_63_FCMPO 32
91 #define OP_63_MTFSB1 38 // XXX
94 #define OP_63_MCRFS 64
95 #define OP_63_MTFSB0 70
97 #define OP_63_MTFSFI 134
98 #define OP_63_FABS 264
99 #define OP_63_MFFS 583
100 #define OP_63_MTFSF 711
102 #define OP_4X_PS_CMPU0 0
103 #define OP_4X_PSQ_LX 6
104 #define OP_4XW_PSQ_STX 7
105 #define OP_4A_PS_SUM0 10
106 #define OP_4A_PS_SUM1 11
107 #define OP_4A_PS_MULS0 12
108 #define OP_4A_PS_MULS1 13
109 #define OP_4A_PS_MADDS0 14
110 #define OP_4A_PS_MADDS1 15
111 #define OP_4A_PS_DIV 18
112 #define OP_4A_PS_SUB 20
113 #define OP_4A_PS_ADD 21
114 #define OP_4A_PS_SEL 23
115 #define OP_4A_PS_RES 24
116 #define OP_4A_PS_MUL 25
117 #define OP_4A_PS_RSQRTE 26
118 #define OP_4A_PS_MSUB 28
119 #define OP_4A_PS_MADD 29
120 #define OP_4A_PS_NMSUB 30
121 #define OP_4A_PS_NMADD 31
122 #define OP_4X_PS_CMPO0 32
123 #define OP_4X_PSQ_LUX 38
124 #define OP_4XW_PSQ_STUX 39
125 #define OP_4X_PS_NEG 40
126 #define OP_4X_PS_CMPU1 64
127 #define OP_4X_PS_MR 72
128 #define OP_4X_PS_CMPO1 96
129 #define OP_4X_PS_NABS 136
130 #define OP_4X_PS_ABS 264
131 #define OP_4X_PS_MERGE00 528
132 #define OP_4X_PS_MERGE01 560
133 #define OP_4X_PS_MERGE10 592
134 #define OP_4X_PS_MERGE11 624
136 #define SCALAR_NONE 0
137 #define SCALAR_HIGH (1 << 0)
138 #define SCALAR_LOW (1 << 1)
139 #define SCALAR_NO_PS0 (1 << 2)
140 #define SCALAR_NO_PS1 (1 << 3)
142 #define GQR_ST_TYPE_MASK 0x00000007
143 #define GQR_ST_TYPE_SHIFT 0
144 #define GQR_ST_SCALE_MASK 0x00003f00
145 #define GQR_ST_SCALE_SHIFT 8
146 #define GQR_LD_TYPE_MASK 0x00070000
147 #define GQR_LD_TYPE_SHIFT 16
148 #define GQR_LD_SCALE_MASK 0x3f000000
149 #define GQR_LD_SCALE_SHIFT 24
151 #define GQR_QUANTIZE_FLOAT 0
152 #define GQR_QUANTIZE_U8 4
153 #define GQR_QUANTIZE_U16 5
154 #define GQR_QUANTIZE_S8 6
155 #define GQR_QUANTIZE_S16 7
157 #define FPU_LS_SINGLE 0
158 #define FPU_LS_DOUBLE 1
159 #define FPU_LS_SINGLE_LOW 2
161 static inline void kvmppc_sync_qpr(struct kvm_vcpu *vcpu, int rt)
163 kvm_cvt_df(&VCPU_FPR(vcpu, rt), &vcpu->arch.qpr[rt]);
166 static void kvmppc_inject_pf(struct kvm_vcpu *vcpu, ulong eaddr, bool is_store)
169 struct kvm_vcpu_arch_shared *shared = vcpu->arch.shared;
171 shared->msr = kvmppc_set_field(shared->msr, 33, 36, 0);
172 shared->msr = kvmppc_set_field(shared->msr, 42, 47, 0);
175 dsisr = kvmppc_set_field(0, 33, 33, 1);
177 shared->dsisr = kvmppc_set_field(dsisr, 38, 38, 1);
178 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE);
181 static int kvmppc_emulate_fpr_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
182 int rs, ulong addr, int ls_type)
184 int emulated = EMULATE_FAIL;
187 int len = sizeof(u32);
189 if (ls_type == FPU_LS_DOUBLE)
192 /* read from memory */
193 r = kvmppc_ld(vcpu, &addr, len, tmp, true);
194 vcpu->arch.paddr_accessed = addr;
197 kvmppc_inject_pf(vcpu, addr, false);
199 } else if (r == EMULATE_DO_MMIO) {
200 emulated = kvmppc_handle_load(run, vcpu, KVM_MMIO_REG_FPR | rs,
205 emulated = EMULATE_DONE;
207 /* put in registers */
210 kvm_cvt_fd((u32*)tmp, &VCPU_FPR(vcpu, rs));
211 vcpu->arch.qpr[rs] = *((u32*)tmp);
214 VCPU_FPR(vcpu, rs) = *((u64*)tmp);
218 dprintk(KERN_INFO "KVM: FPR_LD [0x%llx] at 0x%lx (%d)\n", *(u64*)tmp,
225 static int kvmppc_emulate_fpr_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
226 int rs, ulong addr, int ls_type)
228 int emulated = EMULATE_FAIL;
236 kvm_cvt_df(&VCPU_FPR(vcpu, rs), (u32*)tmp);
240 case FPU_LS_SINGLE_LOW:
241 *((u32*)tmp) = VCPU_FPR(vcpu, rs);
242 val = VCPU_FPR(vcpu, rs) & 0xffffffff;
246 *((u64*)tmp) = VCPU_FPR(vcpu, rs);
247 val = VCPU_FPR(vcpu, rs);
255 r = kvmppc_st(vcpu, &addr, len, tmp, true);
256 vcpu->arch.paddr_accessed = addr;
258 kvmppc_inject_pf(vcpu, addr, true);
259 } else if (r == EMULATE_DO_MMIO) {
260 emulated = kvmppc_handle_store(run, vcpu, val, len, 1);
262 emulated = EMULATE_DONE;
265 dprintk(KERN_INFO "KVM: FPR_ST [0x%llx] at 0x%lx (%d)\n",
271 static int kvmppc_emulate_psq_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
272 int rs, ulong addr, bool w, int i)
274 int emulated = EMULATE_FAIL;
279 /* read from memory */
281 r = kvmppc_ld(vcpu, &addr, sizeof(u32), tmp, true);
282 memcpy(&tmp[1], &one, sizeof(u32));
284 r = kvmppc_ld(vcpu, &addr, sizeof(u32) * 2, tmp, true);
286 vcpu->arch.paddr_accessed = addr;
288 kvmppc_inject_pf(vcpu, addr, false);
290 } else if ((r == EMULATE_DO_MMIO) && w) {
291 emulated = kvmppc_handle_load(run, vcpu, KVM_MMIO_REG_FPR | rs,
293 vcpu->arch.qpr[rs] = tmp[1];
295 } else if (r == EMULATE_DO_MMIO) {
296 emulated = kvmppc_handle_load(run, vcpu, KVM_MMIO_REG_FQPR | rs,
301 emulated = EMULATE_DONE;
303 /* put in registers */
304 kvm_cvt_fd(&tmp[0], &VCPU_FPR(vcpu, rs));
305 vcpu->arch.qpr[rs] = tmp[1];
307 dprintk(KERN_INFO "KVM: PSQ_LD [0x%x, 0x%x] at 0x%lx (%d)\n", tmp[0],
308 tmp[1], addr, w ? 4 : 8);
314 static int kvmppc_emulate_psq_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
315 int rs, ulong addr, bool w, int i)
317 int emulated = EMULATE_FAIL;
320 int len = w ? sizeof(u32) : sizeof(u64);
322 kvm_cvt_df(&VCPU_FPR(vcpu, rs), &tmp[0]);
323 tmp[1] = vcpu->arch.qpr[rs];
325 r = kvmppc_st(vcpu, &addr, len, tmp, true);
326 vcpu->arch.paddr_accessed = addr;
328 kvmppc_inject_pf(vcpu, addr, true);
329 } else if ((r == EMULATE_DO_MMIO) && w) {
330 emulated = kvmppc_handle_store(run, vcpu, tmp[0], 4, 1);
331 } else if (r == EMULATE_DO_MMIO) {
332 u64 val = ((u64)tmp[0] << 32) | tmp[1];
333 emulated = kvmppc_handle_store(run, vcpu, val, 8, 1);
335 emulated = EMULATE_DONE;
338 dprintk(KERN_INFO "KVM: PSQ_ST [0x%x, 0x%x] at 0x%lx (%d)\n",
339 tmp[0], tmp[1], addr, len);
345 * Cuts out inst bits with ordering according to spec.
346 * That means the leftmost bit is zero. All given bits are included.
348 static inline u32 inst_get_field(u32 inst, int msb, int lsb)
350 return kvmppc_get_field(inst, msb + 32, lsb + 32);
354 * Replaces inst bits with ordering according to spec.
356 static inline u32 inst_set_field(u32 inst, int msb, int lsb, int value)
358 return kvmppc_set_field(inst, msb + 32, lsb + 32, value);
361 bool kvmppc_inst_is_paired_single(struct kvm_vcpu *vcpu, u32 inst)
363 if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE))
366 switch (get_op(inst)) {
382 switch (inst_get_field(inst, 21, 30)) {
393 case OP_4X_PS_MERGE00:
394 case OP_4X_PS_MERGE01:
395 case OP_4X_PS_MERGE10:
396 case OP_4X_PS_MERGE11:
400 switch (inst_get_field(inst, 25, 30)) {
402 case OP_4XW_PSQ_STUX:
406 switch (inst_get_field(inst, 26, 30)) {
411 case OP_4A_PS_MADDS0:
412 case OP_4A_PS_MADDS1:
419 case OP_4A_PS_RSQRTE:
428 switch (inst_get_field(inst, 21, 30)) {
436 switch (inst_get_field(inst, 26, 30)) {
446 switch (inst_get_field(inst, 21, 30)) {
468 switch (inst_get_field(inst, 26, 30)) {
479 switch (inst_get_field(inst, 21, 30)) {
497 static int get_d_signext(u32 inst)
499 int d = inst & 0x8ff;
507 static int kvmppc_ps_three_in(struct kvm_vcpu *vcpu, bool rc,
508 int reg_out, int reg_in1, int reg_in2,
509 int reg_in3, int scalar,
510 void (*func)(u64 *fpscr,
512 u32 *src2, u32 *src3))
514 u32 *qpr = vcpu->arch.qpr;
516 u32 ps0_in1, ps0_in2, ps0_in3;
517 u32 ps1_in1, ps1_in2, ps1_in3;
523 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in1), &ps0_in1);
524 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in2), &ps0_in2);
525 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in3), &ps0_in3);
527 if (scalar & SCALAR_LOW)
528 ps0_in2 = qpr[reg_in2];
530 func(&vcpu->arch.fp.fpscr, &ps0_out, &ps0_in1, &ps0_in2, &ps0_in3);
532 dprintk(KERN_INFO "PS3 ps0 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n",
533 ps0_in1, ps0_in2, ps0_in3, ps0_out);
535 if (!(scalar & SCALAR_NO_PS0))
536 kvm_cvt_fd(&ps0_out, &VCPU_FPR(vcpu, reg_out));
539 ps1_in1 = qpr[reg_in1];
540 ps1_in2 = qpr[reg_in2];
541 ps1_in3 = qpr[reg_in3];
543 if (scalar & SCALAR_HIGH)
546 if (!(scalar & SCALAR_NO_PS1))
547 func(&vcpu->arch.fp.fpscr, &qpr[reg_out], &ps1_in1, &ps1_in2, &ps1_in3);
549 dprintk(KERN_INFO "PS3 ps1 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n",
550 ps1_in1, ps1_in2, ps1_in3, qpr[reg_out]);
555 static int kvmppc_ps_two_in(struct kvm_vcpu *vcpu, bool rc,
556 int reg_out, int reg_in1, int reg_in2,
558 void (*func)(u64 *fpscr,
562 u32 *qpr = vcpu->arch.qpr;
564 u32 ps0_in1, ps0_in2;
566 u32 ps1_in1, ps1_in2;
572 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in1), &ps0_in1);
574 if (scalar & SCALAR_LOW)
575 ps0_in2 = qpr[reg_in2];
577 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in2), &ps0_in2);
579 func(&vcpu->arch.fp.fpscr, &ps0_out, &ps0_in1, &ps0_in2);
581 if (!(scalar & SCALAR_NO_PS0)) {
582 dprintk(KERN_INFO "PS2 ps0 -> f(0x%x, 0x%x) = 0x%x\n",
583 ps0_in1, ps0_in2, ps0_out);
585 kvm_cvt_fd(&ps0_out, &VCPU_FPR(vcpu, reg_out));
589 ps1_in1 = qpr[reg_in1];
590 ps1_in2 = qpr[reg_in2];
592 if (scalar & SCALAR_HIGH)
595 func(&vcpu->arch.fp.fpscr, &ps1_out, &ps1_in1, &ps1_in2);
597 if (!(scalar & SCALAR_NO_PS1)) {
598 qpr[reg_out] = ps1_out;
600 dprintk(KERN_INFO "PS2 ps1 -> f(0x%x, 0x%x) = 0x%x\n",
601 ps1_in1, ps1_in2, qpr[reg_out]);
607 static int kvmppc_ps_one_in(struct kvm_vcpu *vcpu, bool rc,
608 int reg_out, int reg_in,
610 u32 *dst, u32 *src1))
612 u32 *qpr = vcpu->arch.qpr;
620 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in), &ps0_in);
621 func(&vcpu->arch.fp.fpscr, &ps0_out, &ps0_in);
623 dprintk(KERN_INFO "PS1 ps0 -> f(0x%x) = 0x%x\n",
626 kvm_cvt_fd(&ps0_out, &VCPU_FPR(vcpu, reg_out));
629 ps1_in = qpr[reg_in];
630 func(&vcpu->arch.fp.fpscr, &qpr[reg_out], &ps1_in);
632 dprintk(KERN_INFO "PS1 ps1 -> f(0x%x) = 0x%x\n",
633 ps1_in, qpr[reg_out]);
638 int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu)
640 u32 inst = kvmppc_get_last_inst(vcpu);
641 enum emulation_result emulated = EMULATE_DONE;
643 int ax_rd = inst_get_field(inst, 6, 10);
644 int ax_ra = inst_get_field(inst, 11, 15);
645 int ax_rb = inst_get_field(inst, 16, 20);
646 int ax_rc = inst_get_field(inst, 21, 25);
647 short full_d = inst_get_field(inst, 16, 31);
649 u64 *fpr_d = &VCPU_FPR(vcpu, ax_rd);
650 u64 *fpr_a = &VCPU_FPR(vcpu, ax_ra);
651 u64 *fpr_b = &VCPU_FPR(vcpu, ax_rb);
652 u64 *fpr_c = &VCPU_FPR(vcpu, ax_rc);
654 bool rcomp = (inst & 1) ? true : false;
655 u32 cr = kvmppc_get_cr(vcpu);
660 if (!kvmppc_inst_is_paired_single(vcpu, inst))
663 if (!(vcpu->arch.shared->msr & MSR_FP)) {
664 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL);
665 return EMULATE_AGAIN;
668 kvmppc_giveup_ext(vcpu, MSR_FP);
671 /* Do we need to clear FE0 / FE1 here? Don't think so. */
674 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fp.fpr); i++) {
676 kvm_cvt_df(&VCPU_FPR(vcpu, i), &f);
677 dprintk(KERN_INFO "FPR[%d] = 0x%x / 0x%llx QPR[%d] = 0x%x\n",
678 i, f, VCPU_FPR(vcpu, i), i, vcpu->arch.qpr[i]);
682 switch (get_op(inst)) {
685 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
686 bool w = inst_get_field(inst, 16, 16) ? true : false;
687 int i = inst_get_field(inst, 17, 19);
689 addr += get_d_signext(inst);
690 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
695 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
696 bool w = inst_get_field(inst, 16, 16) ? true : false;
697 int i = inst_get_field(inst, 17, 19);
699 addr += get_d_signext(inst);
700 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
702 if (emulated == EMULATE_DONE)
703 kvmppc_set_gpr(vcpu, ax_ra, addr);
708 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
709 bool w = inst_get_field(inst, 16, 16) ? true : false;
710 int i = inst_get_field(inst, 17, 19);
712 addr += get_d_signext(inst);
713 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
718 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
719 bool w = inst_get_field(inst, 16, 16) ? true : false;
720 int i = inst_get_field(inst, 17, 19);
722 addr += get_d_signext(inst);
723 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
725 if (emulated == EMULATE_DONE)
726 kvmppc_set_gpr(vcpu, ax_ra, addr);
731 switch (inst_get_field(inst, 21, 30)) {
734 emulated = EMULATE_FAIL;
738 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
739 bool w = inst_get_field(inst, 21, 21) ? true : false;
740 int i = inst_get_field(inst, 22, 24);
742 addr += kvmppc_get_gpr(vcpu, ax_rb);
743 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
748 emulated = EMULATE_FAIL;
752 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
753 bool w = inst_get_field(inst, 21, 21) ? true : false;
754 int i = inst_get_field(inst, 22, 24);
756 addr += kvmppc_get_gpr(vcpu, ax_rb);
757 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
759 if (emulated == EMULATE_DONE)
760 kvmppc_set_gpr(vcpu, ax_ra, addr);
764 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
765 VCPU_FPR(vcpu, ax_rd) ^= 0x8000000000000000ULL;
766 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
767 vcpu->arch.qpr[ax_rd] ^= 0x80000000;
771 emulated = EMULATE_FAIL;
775 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
776 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
780 emulated = EMULATE_FAIL;
784 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
785 VCPU_FPR(vcpu, ax_rd) |= 0x8000000000000000ULL;
786 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
787 vcpu->arch.qpr[ax_rd] |= 0x80000000;
791 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
792 VCPU_FPR(vcpu, ax_rd) &= ~0x8000000000000000ULL;
793 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
794 vcpu->arch.qpr[ax_rd] &= ~0x80000000;
796 case OP_4X_PS_MERGE00:
798 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_ra);
799 /* vcpu->arch.qpr[ax_rd] = VCPU_FPR(vcpu, ax_rb); */
800 kvm_cvt_df(&VCPU_FPR(vcpu, ax_rb),
801 &vcpu->arch.qpr[ax_rd]);
803 case OP_4X_PS_MERGE01:
805 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_ra);
806 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
808 case OP_4X_PS_MERGE10:
810 /* VCPU_FPR(vcpu, ax_rd) = vcpu->arch.qpr[ax_ra]; */
811 kvm_cvt_fd(&vcpu->arch.qpr[ax_ra],
812 &VCPU_FPR(vcpu, ax_rd));
813 /* vcpu->arch.qpr[ax_rd] = VCPU_FPR(vcpu, ax_rb); */
814 kvm_cvt_df(&VCPU_FPR(vcpu, ax_rb),
815 &vcpu->arch.qpr[ax_rd]);
817 case OP_4X_PS_MERGE11:
819 /* VCPU_FPR(vcpu, ax_rd) = vcpu->arch.qpr[ax_ra]; */
820 kvm_cvt_fd(&vcpu->arch.qpr[ax_ra],
821 &VCPU_FPR(vcpu, ax_rd));
822 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
826 switch (inst_get_field(inst, 25, 30)) {
829 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
830 bool w = inst_get_field(inst, 21, 21) ? true : false;
831 int i = inst_get_field(inst, 22, 24);
833 addr += kvmppc_get_gpr(vcpu, ax_rb);
834 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
837 case OP_4XW_PSQ_STUX:
839 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
840 bool w = inst_get_field(inst, 21, 21) ? true : false;
841 int i = inst_get_field(inst, 22, 24);
843 addr += kvmppc_get_gpr(vcpu, ax_rb);
844 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
846 if (emulated == EMULATE_DONE)
847 kvmppc_set_gpr(vcpu, ax_ra, addr);
852 switch (inst_get_field(inst, 26, 30)) {
854 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
855 ax_rb, ax_ra, SCALAR_NO_PS0 | SCALAR_HIGH, fps_fadds);
856 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rc);
859 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
860 ax_ra, ax_rb, SCALAR_NO_PS1 | SCALAR_LOW, fps_fadds);
861 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rc];
864 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
865 ax_ra, ax_rc, SCALAR_HIGH, fps_fmuls);
868 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
869 ax_ra, ax_rc, SCALAR_LOW, fps_fmuls);
871 case OP_4A_PS_MADDS0:
872 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
873 ax_ra, ax_rc, ax_rb, SCALAR_HIGH, fps_fmadds);
875 case OP_4A_PS_MADDS1:
876 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
877 ax_ra, ax_rc, ax_rb, SCALAR_LOW, fps_fmadds);
880 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
881 ax_ra, ax_rb, SCALAR_NONE, fps_fdivs);
884 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
885 ax_ra, ax_rb, SCALAR_NONE, fps_fsubs);
888 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
889 ax_ra, ax_rb, SCALAR_NONE, fps_fadds);
892 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
893 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fsel);
896 emulated = kvmppc_ps_one_in(vcpu, rcomp, ax_rd,
900 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
901 ax_ra, ax_rc, SCALAR_NONE, fps_fmuls);
903 case OP_4A_PS_RSQRTE:
904 emulated = kvmppc_ps_one_in(vcpu, rcomp, ax_rd,
908 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
909 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fmsubs);
912 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
913 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fmadds);
916 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
917 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fnmsubs);
920 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
921 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fnmadds);
926 /* Real FPU operations */
930 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
932 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
938 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
940 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
943 if (emulated == EMULATE_DONE)
944 kvmppc_set_gpr(vcpu, ax_ra, addr);
949 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
951 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
957 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
959 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
962 if (emulated == EMULATE_DONE)
963 kvmppc_set_gpr(vcpu, ax_ra, addr);
968 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
970 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
976 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
978 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
981 if (emulated == EMULATE_DONE)
982 kvmppc_set_gpr(vcpu, ax_ra, addr);
987 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
989 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
995 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
997 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
1000 if (emulated == EMULATE_DONE)
1001 kvmppc_set_gpr(vcpu, ax_ra, addr);
1005 switch (inst_get_field(inst, 21, 30)) {
1008 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
1010 addr += kvmppc_get_gpr(vcpu, ax_rb);
1011 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1012 addr, FPU_LS_SINGLE);
1017 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1018 kvmppc_get_gpr(vcpu, ax_rb);
1020 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1021 addr, FPU_LS_SINGLE);
1023 if (emulated == EMULATE_DONE)
1024 kvmppc_set_gpr(vcpu, ax_ra, addr);
1029 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1030 kvmppc_get_gpr(vcpu, ax_rb);
1032 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1033 addr, FPU_LS_DOUBLE);
1038 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1039 kvmppc_get_gpr(vcpu, ax_rb);
1041 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1042 addr, FPU_LS_DOUBLE);
1044 if (emulated == EMULATE_DONE)
1045 kvmppc_set_gpr(vcpu, ax_ra, addr);
1050 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1051 kvmppc_get_gpr(vcpu, ax_rb);
1053 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1054 addr, FPU_LS_SINGLE);
1059 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1060 kvmppc_get_gpr(vcpu, ax_rb);
1062 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1063 addr, FPU_LS_SINGLE);
1065 if (emulated == EMULATE_DONE)
1066 kvmppc_set_gpr(vcpu, ax_ra, addr);
1071 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1072 kvmppc_get_gpr(vcpu, ax_rb);
1074 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1075 addr, FPU_LS_DOUBLE);
1080 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1081 kvmppc_get_gpr(vcpu, ax_rb);
1083 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1084 addr, FPU_LS_DOUBLE);
1086 if (emulated == EMULATE_DONE)
1087 kvmppc_set_gpr(vcpu, ax_ra, addr);
1092 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1093 kvmppc_get_gpr(vcpu, ax_rb);
1095 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1104 switch (inst_get_field(inst, 21, 30)) {
1106 fpd_fadds(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1107 kvmppc_sync_qpr(vcpu, ax_rd);
1110 fpd_fsubs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1111 kvmppc_sync_qpr(vcpu, ax_rd);
1114 fpd_fdivs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1115 kvmppc_sync_qpr(vcpu, ax_rd);
1118 fpd_fres(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1119 kvmppc_sync_qpr(vcpu, ax_rd);
1121 case OP_59_FRSQRTES:
1122 fpd_frsqrtes(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1123 kvmppc_sync_qpr(vcpu, ax_rd);
1126 switch (inst_get_field(inst, 26, 30)) {
1128 fpd_fmuls(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c);
1129 kvmppc_sync_qpr(vcpu, ax_rd);
1132 fpd_fmsubs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1133 kvmppc_sync_qpr(vcpu, ax_rd);
1136 fpd_fmadds(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1137 kvmppc_sync_qpr(vcpu, ax_rd);
1140 fpd_fnmsubs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1141 kvmppc_sync_qpr(vcpu, ax_rd);
1144 fpd_fnmadds(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1145 kvmppc_sync_qpr(vcpu, ax_rd);
1150 switch (inst_get_field(inst, 21, 30)) {
1155 /* XXX need to implement */
1158 /* XXX missing CR */
1159 *fpr_d = vcpu->arch.fp.fpscr;
1162 /* XXX missing fm bits */
1163 /* XXX missing CR */
1164 vcpu->arch.fp.fpscr = *fpr_b;
1169 u32 cr0_mask = 0xf0000000;
1170 u32 cr_shift = inst_get_field(inst, 6, 8) * 4;
1172 fpd_fcmpu(&vcpu->arch.fp.fpscr, &tmp_cr, fpr_a, fpr_b);
1173 cr &= ~(cr0_mask >> cr_shift);
1174 cr |= (cr & cr0_mask) >> cr_shift;
1180 u32 cr0_mask = 0xf0000000;
1181 u32 cr_shift = inst_get_field(inst, 6, 8) * 4;
1183 fpd_fcmpo(&vcpu->arch.fp.fpscr, &tmp_cr, fpr_a, fpr_b);
1184 cr &= ~(cr0_mask >> cr_shift);
1185 cr |= (cr & cr0_mask) >> cr_shift;
1189 fpd_fneg(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1195 fpd_fabs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1198 fpd_fcpsgn(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1201 fpd_fdiv(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1204 fpd_fadd(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1207 fpd_fsub(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1210 fpd_fctiw(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1213 fpd_fctiwz(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1216 fpd_frsp(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1217 kvmppc_sync_qpr(vcpu, ax_rd);
1224 fpd_fsqrt(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1225 /* fD = 1.0f / fD */
1226 fpd_fdiv(&vcpu->arch.fp.fpscr, &cr, fpr_d, (u64*)&one, fpr_d);
1230 switch (inst_get_field(inst, 26, 30)) {
1232 fpd_fmul(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c);
1235 fpd_fsel(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1238 fpd_fmsub(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1241 fpd_fmadd(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1244 fpd_fnmsub(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1247 fpd_fnmadd(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1254 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fp.fpr); i++) {
1256 kvm_cvt_df(&VCPU_FPR(vcpu, i), &f);
1257 dprintk(KERN_INFO "FPR[%d] = 0x%x\n", i, f);
1262 kvmppc_set_cr(vcpu, cr);