2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright Novell Inc 2010
17 * Authors: Alexander Graf <agraf@suse.de>
21 #include <asm/kvm_ppc.h>
22 #include <asm/disassemble.h>
23 #include <asm/kvm_book3s.h>
24 #include <asm/kvm_fpu.h>
26 #include <asm/cacheflush.h>
27 #include <asm/switch_to.h>
28 #include <linux/vmalloc.h>
33 #define dprintk printk
35 #define dprintk(...) do { } while(0);
51 #define OP_31_LFSX 535
52 #define OP_31_LFSUX 567
53 #define OP_31_LFDX 599
54 #define OP_31_LFDUX 631
55 #define OP_31_STFSX 663
56 #define OP_31_STFSUX 695
57 #define OP_31_STFX 727
58 #define OP_31_STFUX 759
59 #define OP_31_LWIZX 887
60 #define OP_31_STFIWX 983
62 #define OP_59_FADDS 21
63 #define OP_59_FSUBS 20
64 #define OP_59_FSQRTS 22
65 #define OP_59_FDIVS 18
67 #define OP_59_FMULS 25
68 #define OP_59_FRSQRTES 26
69 #define OP_59_FMSUBS 28
70 #define OP_59_FMADDS 29
71 #define OP_59_FNMSUBS 30
72 #define OP_59_FNMADDS 31
75 #define OP_63_FCPSGN 8
77 #define OP_63_FCTIW 14
78 #define OP_63_FCTIWZ 15
81 #define OP_63_FSQRT 22
85 #define OP_63_FRSQRTE 26
86 #define OP_63_FMSUB 28
87 #define OP_63_FMADD 29
88 #define OP_63_FNMSUB 30
89 #define OP_63_FNMADD 31
90 #define OP_63_FCMPO 32
91 #define OP_63_MTFSB1 38 // XXX
94 #define OP_63_MCRFS 64
95 #define OP_63_MTFSB0 70
97 #define OP_63_MTFSFI 134
98 #define OP_63_FABS 264
99 #define OP_63_MFFS 583
100 #define OP_63_MTFSF 711
102 #define OP_4X_PS_CMPU0 0
103 #define OP_4X_PSQ_LX 6
104 #define OP_4XW_PSQ_STX 7
105 #define OP_4A_PS_SUM0 10
106 #define OP_4A_PS_SUM1 11
107 #define OP_4A_PS_MULS0 12
108 #define OP_4A_PS_MULS1 13
109 #define OP_4A_PS_MADDS0 14
110 #define OP_4A_PS_MADDS1 15
111 #define OP_4A_PS_DIV 18
112 #define OP_4A_PS_SUB 20
113 #define OP_4A_PS_ADD 21
114 #define OP_4A_PS_SEL 23
115 #define OP_4A_PS_RES 24
116 #define OP_4A_PS_MUL 25
117 #define OP_4A_PS_RSQRTE 26
118 #define OP_4A_PS_MSUB 28
119 #define OP_4A_PS_MADD 29
120 #define OP_4A_PS_NMSUB 30
121 #define OP_4A_PS_NMADD 31
122 #define OP_4X_PS_CMPO0 32
123 #define OP_4X_PSQ_LUX 38
124 #define OP_4XW_PSQ_STUX 39
125 #define OP_4X_PS_NEG 40
126 #define OP_4X_PS_CMPU1 64
127 #define OP_4X_PS_MR 72
128 #define OP_4X_PS_CMPO1 96
129 #define OP_4X_PS_NABS 136
130 #define OP_4X_PS_ABS 264
131 #define OP_4X_PS_MERGE00 528
132 #define OP_4X_PS_MERGE01 560
133 #define OP_4X_PS_MERGE10 592
134 #define OP_4X_PS_MERGE11 624
136 #define SCALAR_NONE 0
137 #define SCALAR_HIGH (1 << 0)
138 #define SCALAR_LOW (1 << 1)
139 #define SCALAR_NO_PS0 (1 << 2)
140 #define SCALAR_NO_PS1 (1 << 3)
142 #define GQR_ST_TYPE_MASK 0x00000007
143 #define GQR_ST_TYPE_SHIFT 0
144 #define GQR_ST_SCALE_MASK 0x00003f00
145 #define GQR_ST_SCALE_SHIFT 8
146 #define GQR_LD_TYPE_MASK 0x00070000
147 #define GQR_LD_TYPE_SHIFT 16
148 #define GQR_LD_SCALE_MASK 0x3f000000
149 #define GQR_LD_SCALE_SHIFT 24
151 #define GQR_QUANTIZE_FLOAT 0
152 #define GQR_QUANTIZE_U8 4
153 #define GQR_QUANTIZE_U16 5
154 #define GQR_QUANTIZE_S8 6
155 #define GQR_QUANTIZE_S16 7
157 #define FPU_LS_SINGLE 0
158 #define FPU_LS_DOUBLE 1
159 #define FPU_LS_SINGLE_LOW 2
161 static inline void kvmppc_sync_qpr(struct kvm_vcpu *vcpu, int rt)
163 kvm_cvt_df(&VCPU_FPR(vcpu, rt), &vcpu->arch.qpr[rt]);
166 static void kvmppc_inject_pf(struct kvm_vcpu *vcpu, ulong eaddr, bool is_store)
169 u64 msr = kvmppc_get_msr(vcpu);
171 msr = kvmppc_set_field(msr, 33, 36, 0);
172 msr = kvmppc_set_field(msr, 42, 47, 0);
173 kvmppc_set_msr(vcpu, msr);
174 kvmppc_set_dar(vcpu, eaddr);
176 dsisr = kvmppc_set_field(0, 33, 33, 1);
178 dsisr = kvmppc_set_field(dsisr, 38, 38, 1);
179 kvmppc_set_dsisr(vcpu, dsisr);
180 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE);
183 static int kvmppc_emulate_fpr_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
184 int rs, ulong addr, int ls_type)
186 int emulated = EMULATE_FAIL;
189 int len = sizeof(u32);
191 if (ls_type == FPU_LS_DOUBLE)
194 /* read from memory */
195 r = kvmppc_ld(vcpu, &addr, len, tmp, true);
196 vcpu->arch.paddr_accessed = addr;
199 kvmppc_inject_pf(vcpu, addr, false);
201 } else if (r == EMULATE_DO_MMIO) {
202 emulated = kvmppc_handle_load(run, vcpu, KVM_MMIO_REG_FPR | rs,
207 emulated = EMULATE_DONE;
209 /* put in registers */
212 kvm_cvt_fd((u32*)tmp, &VCPU_FPR(vcpu, rs));
213 vcpu->arch.qpr[rs] = *((u32*)tmp);
216 VCPU_FPR(vcpu, rs) = *((u64*)tmp);
220 dprintk(KERN_INFO "KVM: FPR_LD [0x%llx] at 0x%lx (%d)\n", *(u64*)tmp,
227 static int kvmppc_emulate_fpr_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
228 int rs, ulong addr, int ls_type)
230 int emulated = EMULATE_FAIL;
238 kvm_cvt_df(&VCPU_FPR(vcpu, rs), (u32*)tmp);
242 case FPU_LS_SINGLE_LOW:
243 *((u32*)tmp) = VCPU_FPR(vcpu, rs);
244 val = VCPU_FPR(vcpu, rs) & 0xffffffff;
248 *((u64*)tmp) = VCPU_FPR(vcpu, rs);
249 val = VCPU_FPR(vcpu, rs);
257 r = kvmppc_st(vcpu, &addr, len, tmp, true);
258 vcpu->arch.paddr_accessed = addr;
260 kvmppc_inject_pf(vcpu, addr, true);
261 } else if (r == EMULATE_DO_MMIO) {
262 emulated = kvmppc_handle_store(run, vcpu, val, len, 1);
264 emulated = EMULATE_DONE;
267 dprintk(KERN_INFO "KVM: FPR_ST [0x%llx] at 0x%lx (%d)\n",
273 static int kvmppc_emulate_psq_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
274 int rs, ulong addr, bool w, int i)
276 int emulated = EMULATE_FAIL;
281 /* read from memory */
283 r = kvmppc_ld(vcpu, &addr, sizeof(u32), tmp, true);
284 memcpy(&tmp[1], &one, sizeof(u32));
286 r = kvmppc_ld(vcpu, &addr, sizeof(u32) * 2, tmp, true);
288 vcpu->arch.paddr_accessed = addr;
290 kvmppc_inject_pf(vcpu, addr, false);
292 } else if ((r == EMULATE_DO_MMIO) && w) {
293 emulated = kvmppc_handle_load(run, vcpu, KVM_MMIO_REG_FPR | rs,
295 vcpu->arch.qpr[rs] = tmp[1];
297 } else if (r == EMULATE_DO_MMIO) {
298 emulated = kvmppc_handle_load(run, vcpu, KVM_MMIO_REG_FQPR | rs,
303 emulated = EMULATE_DONE;
305 /* put in registers */
306 kvm_cvt_fd(&tmp[0], &VCPU_FPR(vcpu, rs));
307 vcpu->arch.qpr[rs] = tmp[1];
309 dprintk(KERN_INFO "KVM: PSQ_LD [0x%x, 0x%x] at 0x%lx (%d)\n", tmp[0],
310 tmp[1], addr, w ? 4 : 8);
316 static int kvmppc_emulate_psq_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
317 int rs, ulong addr, bool w, int i)
319 int emulated = EMULATE_FAIL;
322 int len = w ? sizeof(u32) : sizeof(u64);
324 kvm_cvt_df(&VCPU_FPR(vcpu, rs), &tmp[0]);
325 tmp[1] = vcpu->arch.qpr[rs];
327 r = kvmppc_st(vcpu, &addr, len, tmp, true);
328 vcpu->arch.paddr_accessed = addr;
330 kvmppc_inject_pf(vcpu, addr, true);
331 } else if ((r == EMULATE_DO_MMIO) && w) {
332 emulated = kvmppc_handle_store(run, vcpu, tmp[0], 4, 1);
333 } else if (r == EMULATE_DO_MMIO) {
334 u64 val = ((u64)tmp[0] << 32) | tmp[1];
335 emulated = kvmppc_handle_store(run, vcpu, val, 8, 1);
337 emulated = EMULATE_DONE;
340 dprintk(KERN_INFO "KVM: PSQ_ST [0x%x, 0x%x] at 0x%lx (%d)\n",
341 tmp[0], tmp[1], addr, len);
347 * Cuts out inst bits with ordering according to spec.
348 * That means the leftmost bit is zero. All given bits are included.
350 static inline u32 inst_get_field(u32 inst, int msb, int lsb)
352 return kvmppc_get_field(inst, msb + 32, lsb + 32);
356 * Replaces inst bits with ordering according to spec.
358 static inline u32 inst_set_field(u32 inst, int msb, int lsb, int value)
360 return kvmppc_set_field(inst, msb + 32, lsb + 32, value);
363 bool kvmppc_inst_is_paired_single(struct kvm_vcpu *vcpu, u32 inst)
365 if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE))
368 switch (get_op(inst)) {
384 switch (inst_get_field(inst, 21, 30)) {
395 case OP_4X_PS_MERGE00:
396 case OP_4X_PS_MERGE01:
397 case OP_4X_PS_MERGE10:
398 case OP_4X_PS_MERGE11:
402 switch (inst_get_field(inst, 25, 30)) {
404 case OP_4XW_PSQ_STUX:
408 switch (inst_get_field(inst, 26, 30)) {
413 case OP_4A_PS_MADDS0:
414 case OP_4A_PS_MADDS1:
421 case OP_4A_PS_RSQRTE:
430 switch (inst_get_field(inst, 21, 30)) {
438 switch (inst_get_field(inst, 26, 30)) {
448 switch (inst_get_field(inst, 21, 30)) {
470 switch (inst_get_field(inst, 26, 30)) {
481 switch (inst_get_field(inst, 21, 30)) {
499 static int get_d_signext(u32 inst)
501 int d = inst & 0x8ff;
509 static int kvmppc_ps_three_in(struct kvm_vcpu *vcpu, bool rc,
510 int reg_out, int reg_in1, int reg_in2,
511 int reg_in3, int scalar,
512 void (*func)(u64 *fpscr,
514 u32 *src2, u32 *src3))
516 u32 *qpr = vcpu->arch.qpr;
518 u32 ps0_in1, ps0_in2, ps0_in3;
519 u32 ps1_in1, ps1_in2, ps1_in3;
525 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in1), &ps0_in1);
526 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in2), &ps0_in2);
527 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in3), &ps0_in3);
529 if (scalar & SCALAR_LOW)
530 ps0_in2 = qpr[reg_in2];
532 func(&vcpu->arch.fp.fpscr, &ps0_out, &ps0_in1, &ps0_in2, &ps0_in3);
534 dprintk(KERN_INFO "PS3 ps0 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n",
535 ps0_in1, ps0_in2, ps0_in3, ps0_out);
537 if (!(scalar & SCALAR_NO_PS0))
538 kvm_cvt_fd(&ps0_out, &VCPU_FPR(vcpu, reg_out));
541 ps1_in1 = qpr[reg_in1];
542 ps1_in2 = qpr[reg_in2];
543 ps1_in3 = qpr[reg_in3];
545 if (scalar & SCALAR_HIGH)
548 if (!(scalar & SCALAR_NO_PS1))
549 func(&vcpu->arch.fp.fpscr, &qpr[reg_out], &ps1_in1, &ps1_in2, &ps1_in3);
551 dprintk(KERN_INFO "PS3 ps1 -> f(0x%x, 0x%x, 0x%x) = 0x%x\n",
552 ps1_in1, ps1_in2, ps1_in3, qpr[reg_out]);
557 static int kvmppc_ps_two_in(struct kvm_vcpu *vcpu, bool rc,
558 int reg_out, int reg_in1, int reg_in2,
560 void (*func)(u64 *fpscr,
564 u32 *qpr = vcpu->arch.qpr;
566 u32 ps0_in1, ps0_in2;
568 u32 ps1_in1, ps1_in2;
574 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in1), &ps0_in1);
576 if (scalar & SCALAR_LOW)
577 ps0_in2 = qpr[reg_in2];
579 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in2), &ps0_in2);
581 func(&vcpu->arch.fp.fpscr, &ps0_out, &ps0_in1, &ps0_in2);
583 if (!(scalar & SCALAR_NO_PS0)) {
584 dprintk(KERN_INFO "PS2 ps0 -> f(0x%x, 0x%x) = 0x%x\n",
585 ps0_in1, ps0_in2, ps0_out);
587 kvm_cvt_fd(&ps0_out, &VCPU_FPR(vcpu, reg_out));
591 ps1_in1 = qpr[reg_in1];
592 ps1_in2 = qpr[reg_in2];
594 if (scalar & SCALAR_HIGH)
597 func(&vcpu->arch.fp.fpscr, &ps1_out, &ps1_in1, &ps1_in2);
599 if (!(scalar & SCALAR_NO_PS1)) {
600 qpr[reg_out] = ps1_out;
602 dprintk(KERN_INFO "PS2 ps1 -> f(0x%x, 0x%x) = 0x%x\n",
603 ps1_in1, ps1_in2, qpr[reg_out]);
609 static int kvmppc_ps_one_in(struct kvm_vcpu *vcpu, bool rc,
610 int reg_out, int reg_in,
612 u32 *dst, u32 *src1))
614 u32 *qpr = vcpu->arch.qpr;
622 kvm_cvt_df(&VCPU_FPR(vcpu, reg_in), &ps0_in);
623 func(&vcpu->arch.fp.fpscr, &ps0_out, &ps0_in);
625 dprintk(KERN_INFO "PS1 ps0 -> f(0x%x) = 0x%x\n",
628 kvm_cvt_fd(&ps0_out, &VCPU_FPR(vcpu, reg_out));
631 ps1_in = qpr[reg_in];
632 func(&vcpu->arch.fp.fpscr, &qpr[reg_out], &ps1_in);
634 dprintk(KERN_INFO "PS1 ps1 -> f(0x%x) = 0x%x\n",
635 ps1_in, qpr[reg_out]);
640 int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu)
643 enum emulation_result emulated = EMULATE_DONE;
644 int ax_rd, ax_ra, ax_rb, ax_rc;
646 u64 *fpr_d, *fpr_a, *fpr_b, *fpr_c;
654 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst);
655 if (emulated != EMULATE_DONE)
658 ax_rd = inst_get_field(inst, 6, 10);
659 ax_ra = inst_get_field(inst, 11, 15);
660 ax_rb = inst_get_field(inst, 16, 20);
661 ax_rc = inst_get_field(inst, 21, 25);
662 full_d = inst_get_field(inst, 16, 31);
664 fpr_d = &VCPU_FPR(vcpu, ax_rd);
665 fpr_a = &VCPU_FPR(vcpu, ax_ra);
666 fpr_b = &VCPU_FPR(vcpu, ax_rb);
667 fpr_c = &VCPU_FPR(vcpu, ax_rc);
669 rcomp = (inst & 1) ? true : false;
670 cr = kvmppc_get_cr(vcpu);
672 if (!kvmppc_inst_is_paired_single(vcpu, inst))
675 if (!(kvmppc_get_msr(vcpu) & MSR_FP)) {
676 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL);
677 return EMULATE_AGAIN;
680 kvmppc_giveup_ext(vcpu, MSR_FP);
683 /* Do we need to clear FE0 / FE1 here? Don't think so. */
686 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fp.fpr); i++) {
688 kvm_cvt_df(&VCPU_FPR(vcpu, i), &f);
689 dprintk(KERN_INFO "FPR[%d] = 0x%x / 0x%llx QPR[%d] = 0x%x\n",
690 i, f, VCPU_FPR(vcpu, i), i, vcpu->arch.qpr[i]);
694 switch (get_op(inst)) {
697 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
698 bool w = inst_get_field(inst, 16, 16) ? true : false;
699 int i = inst_get_field(inst, 17, 19);
701 addr += get_d_signext(inst);
702 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
707 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
708 bool w = inst_get_field(inst, 16, 16) ? true : false;
709 int i = inst_get_field(inst, 17, 19);
711 addr += get_d_signext(inst);
712 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
714 if (emulated == EMULATE_DONE)
715 kvmppc_set_gpr(vcpu, ax_ra, addr);
720 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
721 bool w = inst_get_field(inst, 16, 16) ? true : false;
722 int i = inst_get_field(inst, 17, 19);
724 addr += get_d_signext(inst);
725 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
730 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
731 bool w = inst_get_field(inst, 16, 16) ? true : false;
732 int i = inst_get_field(inst, 17, 19);
734 addr += get_d_signext(inst);
735 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
737 if (emulated == EMULATE_DONE)
738 kvmppc_set_gpr(vcpu, ax_ra, addr);
743 switch (inst_get_field(inst, 21, 30)) {
746 emulated = EMULATE_FAIL;
750 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
751 bool w = inst_get_field(inst, 21, 21) ? true : false;
752 int i = inst_get_field(inst, 22, 24);
754 addr += kvmppc_get_gpr(vcpu, ax_rb);
755 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
760 emulated = EMULATE_FAIL;
764 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
765 bool w = inst_get_field(inst, 21, 21) ? true : false;
766 int i = inst_get_field(inst, 22, 24);
768 addr += kvmppc_get_gpr(vcpu, ax_rb);
769 emulated = kvmppc_emulate_psq_load(run, vcpu, ax_rd, addr, w, i);
771 if (emulated == EMULATE_DONE)
772 kvmppc_set_gpr(vcpu, ax_ra, addr);
776 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
777 VCPU_FPR(vcpu, ax_rd) ^= 0x8000000000000000ULL;
778 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
779 vcpu->arch.qpr[ax_rd] ^= 0x80000000;
783 emulated = EMULATE_FAIL;
787 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
788 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
792 emulated = EMULATE_FAIL;
796 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
797 VCPU_FPR(vcpu, ax_rd) |= 0x8000000000000000ULL;
798 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
799 vcpu->arch.qpr[ax_rd] |= 0x80000000;
803 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
804 VCPU_FPR(vcpu, ax_rd) &= ~0x8000000000000000ULL;
805 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
806 vcpu->arch.qpr[ax_rd] &= ~0x80000000;
808 case OP_4X_PS_MERGE00:
810 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_ra);
811 /* vcpu->arch.qpr[ax_rd] = VCPU_FPR(vcpu, ax_rb); */
812 kvm_cvt_df(&VCPU_FPR(vcpu, ax_rb),
813 &vcpu->arch.qpr[ax_rd]);
815 case OP_4X_PS_MERGE01:
817 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_ra);
818 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
820 case OP_4X_PS_MERGE10:
822 /* VCPU_FPR(vcpu, ax_rd) = vcpu->arch.qpr[ax_ra]; */
823 kvm_cvt_fd(&vcpu->arch.qpr[ax_ra],
824 &VCPU_FPR(vcpu, ax_rd));
825 /* vcpu->arch.qpr[ax_rd] = VCPU_FPR(vcpu, ax_rb); */
826 kvm_cvt_df(&VCPU_FPR(vcpu, ax_rb),
827 &vcpu->arch.qpr[ax_rd]);
829 case OP_4X_PS_MERGE11:
831 /* VCPU_FPR(vcpu, ax_rd) = vcpu->arch.qpr[ax_ra]; */
832 kvm_cvt_fd(&vcpu->arch.qpr[ax_ra],
833 &VCPU_FPR(vcpu, ax_rd));
834 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
838 switch (inst_get_field(inst, 25, 30)) {
841 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
842 bool w = inst_get_field(inst, 21, 21) ? true : false;
843 int i = inst_get_field(inst, 22, 24);
845 addr += kvmppc_get_gpr(vcpu, ax_rb);
846 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
849 case OP_4XW_PSQ_STUX:
851 ulong addr = kvmppc_get_gpr(vcpu, ax_ra);
852 bool w = inst_get_field(inst, 21, 21) ? true : false;
853 int i = inst_get_field(inst, 22, 24);
855 addr += kvmppc_get_gpr(vcpu, ax_rb);
856 emulated = kvmppc_emulate_psq_store(run, vcpu, ax_rd, addr, w, i);
858 if (emulated == EMULATE_DONE)
859 kvmppc_set_gpr(vcpu, ax_ra, addr);
864 switch (inst_get_field(inst, 26, 30)) {
866 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
867 ax_rb, ax_ra, SCALAR_NO_PS0 | SCALAR_HIGH, fps_fadds);
868 VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rc);
871 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
872 ax_ra, ax_rb, SCALAR_NO_PS1 | SCALAR_LOW, fps_fadds);
873 vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rc];
876 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
877 ax_ra, ax_rc, SCALAR_HIGH, fps_fmuls);
880 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
881 ax_ra, ax_rc, SCALAR_LOW, fps_fmuls);
883 case OP_4A_PS_MADDS0:
884 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
885 ax_ra, ax_rc, ax_rb, SCALAR_HIGH, fps_fmadds);
887 case OP_4A_PS_MADDS1:
888 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
889 ax_ra, ax_rc, ax_rb, SCALAR_LOW, fps_fmadds);
892 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
893 ax_ra, ax_rb, SCALAR_NONE, fps_fdivs);
896 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
897 ax_ra, ax_rb, SCALAR_NONE, fps_fsubs);
900 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
901 ax_ra, ax_rb, SCALAR_NONE, fps_fadds);
904 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
905 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fsel);
908 emulated = kvmppc_ps_one_in(vcpu, rcomp, ax_rd,
912 emulated = kvmppc_ps_two_in(vcpu, rcomp, ax_rd,
913 ax_ra, ax_rc, SCALAR_NONE, fps_fmuls);
915 case OP_4A_PS_RSQRTE:
916 emulated = kvmppc_ps_one_in(vcpu, rcomp, ax_rd,
920 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
921 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fmsubs);
924 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
925 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fmadds);
928 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
929 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fnmsubs);
932 emulated = kvmppc_ps_three_in(vcpu, rcomp, ax_rd,
933 ax_ra, ax_rc, ax_rb, SCALAR_NONE, fps_fnmadds);
938 /* Real FPU operations */
942 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
944 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
950 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
952 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
955 if (emulated == EMULATE_DONE)
956 kvmppc_set_gpr(vcpu, ax_ra, addr);
961 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
963 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
969 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
971 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd, addr,
974 if (emulated == EMULATE_DONE)
975 kvmppc_set_gpr(vcpu, ax_ra, addr);
980 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
982 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
988 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
990 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
993 if (emulated == EMULATE_DONE)
994 kvmppc_set_gpr(vcpu, ax_ra, addr);
999 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) + full_d;
1001 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
1007 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) + full_d;
1009 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd, addr,
1012 if (emulated == EMULATE_DONE)
1013 kvmppc_set_gpr(vcpu, ax_ra, addr);
1017 switch (inst_get_field(inst, 21, 30)) {
1020 ulong addr = ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0;
1022 addr += kvmppc_get_gpr(vcpu, ax_rb);
1023 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1024 addr, FPU_LS_SINGLE);
1029 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1030 kvmppc_get_gpr(vcpu, ax_rb);
1032 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1033 addr, FPU_LS_SINGLE);
1035 if (emulated == EMULATE_DONE)
1036 kvmppc_set_gpr(vcpu, ax_ra, addr);
1041 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1042 kvmppc_get_gpr(vcpu, ax_rb);
1044 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1045 addr, FPU_LS_DOUBLE);
1050 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1051 kvmppc_get_gpr(vcpu, ax_rb);
1053 emulated = kvmppc_emulate_fpr_load(run, vcpu, ax_rd,
1054 addr, FPU_LS_DOUBLE);
1056 if (emulated == EMULATE_DONE)
1057 kvmppc_set_gpr(vcpu, ax_ra, addr);
1062 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1063 kvmppc_get_gpr(vcpu, ax_rb);
1065 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1066 addr, FPU_LS_SINGLE);
1071 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1072 kvmppc_get_gpr(vcpu, ax_rb);
1074 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1075 addr, FPU_LS_SINGLE);
1077 if (emulated == EMULATE_DONE)
1078 kvmppc_set_gpr(vcpu, ax_ra, addr);
1083 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1084 kvmppc_get_gpr(vcpu, ax_rb);
1086 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1087 addr, FPU_LS_DOUBLE);
1092 ulong addr = kvmppc_get_gpr(vcpu, ax_ra) +
1093 kvmppc_get_gpr(vcpu, ax_rb);
1095 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1096 addr, FPU_LS_DOUBLE);
1098 if (emulated == EMULATE_DONE)
1099 kvmppc_set_gpr(vcpu, ax_ra, addr);
1104 ulong addr = (ax_ra ? kvmppc_get_gpr(vcpu, ax_ra) : 0) +
1105 kvmppc_get_gpr(vcpu, ax_rb);
1107 emulated = kvmppc_emulate_fpr_store(run, vcpu, ax_rd,
1116 switch (inst_get_field(inst, 21, 30)) {
1118 fpd_fadds(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1119 kvmppc_sync_qpr(vcpu, ax_rd);
1122 fpd_fsubs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1123 kvmppc_sync_qpr(vcpu, ax_rd);
1126 fpd_fdivs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1127 kvmppc_sync_qpr(vcpu, ax_rd);
1130 fpd_fres(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1131 kvmppc_sync_qpr(vcpu, ax_rd);
1133 case OP_59_FRSQRTES:
1134 fpd_frsqrtes(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1135 kvmppc_sync_qpr(vcpu, ax_rd);
1138 switch (inst_get_field(inst, 26, 30)) {
1140 fpd_fmuls(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c);
1141 kvmppc_sync_qpr(vcpu, ax_rd);
1144 fpd_fmsubs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1145 kvmppc_sync_qpr(vcpu, ax_rd);
1148 fpd_fmadds(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1149 kvmppc_sync_qpr(vcpu, ax_rd);
1152 fpd_fnmsubs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1153 kvmppc_sync_qpr(vcpu, ax_rd);
1156 fpd_fnmadds(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1157 kvmppc_sync_qpr(vcpu, ax_rd);
1162 switch (inst_get_field(inst, 21, 30)) {
1167 /* XXX need to implement */
1170 /* XXX missing CR */
1171 *fpr_d = vcpu->arch.fp.fpscr;
1174 /* XXX missing fm bits */
1175 /* XXX missing CR */
1176 vcpu->arch.fp.fpscr = *fpr_b;
1181 u32 cr0_mask = 0xf0000000;
1182 u32 cr_shift = inst_get_field(inst, 6, 8) * 4;
1184 fpd_fcmpu(&vcpu->arch.fp.fpscr, &tmp_cr, fpr_a, fpr_b);
1185 cr &= ~(cr0_mask >> cr_shift);
1186 cr |= (cr & cr0_mask) >> cr_shift;
1192 u32 cr0_mask = 0xf0000000;
1193 u32 cr_shift = inst_get_field(inst, 6, 8) * 4;
1195 fpd_fcmpo(&vcpu->arch.fp.fpscr, &tmp_cr, fpr_a, fpr_b);
1196 cr &= ~(cr0_mask >> cr_shift);
1197 cr |= (cr & cr0_mask) >> cr_shift;
1201 fpd_fneg(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1207 fpd_fabs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1210 fpd_fcpsgn(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1213 fpd_fdiv(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1216 fpd_fadd(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1219 fpd_fsub(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b);
1222 fpd_fctiw(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1225 fpd_fctiwz(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1228 fpd_frsp(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1229 kvmppc_sync_qpr(vcpu, ax_rd);
1236 fpd_fsqrt(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_b);
1237 /* fD = 1.0f / fD */
1238 fpd_fdiv(&vcpu->arch.fp.fpscr, &cr, fpr_d, (u64*)&one, fpr_d);
1242 switch (inst_get_field(inst, 26, 30)) {
1244 fpd_fmul(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c);
1247 fpd_fsel(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1250 fpd_fmsub(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1253 fpd_fmadd(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1256 fpd_fnmsub(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1259 fpd_fnmadd(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_c, fpr_b);
1266 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fp.fpr); i++) {
1268 kvm_cvt_df(&VCPU_FPR(vcpu, i), &f);
1269 dprintk(KERN_INFO "FPR[%d] = 0x%x\n", i, f);
1274 kvmppc_set_cr(vcpu, cr);