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KVM: PPC: BOOKE: Guest and hardware visible debug registers are same
[karo-tx-linux.git] / arch / powerpc / kvm / booke.c
1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License, version 2, as
4  * published by the Free Software Foundation.
5  *
6  * This program is distributed in the hope that it will be useful,
7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9  * GNU General Public License for more details.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program; if not, write to the Free Software
13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14  *
15  * Copyright IBM Corp. 2007
16  * Copyright 2010-2011 Freescale Semiconductor, Inc.
17  *
18  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20  *          Scott Wood <scottwood@freescale.com>
21  *          Varun Sethi <varun.sethi@freescale.com>
22  */
23
24 #include <linux/errno.h>
25 #include <linux/err.h>
26 #include <linux/kvm_host.h>
27 #include <linux/gfp.h>
28 #include <linux/module.h>
29 #include <linux/vmalloc.h>
30 #include <linux/fs.h>
31
32 #include <asm/cputable.h>
33 #include <asm/uaccess.h>
34 #include <asm/kvm_ppc.h>
35 #include <asm/cacheflush.h>
36 #include <asm/dbell.h>
37 #include <asm/hw_irq.h>
38 #include <asm/irq.h>
39 #include <asm/time.h>
40
41 #include "timing.h"
42 #include "booke.h"
43
44 #define CREATE_TRACE_POINTS
45 #include "trace_booke.h"
46
47 unsigned long kvmppc_booke_handlers;
48
49 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
50 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
51
52 struct kvm_stats_debugfs_item debugfs_entries[] = {
53         { "mmio",       VCPU_STAT(mmio_exits) },
54         { "sig",        VCPU_STAT(signal_exits) },
55         { "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
56         { "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
57         { "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
58         { "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
59         { "sysc",       VCPU_STAT(syscall_exits) },
60         { "isi",        VCPU_STAT(isi_exits) },
61         { "dsi",        VCPU_STAT(dsi_exits) },
62         { "inst_emu",   VCPU_STAT(emulated_inst_exits) },
63         { "dec",        VCPU_STAT(dec_exits) },
64         { "ext_intr",   VCPU_STAT(ext_intr_exits) },
65         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
66         { "doorbell", VCPU_STAT(dbell_exits) },
67         { "guest doorbell", VCPU_STAT(gdbell_exits) },
68         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
69         { NULL }
70 };
71
72 /* TODO: use vcpu_printf() */
73 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
74 {
75         int i;
76
77         printk("pc:   %08lx msr:  %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
78         printk("lr:   %08lx ctr:  %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
79         printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
80                                             vcpu->arch.shared->srr1);
81
82         printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
83
84         for (i = 0; i < 32; i += 4) {
85                 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
86                        kvmppc_get_gpr(vcpu, i),
87                        kvmppc_get_gpr(vcpu, i+1),
88                        kvmppc_get_gpr(vcpu, i+2),
89                        kvmppc_get_gpr(vcpu, i+3));
90         }
91 }
92
93 #ifdef CONFIG_SPE
94 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
95 {
96         preempt_disable();
97         enable_kernel_spe();
98         kvmppc_save_guest_spe(vcpu);
99         vcpu->arch.shadow_msr &= ~MSR_SPE;
100         preempt_enable();
101 }
102
103 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
104 {
105         preempt_disable();
106         enable_kernel_spe();
107         kvmppc_load_guest_spe(vcpu);
108         vcpu->arch.shadow_msr |= MSR_SPE;
109         preempt_enable();
110 }
111
112 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
113 {
114         if (vcpu->arch.shared->msr & MSR_SPE) {
115                 if (!(vcpu->arch.shadow_msr & MSR_SPE))
116                         kvmppc_vcpu_enable_spe(vcpu);
117         } else if (vcpu->arch.shadow_msr & MSR_SPE) {
118                 kvmppc_vcpu_disable_spe(vcpu);
119         }
120 }
121 #else
122 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
123 {
124 }
125 #endif
126
127 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
128 {
129 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
130         /* We always treat the FP bit as enabled from the host
131            perspective, so only need to adjust the shadow MSR */
132         vcpu->arch.shadow_msr &= ~MSR_FP;
133         vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
134 #endif
135 }
136
137 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu)
138 {
139         /* Synchronize guest's desire to get debug interrupts into shadow MSR */
140 #ifndef CONFIG_KVM_BOOKE_HV
141         vcpu->arch.shadow_msr &= ~MSR_DE;
142         vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;
143 #endif
144
145         /* Force enable debug interrupts when user space wants to debug */
146         if (vcpu->guest_debug) {
147 #ifdef CONFIG_KVM_BOOKE_HV
148                 /*
149                  * Since there is no shadow MSR, sync MSR_DE into the guest
150                  * visible MSR.
151                  */
152                 vcpu->arch.shared->msr |= MSR_DE;
153 #else
154                 vcpu->arch.shadow_msr |= MSR_DE;
155                 vcpu->arch.shared->msr &= ~MSR_DE;
156 #endif
157         }
158 }
159
160 /*
161  * Helper function for "full" MSR writes.  No need to call this if only
162  * EE/CE/ME/DE/RI are changing.
163  */
164 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
165 {
166         u32 old_msr = vcpu->arch.shared->msr;
167
168 #ifdef CONFIG_KVM_BOOKE_HV
169         new_msr |= MSR_GS;
170 #endif
171
172         vcpu->arch.shared->msr = new_msr;
173
174         kvmppc_mmu_msr_notify(vcpu, old_msr);
175         kvmppc_vcpu_sync_spe(vcpu);
176         kvmppc_vcpu_sync_fpu(vcpu);
177         kvmppc_vcpu_sync_debug(vcpu);
178 }
179
180 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
181                                        unsigned int priority)
182 {
183         trace_kvm_booke_queue_irqprio(vcpu, priority);
184         set_bit(priority, &vcpu->arch.pending_exceptions);
185 }
186
187 void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
188                                  ulong dear_flags, ulong esr_flags)
189 {
190         vcpu->arch.queued_dear = dear_flags;
191         vcpu->arch.queued_esr = esr_flags;
192         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
193 }
194
195 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
196                                     ulong dear_flags, ulong esr_flags)
197 {
198         vcpu->arch.queued_dear = dear_flags;
199         vcpu->arch.queued_esr = esr_flags;
200         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
201 }
202
203 void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu)
204 {
205         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
206 }
207
208 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags)
209 {
210         vcpu->arch.queued_esr = esr_flags;
211         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
212 }
213
214 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
215                                         ulong esr_flags)
216 {
217         vcpu->arch.queued_dear = dear_flags;
218         vcpu->arch.queued_esr = esr_flags;
219         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
220 }
221
222 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
223 {
224         vcpu->arch.queued_esr = esr_flags;
225         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
226 }
227
228 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
229 {
230         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
231 }
232
233 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
234 {
235         return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
236 }
237
238 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
239 {
240         clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
241 }
242
243 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
244                                 struct kvm_interrupt *irq)
245 {
246         unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
247
248         if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
249                 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
250
251         kvmppc_booke_queue_irqprio(vcpu, prio);
252 }
253
254 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
255 {
256         clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
257         clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
258 }
259
260 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
261 {
262         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
263 }
264
265 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
266 {
267         clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
268 }
269
270 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
271 {
272         kvmppc_set_srr0(vcpu, srr0);
273         kvmppc_set_srr1(vcpu, srr1);
274 }
275
276 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
277 {
278         vcpu->arch.csrr0 = srr0;
279         vcpu->arch.csrr1 = srr1;
280 }
281
282 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
283 {
284         if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
285                 vcpu->arch.dsrr0 = srr0;
286                 vcpu->arch.dsrr1 = srr1;
287         } else {
288                 set_guest_csrr(vcpu, srr0, srr1);
289         }
290 }
291
292 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
293 {
294         vcpu->arch.mcsrr0 = srr0;
295         vcpu->arch.mcsrr1 = srr1;
296 }
297
298 /* Deliver the interrupt of the corresponding priority, if possible. */
299 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
300                                         unsigned int priority)
301 {
302         int allowed = 0;
303         ulong msr_mask = 0;
304         bool update_esr = false, update_dear = false, update_epr = false;
305         ulong crit_raw = vcpu->arch.shared->critical;
306         ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
307         bool crit;
308         bool keep_irq = false;
309         enum int_class int_class;
310         ulong new_msr = vcpu->arch.shared->msr;
311
312         /* Truncate crit indicators in 32 bit mode */
313         if (!(vcpu->arch.shared->msr & MSR_SF)) {
314                 crit_raw &= 0xffffffff;
315                 crit_r1 &= 0xffffffff;
316         }
317
318         /* Critical section when crit == r1 */
319         crit = (crit_raw == crit_r1);
320         /* ... and we're in supervisor mode */
321         crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
322
323         if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
324                 priority = BOOKE_IRQPRIO_EXTERNAL;
325                 keep_irq = true;
326         }
327
328         if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
329                 update_epr = true;
330
331         switch (priority) {
332         case BOOKE_IRQPRIO_DTLB_MISS:
333         case BOOKE_IRQPRIO_DATA_STORAGE:
334         case BOOKE_IRQPRIO_ALIGNMENT:
335                 update_dear = true;
336                 /* fall through */
337         case BOOKE_IRQPRIO_INST_STORAGE:
338         case BOOKE_IRQPRIO_PROGRAM:
339                 update_esr = true;
340                 /* fall through */
341         case BOOKE_IRQPRIO_ITLB_MISS:
342         case BOOKE_IRQPRIO_SYSCALL:
343         case BOOKE_IRQPRIO_FP_UNAVAIL:
344         case BOOKE_IRQPRIO_SPE_UNAVAIL:
345         case BOOKE_IRQPRIO_SPE_FP_DATA:
346         case BOOKE_IRQPRIO_SPE_FP_ROUND:
347         case BOOKE_IRQPRIO_AP_UNAVAIL:
348                 allowed = 1;
349                 msr_mask = MSR_CE | MSR_ME | MSR_DE;
350                 int_class = INT_CLASS_NONCRIT;
351                 break;
352         case BOOKE_IRQPRIO_WATCHDOG:
353         case BOOKE_IRQPRIO_CRITICAL:
354         case BOOKE_IRQPRIO_DBELL_CRIT:
355                 allowed = vcpu->arch.shared->msr & MSR_CE;
356                 allowed = allowed && !crit;
357                 msr_mask = MSR_ME;
358                 int_class = INT_CLASS_CRIT;
359                 break;
360         case BOOKE_IRQPRIO_MACHINE_CHECK:
361                 allowed = vcpu->arch.shared->msr & MSR_ME;
362                 allowed = allowed && !crit;
363                 int_class = INT_CLASS_MC;
364                 break;
365         case BOOKE_IRQPRIO_DECREMENTER:
366         case BOOKE_IRQPRIO_FIT:
367                 keep_irq = true;
368                 /* fall through */
369         case BOOKE_IRQPRIO_EXTERNAL:
370         case BOOKE_IRQPRIO_DBELL:
371                 allowed = vcpu->arch.shared->msr & MSR_EE;
372                 allowed = allowed && !crit;
373                 msr_mask = MSR_CE | MSR_ME | MSR_DE;
374                 int_class = INT_CLASS_NONCRIT;
375                 break;
376         case BOOKE_IRQPRIO_DEBUG:
377                 allowed = vcpu->arch.shared->msr & MSR_DE;
378                 allowed = allowed && !crit;
379                 msr_mask = MSR_ME;
380                 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
381                         int_class = INT_CLASS_DBG;
382                 else
383                         int_class = INT_CLASS_CRIT;
384
385                 break;
386         }
387
388         if (allowed) {
389                 switch (int_class) {
390                 case INT_CLASS_NONCRIT:
391                         set_guest_srr(vcpu, vcpu->arch.pc,
392                                       vcpu->arch.shared->msr);
393                         break;
394                 case INT_CLASS_CRIT:
395                         set_guest_csrr(vcpu, vcpu->arch.pc,
396                                        vcpu->arch.shared->msr);
397                         break;
398                 case INT_CLASS_DBG:
399                         set_guest_dsrr(vcpu, vcpu->arch.pc,
400                                        vcpu->arch.shared->msr);
401                         break;
402                 case INT_CLASS_MC:
403                         set_guest_mcsrr(vcpu, vcpu->arch.pc,
404                                         vcpu->arch.shared->msr);
405                         break;
406                 }
407
408                 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
409                 if (update_esr == true)
410                         kvmppc_set_esr(vcpu, vcpu->arch.queued_esr);
411                 if (update_dear == true)
412                         kvmppc_set_dar(vcpu, vcpu->arch.queued_dear);
413                 if (update_epr == true) {
414                         if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
415                                 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
416                         else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
417                                 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
418                                 kvmppc_mpic_set_epr(vcpu);
419                         }
420                 }
421
422                 new_msr &= msr_mask;
423 #if defined(CONFIG_64BIT)
424                 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
425                         new_msr |= MSR_CM;
426 #endif
427                 kvmppc_set_msr(vcpu, new_msr);
428
429                 if (!keep_irq)
430                         clear_bit(priority, &vcpu->arch.pending_exceptions);
431         }
432
433 #ifdef CONFIG_KVM_BOOKE_HV
434         /*
435          * If an interrupt is pending but masked, raise a guest doorbell
436          * so that we are notified when the guest enables the relevant
437          * MSR bit.
438          */
439         if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
440                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
441         if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
442                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
443         if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
444                 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
445 #endif
446
447         return allowed;
448 }
449
450 /*
451  * Return the number of jiffies until the next timeout.  If the timeout is
452  * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
453  * because the larger value can break the timer APIs.
454  */
455 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
456 {
457         u64 tb, wdt_tb, wdt_ticks = 0;
458         u64 nr_jiffies = 0;
459         u32 period = TCR_GET_WP(vcpu->arch.tcr);
460
461         wdt_tb = 1ULL << (63 - period);
462         tb = get_tb();
463         /*
464          * The watchdog timeout will hapeen when TB bit corresponding
465          * to watchdog will toggle from 0 to 1.
466          */
467         if (tb & wdt_tb)
468                 wdt_ticks = wdt_tb;
469
470         wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
471
472         /* Convert timebase ticks to jiffies */
473         nr_jiffies = wdt_ticks;
474
475         if (do_div(nr_jiffies, tb_ticks_per_jiffy))
476                 nr_jiffies++;
477
478         return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
479 }
480
481 static void arm_next_watchdog(struct kvm_vcpu *vcpu)
482 {
483         unsigned long nr_jiffies;
484         unsigned long flags;
485
486         /*
487          * If TSR_ENW and TSR_WIS are not set then no need to exit to
488          * userspace, so clear the KVM_REQ_WATCHDOG request.
489          */
490         if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
491                 clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests);
492
493         spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
494         nr_jiffies = watchdog_next_timeout(vcpu);
495         /*
496          * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
497          * then do not run the watchdog timer as this can break timer APIs.
498          */
499         if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
500                 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
501         else
502                 del_timer(&vcpu->arch.wdt_timer);
503         spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
504 }
505
506 void kvmppc_watchdog_func(unsigned long data)
507 {
508         struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
509         u32 tsr, new_tsr;
510         int final;
511
512         do {
513                 new_tsr = tsr = vcpu->arch.tsr;
514                 final = 0;
515
516                 /* Time out event */
517                 if (tsr & TSR_ENW) {
518                         if (tsr & TSR_WIS)
519                                 final = 1;
520                         else
521                                 new_tsr = tsr | TSR_WIS;
522                 } else {
523                         new_tsr = tsr | TSR_ENW;
524                 }
525         } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
526
527         if (new_tsr & TSR_WIS) {
528                 smp_wmb();
529                 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
530                 kvm_vcpu_kick(vcpu);
531         }
532
533         /*
534          * If this is final watchdog expiry and some action is required
535          * then exit to userspace.
536          */
537         if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
538             vcpu->arch.watchdog_enabled) {
539                 smp_wmb();
540                 kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
541                 kvm_vcpu_kick(vcpu);
542         }
543
544         /*
545          * Stop running the watchdog timer after final expiration to
546          * prevent the host from being flooded with timers if the
547          * guest sets a short period.
548          * Timers will resume when TSR/TCR is updated next time.
549          */
550         if (!final)
551                 arm_next_watchdog(vcpu);
552 }
553
554 static void update_timer_ints(struct kvm_vcpu *vcpu)
555 {
556         if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
557                 kvmppc_core_queue_dec(vcpu);
558         else
559                 kvmppc_core_dequeue_dec(vcpu);
560
561         if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
562                 kvmppc_core_queue_watchdog(vcpu);
563         else
564                 kvmppc_core_dequeue_watchdog(vcpu);
565 }
566
567 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
568 {
569         unsigned long *pending = &vcpu->arch.pending_exceptions;
570         unsigned int priority;
571
572         priority = __ffs(*pending);
573         while (priority < BOOKE_IRQPRIO_MAX) {
574                 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
575                         break;
576
577                 priority = find_next_bit(pending,
578                                          BITS_PER_BYTE * sizeof(*pending),
579                                          priority + 1);
580         }
581
582         /* Tell the guest about our interrupt status */
583         vcpu->arch.shared->int_pending = !!*pending;
584 }
585
586 /* Check pending exceptions and deliver one, if possible. */
587 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
588 {
589         int r = 0;
590         WARN_ON_ONCE(!irqs_disabled());
591
592         kvmppc_core_check_exceptions(vcpu);
593
594         if (vcpu->requests) {
595                 /* Exception delivery raised request; start over */
596                 return 1;
597         }
598
599         if (vcpu->arch.shared->msr & MSR_WE) {
600                 local_irq_enable();
601                 kvm_vcpu_block(vcpu);
602                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
603                 hard_irq_disable();
604
605                 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
606                 r = 1;
607         };
608
609         return r;
610 }
611
612 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
613 {
614         int r = 1; /* Indicate we want to get back into the guest */
615
616         if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
617                 update_timer_ints(vcpu);
618 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
619         if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
620                 kvmppc_core_flush_tlb(vcpu);
621 #endif
622
623         if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
624                 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
625                 r = 0;
626         }
627
628         if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
629                 vcpu->run->epr.epr = 0;
630                 vcpu->arch.epr_needed = true;
631                 vcpu->run->exit_reason = KVM_EXIT_EPR;
632                 r = 0;
633         }
634
635         return r;
636 }
637
638 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
639 {
640         int ret, s;
641         struct debug_reg debug;
642
643         if (!vcpu->arch.sane) {
644                 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
645                 return -EINVAL;
646         }
647
648         s = kvmppc_prepare_to_enter(vcpu);
649         if (s <= 0) {
650                 ret = s;
651                 goto out;
652         }
653         /* interrupts now hard-disabled */
654
655 #ifdef CONFIG_PPC_FPU
656         /* Save userspace FPU state in stack */
657         enable_kernel_fp();
658
659         /*
660          * Since we can't trap on MSR_FP in GS-mode, we consider the guest
661          * as always using the FPU.  Kernel usage of FP (via
662          * enable_kernel_fp()) in this thread must not occur while
663          * vcpu->fpu_active is set.
664          */
665         vcpu->fpu_active = 1;
666
667         kvmppc_load_guest_fp(vcpu);
668 #endif
669
670         /* Switch to guest debug context */
671         debug = vcpu->arch.dbg_reg;
672         switch_booke_debug_regs(&debug);
673         debug = current->thread.debug;
674         current->thread.debug = vcpu->arch.dbg_reg;
675
676         vcpu->arch.pgdir = current->mm->pgd;
677         kvmppc_fix_ee_before_entry();
678
679         ret = __kvmppc_vcpu_run(kvm_run, vcpu);
680
681         /* No need for kvm_guest_exit. It's done in handle_exit.
682            We also get here with interrupts enabled. */
683
684         /* Switch back to user space debug context */
685         switch_booke_debug_regs(&debug);
686         current->thread.debug = debug;
687
688 #ifdef CONFIG_PPC_FPU
689         kvmppc_save_guest_fp(vcpu);
690
691         vcpu->fpu_active = 0;
692 #endif
693
694 out:
695         vcpu->mode = OUTSIDE_GUEST_MODE;
696         return ret;
697 }
698
699 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
700 {
701         enum emulation_result er;
702
703         er = kvmppc_emulate_instruction(run, vcpu);
704         switch (er) {
705         case EMULATE_DONE:
706                 /* don't overwrite subtypes, just account kvm_stats */
707                 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
708                 /* Future optimization: only reload non-volatiles if
709                  * they were actually modified by emulation. */
710                 return RESUME_GUEST_NV;
711
712         case EMULATE_AGAIN:
713                 return RESUME_GUEST;
714
715         case EMULATE_FAIL:
716                 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
717                        __func__, vcpu->arch.pc, vcpu->arch.last_inst);
718                 /* For debugging, encode the failing instruction and
719                  * report it to userspace. */
720                 run->hw.hardware_exit_reason = ~0ULL << 32;
721                 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
722                 kvmppc_core_queue_program(vcpu, ESR_PIL);
723                 return RESUME_HOST;
724
725         case EMULATE_EXIT_USER:
726                 return RESUME_HOST;
727
728         default:
729                 BUG();
730         }
731 }
732
733 static int kvmppc_handle_debug(struct kvm_run *run, struct kvm_vcpu *vcpu)
734 {
735         struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg);
736         u32 dbsr = vcpu->arch.dbsr;
737
738         /* Clear guest dbsr (vcpu->arch.dbsr) */
739         vcpu->arch.dbsr = 0;
740         run->debug.arch.status = 0;
741         run->debug.arch.address = vcpu->arch.pc;
742
743         if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) {
744                 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT;
745         } else {
746                 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W))
747                         run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE;
748                 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R))
749                         run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ;
750                 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W))
751                         run->debug.arch.address = dbg_reg->dac1;
752                 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W))
753                         run->debug.arch.address = dbg_reg->dac2;
754         }
755
756         return RESUME_HOST;
757 }
758
759 static void kvmppc_fill_pt_regs(struct pt_regs *regs)
760 {
761         ulong r1, ip, msr, lr;
762
763         asm("mr %0, 1" : "=r"(r1));
764         asm("mflr %0" : "=r"(lr));
765         asm("mfmsr %0" : "=r"(msr));
766         asm("bl 1f; 1: mflr %0" : "=r"(ip));
767
768         memset(regs, 0, sizeof(*regs));
769         regs->gpr[1] = r1;
770         regs->nip = ip;
771         regs->msr = msr;
772         regs->link = lr;
773 }
774
775 /*
776  * For interrupts needed to be handled by host interrupt handlers,
777  * corresponding host handler are called from here in similar way
778  * (but not exact) as they are called from low level handler
779  * (such as from arch/powerpc/kernel/head_fsl_booke.S).
780  */
781 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
782                                      unsigned int exit_nr)
783 {
784         struct pt_regs regs;
785
786         switch (exit_nr) {
787         case BOOKE_INTERRUPT_EXTERNAL:
788                 kvmppc_fill_pt_regs(&regs);
789                 do_IRQ(&regs);
790                 break;
791         case BOOKE_INTERRUPT_DECREMENTER:
792                 kvmppc_fill_pt_regs(&regs);
793                 timer_interrupt(&regs);
794                 break;
795 #if defined(CONFIG_PPC_DOORBELL)
796         case BOOKE_INTERRUPT_DOORBELL:
797                 kvmppc_fill_pt_regs(&regs);
798                 doorbell_exception(&regs);
799                 break;
800 #endif
801         case BOOKE_INTERRUPT_MACHINE_CHECK:
802                 /* FIXME */
803                 break;
804         case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
805                 kvmppc_fill_pt_regs(&regs);
806                 performance_monitor_exception(&regs);
807                 break;
808         case BOOKE_INTERRUPT_WATCHDOG:
809                 kvmppc_fill_pt_regs(&regs);
810 #ifdef CONFIG_BOOKE_WDT
811                 WatchdogException(&regs);
812 #else
813                 unknown_exception(&regs);
814 #endif
815                 break;
816         case BOOKE_INTERRUPT_CRITICAL:
817                 unknown_exception(&regs);
818                 break;
819         case BOOKE_INTERRUPT_DEBUG:
820                 /* Save DBSR before preemption is enabled */
821                 vcpu->arch.dbsr = mfspr(SPRN_DBSR);
822                 kvmppc_clear_dbsr();
823                 break;
824         }
825 }
826
827 static int kvmppc_resume_inst_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
828                                   enum emulation_result emulated, u32 last_inst)
829 {
830         switch (emulated) {
831         case EMULATE_AGAIN:
832                 return RESUME_GUEST;
833
834         case EMULATE_FAIL:
835                 pr_debug("%s: load instruction from guest address %lx failed\n",
836                        __func__, vcpu->arch.pc);
837                 /* For debugging, encode the failing instruction and
838                  * report it to userspace. */
839                 run->hw.hardware_exit_reason = ~0ULL << 32;
840                 run->hw.hardware_exit_reason |= last_inst;
841                 kvmppc_core_queue_program(vcpu, ESR_PIL);
842                 return RESUME_HOST;
843
844         default:
845                 BUG();
846         }
847 }
848
849 /**
850  * kvmppc_handle_exit
851  *
852  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
853  */
854 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
855                        unsigned int exit_nr)
856 {
857         int r = RESUME_HOST;
858         int s;
859         int idx;
860         u32 last_inst = KVM_INST_FETCH_FAILED;
861         enum emulation_result emulated = EMULATE_DONE;
862
863         /* update before a new last_exit_type is rewritten */
864         kvmppc_update_timing_stats(vcpu);
865
866         /* restart interrupts if they were meant for the host */
867         kvmppc_restart_interrupt(vcpu, exit_nr);
868
869         /*
870          * get last instruction before beeing preempted
871          * TODO: for e6500 check also BOOKE_INTERRUPT_LRAT_ERROR & ESR_DATA
872          */
873         switch (exit_nr) {
874         case BOOKE_INTERRUPT_DATA_STORAGE:
875         case BOOKE_INTERRUPT_DTLB_MISS:
876         case BOOKE_INTERRUPT_HV_PRIV:
877                 emulated = kvmppc_get_last_inst(vcpu, false, &last_inst);
878                 break;
879         default:
880                 break;
881         }
882
883         local_irq_enable();
884
885         trace_kvm_exit(exit_nr, vcpu);
886         kvm_guest_exit();
887
888         run->exit_reason = KVM_EXIT_UNKNOWN;
889         run->ready_for_interrupt_injection = 1;
890
891         if (emulated != EMULATE_DONE) {
892                 r = kvmppc_resume_inst_load(run, vcpu, emulated, last_inst);
893                 goto out;
894         }
895
896         switch (exit_nr) {
897         case BOOKE_INTERRUPT_MACHINE_CHECK:
898                 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
899                 kvmppc_dump_vcpu(vcpu);
900                 /* For debugging, send invalid exit reason to user space */
901                 run->hw.hardware_exit_reason = ~1ULL << 32;
902                 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
903                 r = RESUME_HOST;
904                 break;
905
906         case BOOKE_INTERRUPT_EXTERNAL:
907                 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
908                 r = RESUME_GUEST;
909                 break;
910
911         case BOOKE_INTERRUPT_DECREMENTER:
912                 kvmppc_account_exit(vcpu, DEC_EXITS);
913                 r = RESUME_GUEST;
914                 break;
915
916         case BOOKE_INTERRUPT_WATCHDOG:
917                 r = RESUME_GUEST;
918                 break;
919
920         case BOOKE_INTERRUPT_DOORBELL:
921                 kvmppc_account_exit(vcpu, DBELL_EXITS);
922                 r = RESUME_GUEST;
923                 break;
924
925         case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
926                 kvmppc_account_exit(vcpu, GDBELL_EXITS);
927
928                 /*
929                  * We are here because there is a pending guest interrupt
930                  * which could not be delivered as MSR_CE or MSR_ME was not
931                  * set.  Once we break from here we will retry delivery.
932                  */
933                 r = RESUME_GUEST;
934                 break;
935
936         case BOOKE_INTERRUPT_GUEST_DBELL:
937                 kvmppc_account_exit(vcpu, GDBELL_EXITS);
938
939                 /*
940                  * We are here because there is a pending guest interrupt
941                  * which could not be delivered as MSR_EE was not set.  Once
942                  * we break from here we will retry delivery.
943                  */
944                 r = RESUME_GUEST;
945                 break;
946
947         case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
948                 r = RESUME_GUEST;
949                 break;
950
951         case BOOKE_INTERRUPT_HV_PRIV:
952                 r = emulation_exit(run, vcpu);
953                 break;
954
955         case BOOKE_INTERRUPT_PROGRAM:
956                 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
957                         /*
958                          * Program traps generated by user-level software must
959                          * be handled by the guest kernel.
960                          *
961                          * In GS mode, hypervisor privileged instructions trap
962                          * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
963                          * actual program interrupts, handled by the guest.
964                          */
965                         kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
966                         r = RESUME_GUEST;
967                         kvmppc_account_exit(vcpu, USR_PR_INST);
968                         break;
969                 }
970
971                 r = emulation_exit(run, vcpu);
972                 break;
973
974         case BOOKE_INTERRUPT_FP_UNAVAIL:
975                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
976                 kvmppc_account_exit(vcpu, FP_UNAVAIL);
977                 r = RESUME_GUEST;
978                 break;
979
980 #ifdef CONFIG_SPE
981         case BOOKE_INTERRUPT_SPE_UNAVAIL: {
982                 if (vcpu->arch.shared->msr & MSR_SPE)
983                         kvmppc_vcpu_enable_spe(vcpu);
984                 else
985                         kvmppc_booke_queue_irqprio(vcpu,
986                                                    BOOKE_IRQPRIO_SPE_UNAVAIL);
987                 r = RESUME_GUEST;
988                 break;
989         }
990
991         case BOOKE_INTERRUPT_SPE_FP_DATA:
992                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
993                 r = RESUME_GUEST;
994                 break;
995
996         case BOOKE_INTERRUPT_SPE_FP_ROUND:
997                 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
998                 r = RESUME_GUEST;
999                 break;
1000 #else
1001         case BOOKE_INTERRUPT_SPE_UNAVAIL:
1002                 /*
1003                  * Guest wants SPE, but host kernel doesn't support it.  Send
1004                  * an "unimplemented operation" program check to the guest.
1005                  */
1006                 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
1007                 r = RESUME_GUEST;
1008                 break;
1009
1010         /*
1011          * These really should never happen without CONFIG_SPE,
1012          * as we should never enable the real MSR[SPE] in the guest.
1013          */
1014         case BOOKE_INTERRUPT_SPE_FP_DATA:
1015         case BOOKE_INTERRUPT_SPE_FP_ROUND:
1016                 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
1017                        __func__, exit_nr, vcpu->arch.pc);
1018                 run->hw.hardware_exit_reason = exit_nr;
1019                 r = RESUME_HOST;
1020                 break;
1021 #endif
1022
1023         case BOOKE_INTERRUPT_DATA_STORAGE:
1024                 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
1025                                                vcpu->arch.fault_esr);
1026                 kvmppc_account_exit(vcpu, DSI_EXITS);
1027                 r = RESUME_GUEST;
1028                 break;
1029
1030         case BOOKE_INTERRUPT_INST_STORAGE:
1031                 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
1032                 kvmppc_account_exit(vcpu, ISI_EXITS);
1033                 r = RESUME_GUEST;
1034                 break;
1035
1036         case BOOKE_INTERRUPT_ALIGNMENT:
1037                 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1038                                             vcpu->arch.fault_esr);
1039                 r = RESUME_GUEST;
1040                 break;
1041
1042 #ifdef CONFIG_KVM_BOOKE_HV
1043         case BOOKE_INTERRUPT_HV_SYSCALL:
1044                 if (!(vcpu->arch.shared->msr & MSR_PR)) {
1045                         kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1046                 } else {
1047                         /*
1048                          * hcall from guest userspace -- send privileged
1049                          * instruction program check.
1050                          */
1051                         kvmppc_core_queue_program(vcpu, ESR_PPR);
1052                 }
1053
1054                 r = RESUME_GUEST;
1055                 break;
1056 #else
1057         case BOOKE_INTERRUPT_SYSCALL:
1058                 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1059                     (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1060                         /* KVM PV hypercalls */
1061                         kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1062                         r = RESUME_GUEST;
1063                 } else {
1064                         /* Guest syscalls */
1065                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
1066                 }
1067                 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1068                 r = RESUME_GUEST;
1069                 break;
1070 #endif
1071
1072         case BOOKE_INTERRUPT_DTLB_MISS: {
1073                 unsigned long eaddr = vcpu->arch.fault_dear;
1074                 int gtlb_index;
1075                 gpa_t gpaddr;
1076                 gfn_t gfn;
1077
1078 #ifdef CONFIG_KVM_E500V2
1079                 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1080                     (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1081                         kvmppc_map_magic(vcpu);
1082                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1083                         r = RESUME_GUEST;
1084
1085                         break;
1086                 }
1087 #endif
1088
1089                 /* Check the guest TLB. */
1090                 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1091                 if (gtlb_index < 0) {
1092                         /* The guest didn't have a mapping for it. */
1093                         kvmppc_core_queue_dtlb_miss(vcpu,
1094                                                     vcpu->arch.fault_dear,
1095                                                     vcpu->arch.fault_esr);
1096                         kvmppc_mmu_dtlb_miss(vcpu);
1097                         kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1098                         r = RESUME_GUEST;
1099                         break;
1100                 }
1101
1102                 idx = srcu_read_lock(&vcpu->kvm->srcu);
1103
1104                 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1105                 gfn = gpaddr >> PAGE_SHIFT;
1106
1107                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1108                         /* The guest TLB had a mapping, but the shadow TLB
1109                          * didn't, and it is RAM. This could be because:
1110                          * a) the entry is mapping the host kernel, or
1111                          * b) the guest used a large mapping which we're faking
1112                          * Either way, we need to satisfy the fault without
1113                          * invoking the guest. */
1114                         kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1115                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1116                         r = RESUME_GUEST;
1117                 } else {
1118                         /* Guest has mapped and accessed a page which is not
1119                          * actually RAM. */
1120                         vcpu->arch.paddr_accessed = gpaddr;
1121                         vcpu->arch.vaddr_accessed = eaddr;
1122                         r = kvmppc_emulate_mmio(run, vcpu);
1123                         kvmppc_account_exit(vcpu, MMIO_EXITS);
1124                 }
1125
1126                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1127                 break;
1128         }
1129
1130         case BOOKE_INTERRUPT_ITLB_MISS: {
1131                 unsigned long eaddr = vcpu->arch.pc;
1132                 gpa_t gpaddr;
1133                 gfn_t gfn;
1134                 int gtlb_index;
1135
1136                 r = RESUME_GUEST;
1137
1138                 /* Check the guest TLB. */
1139                 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1140                 if (gtlb_index < 0) {
1141                         /* The guest didn't have a mapping for it. */
1142                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1143                         kvmppc_mmu_itlb_miss(vcpu);
1144                         kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1145                         break;
1146                 }
1147
1148                 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1149
1150                 idx = srcu_read_lock(&vcpu->kvm->srcu);
1151
1152                 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1153                 gfn = gpaddr >> PAGE_SHIFT;
1154
1155                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1156                         /* The guest TLB had a mapping, but the shadow TLB
1157                          * didn't. This could be because:
1158                          * a) the entry is mapping the host kernel, or
1159                          * b) the guest used a large mapping which we're faking
1160                          * Either way, we need to satisfy the fault without
1161                          * invoking the guest. */
1162                         kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1163                 } else {
1164                         /* Guest mapped and leaped at non-RAM! */
1165                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1166                 }
1167
1168                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1169                 break;
1170         }
1171
1172         case BOOKE_INTERRUPT_DEBUG: {
1173                 r = kvmppc_handle_debug(run, vcpu);
1174                 if (r == RESUME_HOST)
1175                         run->exit_reason = KVM_EXIT_DEBUG;
1176                 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1177                 break;
1178         }
1179
1180         default:
1181                 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1182                 BUG();
1183         }
1184
1185 out:
1186         /*
1187          * To avoid clobbering exit_reason, only check for signals if we
1188          * aren't already exiting to userspace for some other reason.
1189          */
1190         if (!(r & RESUME_HOST)) {
1191                 s = kvmppc_prepare_to_enter(vcpu);
1192                 if (s <= 0)
1193                         r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
1194                 else {
1195                         /* interrupts now hard-disabled */
1196                         kvmppc_fix_ee_before_entry();
1197                 }
1198         }
1199
1200         return r;
1201 }
1202
1203 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1204 {
1205         u32 old_tsr = vcpu->arch.tsr;
1206
1207         vcpu->arch.tsr = new_tsr;
1208
1209         if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1210                 arm_next_watchdog(vcpu);
1211
1212         update_timer_ints(vcpu);
1213 }
1214
1215 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
1216 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1217 {
1218         int i;
1219         int r;
1220
1221         vcpu->arch.pc = 0;
1222         vcpu->arch.shared->pir = vcpu->vcpu_id;
1223         kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
1224         kvmppc_set_msr(vcpu, 0);
1225
1226 #ifndef CONFIG_KVM_BOOKE_HV
1227         vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS;
1228         vcpu->arch.shadow_pid = 1;
1229         vcpu->arch.shared->msr = 0;
1230 #endif
1231
1232         /* Eye-catching numbers so we know if the guest takes an interrupt
1233          * before it's programmed its own IVPR/IVORs. */
1234         vcpu->arch.ivpr = 0x55550000;
1235         for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
1236                 vcpu->arch.ivor[i] = 0x7700 | i * 4;
1237
1238         kvmppc_init_timing_stats(vcpu);
1239
1240         r = kvmppc_core_vcpu_setup(vcpu);
1241         kvmppc_sanity_check(vcpu);
1242         return r;
1243 }
1244
1245 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1246 {
1247         /* setup watchdog timer once */
1248         spin_lock_init(&vcpu->arch.wdt_lock);
1249         setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func,
1250                     (unsigned long)vcpu);
1251
1252         return 0;
1253 }
1254
1255 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1256 {
1257         del_timer_sync(&vcpu->arch.wdt_timer);
1258 }
1259
1260 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1261 {
1262         int i;
1263
1264         regs->pc = vcpu->arch.pc;
1265         regs->cr = kvmppc_get_cr(vcpu);
1266         regs->ctr = vcpu->arch.ctr;
1267         regs->lr = vcpu->arch.lr;
1268         regs->xer = kvmppc_get_xer(vcpu);
1269         regs->msr = vcpu->arch.shared->msr;
1270         regs->srr0 = kvmppc_get_srr0(vcpu);
1271         regs->srr1 = kvmppc_get_srr1(vcpu);
1272         regs->pid = vcpu->arch.pid;
1273         regs->sprg0 = kvmppc_get_sprg0(vcpu);
1274         regs->sprg1 = kvmppc_get_sprg1(vcpu);
1275         regs->sprg2 = kvmppc_get_sprg2(vcpu);
1276         regs->sprg3 = kvmppc_get_sprg3(vcpu);
1277         regs->sprg4 = kvmppc_get_sprg4(vcpu);
1278         regs->sprg5 = kvmppc_get_sprg5(vcpu);
1279         regs->sprg6 = kvmppc_get_sprg6(vcpu);
1280         regs->sprg7 = kvmppc_get_sprg7(vcpu);
1281
1282         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1283                 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1284
1285         return 0;
1286 }
1287
1288 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1289 {
1290         int i;
1291
1292         vcpu->arch.pc = regs->pc;
1293         kvmppc_set_cr(vcpu, regs->cr);
1294         vcpu->arch.ctr = regs->ctr;
1295         vcpu->arch.lr = regs->lr;
1296         kvmppc_set_xer(vcpu, regs->xer);
1297         kvmppc_set_msr(vcpu, regs->msr);
1298         kvmppc_set_srr0(vcpu, regs->srr0);
1299         kvmppc_set_srr1(vcpu, regs->srr1);
1300         kvmppc_set_pid(vcpu, regs->pid);
1301         kvmppc_set_sprg0(vcpu, regs->sprg0);
1302         kvmppc_set_sprg1(vcpu, regs->sprg1);
1303         kvmppc_set_sprg2(vcpu, regs->sprg2);
1304         kvmppc_set_sprg3(vcpu, regs->sprg3);
1305         kvmppc_set_sprg4(vcpu, regs->sprg4);
1306         kvmppc_set_sprg5(vcpu, regs->sprg5);
1307         kvmppc_set_sprg6(vcpu, regs->sprg6);
1308         kvmppc_set_sprg7(vcpu, regs->sprg7);
1309
1310         for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1311                 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1312
1313         return 0;
1314 }
1315
1316 static void get_sregs_base(struct kvm_vcpu *vcpu,
1317                            struct kvm_sregs *sregs)
1318 {
1319         u64 tb = get_tb();
1320
1321         sregs->u.e.features |= KVM_SREGS_E_BASE;
1322
1323         sregs->u.e.csrr0 = vcpu->arch.csrr0;
1324         sregs->u.e.csrr1 = vcpu->arch.csrr1;
1325         sregs->u.e.mcsr = vcpu->arch.mcsr;
1326         sregs->u.e.esr = kvmppc_get_esr(vcpu);
1327         sregs->u.e.dear = kvmppc_get_dar(vcpu);
1328         sregs->u.e.tsr = vcpu->arch.tsr;
1329         sregs->u.e.tcr = vcpu->arch.tcr;
1330         sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1331         sregs->u.e.tb = tb;
1332         sregs->u.e.vrsave = vcpu->arch.vrsave;
1333 }
1334
1335 static int set_sregs_base(struct kvm_vcpu *vcpu,
1336                           struct kvm_sregs *sregs)
1337 {
1338         if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1339                 return 0;
1340
1341         vcpu->arch.csrr0 = sregs->u.e.csrr0;
1342         vcpu->arch.csrr1 = sregs->u.e.csrr1;
1343         vcpu->arch.mcsr = sregs->u.e.mcsr;
1344         kvmppc_set_esr(vcpu, sregs->u.e.esr);
1345         kvmppc_set_dar(vcpu, sregs->u.e.dear);
1346         vcpu->arch.vrsave = sregs->u.e.vrsave;
1347         kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
1348
1349         if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
1350                 vcpu->arch.dec = sregs->u.e.dec;
1351                 kvmppc_emulate_dec(vcpu);
1352         }
1353
1354         if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1355                 kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
1356
1357         return 0;
1358 }
1359
1360 static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1361                               struct kvm_sregs *sregs)
1362 {
1363         sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1364
1365         sregs->u.e.pir = vcpu->vcpu_id;
1366         sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1367         sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1368         sregs->u.e.decar = vcpu->arch.decar;
1369         sregs->u.e.ivpr = vcpu->arch.ivpr;
1370 }
1371
1372 static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1373                              struct kvm_sregs *sregs)
1374 {
1375         if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1376                 return 0;
1377
1378         if (sregs->u.e.pir != vcpu->vcpu_id)
1379                 return -EINVAL;
1380
1381         vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1382         vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1383         vcpu->arch.decar = sregs->u.e.decar;
1384         vcpu->arch.ivpr = sregs->u.e.ivpr;
1385
1386         return 0;
1387 }
1388
1389 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1390 {
1391         sregs->u.e.features |= KVM_SREGS_E_IVOR;
1392
1393         sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1394         sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1395         sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1396         sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1397         sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1398         sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1399         sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1400         sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1401         sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1402         sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1403         sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1404         sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1405         sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1406         sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1407         sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1408         sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1409         return 0;
1410 }
1411
1412 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1413 {
1414         if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1415                 return 0;
1416
1417         vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1418         vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1419         vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1420         vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1421         vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1422         vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1423         vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1424         vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1425         vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1426         vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1427         vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1428         vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1429         vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1430         vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1431         vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1432         vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1433
1434         return 0;
1435 }
1436
1437 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1438                                   struct kvm_sregs *sregs)
1439 {
1440         sregs->pvr = vcpu->arch.pvr;
1441
1442         get_sregs_base(vcpu, sregs);
1443         get_sregs_arch206(vcpu, sregs);
1444         return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
1445 }
1446
1447 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1448                                   struct kvm_sregs *sregs)
1449 {
1450         int ret;
1451
1452         if (vcpu->arch.pvr != sregs->pvr)
1453                 return -EINVAL;
1454
1455         ret = set_sregs_base(vcpu, sregs);
1456         if (ret < 0)
1457                 return ret;
1458
1459         ret = set_sregs_arch206(vcpu, sregs);
1460         if (ret < 0)
1461                 return ret;
1462
1463         return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
1464 }
1465
1466 int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1467 {
1468         int r = 0;
1469         union kvmppc_one_reg val;
1470         int size;
1471
1472         size = one_reg_size(reg->id);
1473         if (size > sizeof(val))
1474                 return -EINVAL;
1475
1476         switch (reg->id) {
1477         case KVM_REG_PPC_IAC1:
1478                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac1);
1479                 break;
1480         case KVM_REG_PPC_IAC2:
1481                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac2);
1482                 break;
1483 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1484         case KVM_REG_PPC_IAC3:
1485                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac3);
1486                 break;
1487         case KVM_REG_PPC_IAC4:
1488                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac4);
1489                 break;
1490 #endif
1491         case KVM_REG_PPC_DAC1:
1492                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac1);
1493                 break;
1494         case KVM_REG_PPC_DAC2:
1495                 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac2);
1496                 break;
1497         case KVM_REG_PPC_EPR: {
1498                 u32 epr = kvmppc_get_epr(vcpu);
1499                 val = get_reg_val(reg->id, epr);
1500                 break;
1501         }
1502 #if defined(CONFIG_64BIT)
1503         case KVM_REG_PPC_EPCR:
1504                 val = get_reg_val(reg->id, vcpu->arch.epcr);
1505                 break;
1506 #endif
1507         case KVM_REG_PPC_TCR:
1508                 val = get_reg_val(reg->id, vcpu->arch.tcr);
1509                 break;
1510         case KVM_REG_PPC_TSR:
1511                 val = get_reg_val(reg->id, vcpu->arch.tsr);
1512                 break;
1513         case KVM_REG_PPC_DEBUG_INST:
1514                 val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV_DEBUG);
1515                 break;
1516         case KVM_REG_PPC_VRSAVE:
1517                 val = get_reg_val(reg->id, vcpu->arch.vrsave);
1518                 break;
1519         default:
1520                 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, reg->id, &val);
1521                 break;
1522         }
1523
1524         if (r)
1525                 return r;
1526
1527         if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
1528                 r = -EFAULT;
1529
1530         return r;
1531 }
1532
1533 int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1534 {
1535         int r = 0;
1536         union kvmppc_one_reg val;
1537         int size;
1538
1539         size = one_reg_size(reg->id);
1540         if (size > sizeof(val))
1541                 return -EINVAL;
1542
1543         if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
1544                 return -EFAULT;
1545
1546         switch (reg->id) {
1547         case KVM_REG_PPC_IAC1:
1548                 vcpu->arch.dbg_reg.iac1 = set_reg_val(reg->id, val);
1549                 break;
1550         case KVM_REG_PPC_IAC2:
1551                 vcpu->arch.dbg_reg.iac2 = set_reg_val(reg->id, val);
1552                 break;
1553 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1554         case KVM_REG_PPC_IAC3:
1555                 vcpu->arch.dbg_reg.iac3 = set_reg_val(reg->id, val);
1556                 break;
1557         case KVM_REG_PPC_IAC4:
1558                 vcpu->arch.dbg_reg.iac4 = set_reg_val(reg->id, val);
1559                 break;
1560 #endif
1561         case KVM_REG_PPC_DAC1:
1562                 vcpu->arch.dbg_reg.dac1 = set_reg_val(reg->id, val);
1563                 break;
1564         case KVM_REG_PPC_DAC2:
1565                 vcpu->arch.dbg_reg.dac2 = set_reg_val(reg->id, val);
1566                 break;
1567         case KVM_REG_PPC_EPR: {
1568                 u32 new_epr = set_reg_val(reg->id, val);
1569                 kvmppc_set_epr(vcpu, new_epr);
1570                 break;
1571         }
1572 #if defined(CONFIG_64BIT)
1573         case KVM_REG_PPC_EPCR: {
1574                 u32 new_epcr = set_reg_val(reg->id, val);
1575                 kvmppc_set_epcr(vcpu, new_epcr);
1576                 break;
1577         }
1578 #endif
1579         case KVM_REG_PPC_OR_TSR: {
1580                 u32 tsr_bits = set_reg_val(reg->id, val);
1581                 kvmppc_set_tsr_bits(vcpu, tsr_bits);
1582                 break;
1583         }
1584         case KVM_REG_PPC_CLEAR_TSR: {
1585                 u32 tsr_bits = set_reg_val(reg->id, val);
1586                 kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1587                 break;
1588         }
1589         case KVM_REG_PPC_TSR: {
1590                 u32 tsr = set_reg_val(reg->id, val);
1591                 kvmppc_set_tsr(vcpu, tsr);
1592                 break;
1593         }
1594         case KVM_REG_PPC_TCR: {
1595                 u32 tcr = set_reg_val(reg->id, val);
1596                 kvmppc_set_tcr(vcpu, tcr);
1597                 break;
1598         }
1599         case KVM_REG_PPC_VRSAVE:
1600                 vcpu->arch.vrsave = set_reg_val(reg->id, val);
1601                 break;
1602         default:
1603                 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, reg->id, &val);
1604                 break;
1605         }
1606
1607         return r;
1608 }
1609
1610 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1611 {
1612         return -ENOTSUPP;
1613 }
1614
1615 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1616 {
1617         return -ENOTSUPP;
1618 }
1619
1620 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1621                                   struct kvm_translation *tr)
1622 {
1623         int r;
1624
1625         r = kvmppc_core_vcpu_translate(vcpu, tr);
1626         return r;
1627 }
1628
1629 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1630 {
1631         return -ENOTSUPP;
1632 }
1633
1634 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1635                               struct kvm_memory_slot *dont)
1636 {
1637 }
1638
1639 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1640                                unsigned long npages)
1641 {
1642         return 0;
1643 }
1644
1645 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1646                                       struct kvm_memory_slot *memslot,
1647                                       struct kvm_userspace_memory_region *mem)
1648 {
1649         return 0;
1650 }
1651
1652 void kvmppc_core_commit_memory_region(struct kvm *kvm,
1653                                 struct kvm_userspace_memory_region *mem,
1654                                 const struct kvm_memory_slot *old)
1655 {
1656 }
1657
1658 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1659 {
1660 }
1661
1662 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
1663 {
1664 #if defined(CONFIG_64BIT)
1665         vcpu->arch.epcr = new_epcr;
1666 #ifdef CONFIG_KVM_BOOKE_HV
1667         vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1668         if (vcpu->arch.epcr  & SPRN_EPCR_ICM)
1669                 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1670 #endif
1671 #endif
1672 }
1673
1674 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1675 {
1676         vcpu->arch.tcr = new_tcr;
1677         arm_next_watchdog(vcpu);
1678         update_timer_ints(vcpu);
1679 }
1680
1681 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1682 {
1683         set_bits(tsr_bits, &vcpu->arch.tsr);
1684         smp_wmb();
1685         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1686         kvm_vcpu_kick(vcpu);
1687 }
1688
1689 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1690 {
1691         clear_bits(tsr_bits, &vcpu->arch.tsr);
1692
1693         /*
1694          * We may have stopped the watchdog due to
1695          * being stuck on final expiration.
1696          */
1697         if (tsr_bits & (TSR_ENW | TSR_WIS))
1698                 arm_next_watchdog(vcpu);
1699
1700         update_timer_ints(vcpu);
1701 }
1702
1703 void kvmppc_decrementer_func(unsigned long data)
1704 {
1705         struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1706
1707         if (vcpu->arch.tcr & TCR_ARE) {
1708                 vcpu->arch.dec = vcpu->arch.decar;
1709                 kvmppc_emulate_dec(vcpu);
1710         }
1711
1712         kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1713 }
1714
1715 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg,
1716                                        uint64_t addr, int index)
1717 {
1718         switch (index) {
1719         case 0:
1720                 dbg_reg->dbcr0 |= DBCR0_IAC1;
1721                 dbg_reg->iac1 = addr;
1722                 break;
1723         case 1:
1724                 dbg_reg->dbcr0 |= DBCR0_IAC2;
1725                 dbg_reg->iac2 = addr;
1726                 break;
1727 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1728         case 2:
1729                 dbg_reg->dbcr0 |= DBCR0_IAC3;
1730                 dbg_reg->iac3 = addr;
1731                 break;
1732         case 3:
1733                 dbg_reg->dbcr0 |= DBCR0_IAC4;
1734                 dbg_reg->iac4 = addr;
1735                 break;
1736 #endif
1737         default:
1738                 return -EINVAL;
1739         }
1740
1741         dbg_reg->dbcr0 |= DBCR0_IDM;
1742         return 0;
1743 }
1744
1745 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr,
1746                                        int type, int index)
1747 {
1748         switch (index) {
1749         case 0:
1750                 if (type & KVMPPC_DEBUG_WATCH_READ)
1751                         dbg_reg->dbcr0 |= DBCR0_DAC1R;
1752                 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1753                         dbg_reg->dbcr0 |= DBCR0_DAC1W;
1754                 dbg_reg->dac1 = addr;
1755                 break;
1756         case 1:
1757                 if (type & KVMPPC_DEBUG_WATCH_READ)
1758                         dbg_reg->dbcr0 |= DBCR0_DAC2R;
1759                 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1760                         dbg_reg->dbcr0 |= DBCR0_DAC2W;
1761                 dbg_reg->dac2 = addr;
1762                 break;
1763         default:
1764                 return -EINVAL;
1765         }
1766
1767         dbg_reg->dbcr0 |= DBCR0_IDM;
1768         return 0;
1769 }
1770 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set)
1771 {
1772         /* XXX: Add similar MSR protection for BookE-PR */
1773 #ifdef CONFIG_KVM_BOOKE_HV
1774         BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP));
1775         if (set) {
1776                 if (prot_bitmap & MSR_UCLE)
1777                         vcpu->arch.shadow_msrp |= MSRP_UCLEP;
1778                 if (prot_bitmap & MSR_DE)
1779                         vcpu->arch.shadow_msrp |= MSRP_DEP;
1780                 if (prot_bitmap & MSR_PMM)
1781                         vcpu->arch.shadow_msrp |= MSRP_PMMP;
1782         } else {
1783                 if (prot_bitmap & MSR_UCLE)
1784                         vcpu->arch.shadow_msrp &= ~MSRP_UCLEP;
1785                 if (prot_bitmap & MSR_DE)
1786                         vcpu->arch.shadow_msrp &= ~MSRP_DEP;
1787                 if (prot_bitmap & MSR_PMM)
1788                         vcpu->arch.shadow_msrp &= ~MSRP_PMMP;
1789         }
1790 #endif
1791 }
1792
1793 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
1794                  enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
1795 {
1796         int gtlb_index;
1797         gpa_t gpaddr;
1798
1799 #ifdef CONFIG_KVM_E500V2
1800         if (!(vcpu->arch.shared->msr & MSR_PR) &&
1801             (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1802                 pte->eaddr = eaddr;
1803                 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) |
1804                              (eaddr & ~PAGE_MASK);
1805                 pte->vpage = eaddr >> PAGE_SHIFT;
1806                 pte->may_read = true;
1807                 pte->may_write = true;
1808                 pte->may_execute = true;
1809
1810                 return 0;
1811         }
1812 #endif
1813
1814         /* Check the guest TLB. */
1815         switch (xlid) {
1816         case XLATE_INST:
1817                 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1818                 break;
1819         case XLATE_DATA:
1820                 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1821                 break;
1822         default:
1823                 BUG();
1824         }
1825
1826         /* Do we have a TLB entry at all? */
1827         if (gtlb_index < 0)
1828                 return -ENOENT;
1829
1830         gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1831
1832         pte->eaddr = eaddr;
1833         pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK);
1834         pte->vpage = eaddr >> PAGE_SHIFT;
1835
1836         /* XXX read permissions from the guest TLB */
1837         pte->may_read = true;
1838         pte->may_write = true;
1839         pte->may_execute = true;
1840
1841         return 0;
1842 }
1843
1844 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
1845                                          struct kvm_guest_debug *dbg)
1846 {
1847         struct debug_reg *dbg_reg;
1848         int n, b = 0, w = 0;
1849
1850         if (!(dbg->control & KVM_GUESTDBG_ENABLE)) {
1851                 vcpu->arch.dbg_reg.dbcr0 = 0;
1852                 vcpu->guest_debug = 0;
1853                 kvm_guest_protect_msr(vcpu, MSR_DE, false);
1854                 return 0;
1855         }
1856
1857         kvm_guest_protect_msr(vcpu, MSR_DE, true);
1858         vcpu->guest_debug = dbg->control;
1859         vcpu->arch.dbg_reg.dbcr0 = 0;
1860
1861         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
1862                 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC;
1863
1864         /* Code below handles only HW breakpoints */
1865         dbg_reg = &(vcpu->arch.dbg_reg);
1866
1867 #ifdef CONFIG_KVM_BOOKE_HV
1868         /*
1869          * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1
1870          * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0
1871          */
1872         dbg_reg->dbcr1 = 0;
1873         dbg_reg->dbcr2 = 0;
1874 #else
1875         /*
1876          * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1
1877          * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR
1878          * is set.
1879          */
1880         dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US |
1881                           DBCR1_IAC4US;
1882         dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
1883 #endif
1884
1885         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1886                 return 0;
1887
1888         for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) {
1889                 uint64_t addr = dbg->arch.bp[n].addr;
1890                 uint32_t type = dbg->arch.bp[n].type;
1891
1892                 if (type == KVMPPC_DEBUG_NONE)
1893                         continue;
1894
1895                 if (type & !(KVMPPC_DEBUG_WATCH_READ |
1896                              KVMPPC_DEBUG_WATCH_WRITE |
1897                              KVMPPC_DEBUG_BREAKPOINT))
1898                         return -EINVAL;
1899
1900                 if (type & KVMPPC_DEBUG_BREAKPOINT) {
1901                         /* Setting H/W breakpoint */
1902                         if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++))
1903                                 return -EINVAL;
1904                 } else {
1905                         /* Setting H/W watchpoint */
1906                         if (kvmppc_booke_add_watchpoint(dbg_reg, addr,
1907                                                         type, w++))
1908                                 return -EINVAL;
1909                 }
1910         }
1911
1912         return 0;
1913 }
1914
1915 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1916 {
1917         vcpu->cpu = smp_processor_id();
1918         current->thread.kvm_vcpu = vcpu;
1919 }
1920
1921 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
1922 {
1923         current->thread.kvm_vcpu = NULL;
1924         vcpu->cpu = -1;
1925
1926         /* Clear pending debug event in DBSR */
1927         kvmppc_clear_dbsr();
1928 }
1929
1930 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
1931 {
1932         vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
1933 }
1934
1935 int kvmppc_core_init_vm(struct kvm *kvm)
1936 {
1937         return kvm->arch.kvm_ops->init_vm(kvm);
1938 }
1939
1940 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
1941 {
1942         return kvm->arch.kvm_ops->vcpu_create(kvm, id);
1943 }
1944
1945 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
1946 {
1947         vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
1948 }
1949
1950 void kvmppc_core_destroy_vm(struct kvm *kvm)
1951 {
1952         kvm->arch.kvm_ops->destroy_vm(kvm);
1953 }
1954
1955 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1956 {
1957         vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
1958 }
1959
1960 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
1961 {
1962         vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
1963 }
1964
1965 int __init kvmppc_booke_init(void)
1966 {
1967 #ifndef CONFIG_KVM_BOOKE_HV
1968         unsigned long ivor[16];
1969         unsigned long *handler = kvmppc_booke_handler_addr;
1970         unsigned long max_ivor = 0;
1971         unsigned long handler_len;
1972         int i;
1973
1974         /* We install our own exception handlers by hijacking IVPR. IVPR must
1975          * be 16-bit aligned, so we need a 64KB allocation. */
1976         kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1977                                                  VCPU_SIZE_ORDER);
1978         if (!kvmppc_booke_handlers)
1979                 return -ENOMEM;
1980
1981         /* XXX make sure our handlers are smaller than Linux's */
1982
1983         /* Copy our interrupt handlers to match host IVORs. That way we don't
1984          * have to swap the IVORs on every guest/host transition. */
1985         ivor[0] = mfspr(SPRN_IVOR0);
1986         ivor[1] = mfspr(SPRN_IVOR1);
1987         ivor[2] = mfspr(SPRN_IVOR2);
1988         ivor[3] = mfspr(SPRN_IVOR3);
1989         ivor[4] = mfspr(SPRN_IVOR4);
1990         ivor[5] = mfspr(SPRN_IVOR5);
1991         ivor[6] = mfspr(SPRN_IVOR6);
1992         ivor[7] = mfspr(SPRN_IVOR7);
1993         ivor[8] = mfspr(SPRN_IVOR8);
1994         ivor[9] = mfspr(SPRN_IVOR9);
1995         ivor[10] = mfspr(SPRN_IVOR10);
1996         ivor[11] = mfspr(SPRN_IVOR11);
1997         ivor[12] = mfspr(SPRN_IVOR12);
1998         ivor[13] = mfspr(SPRN_IVOR13);
1999         ivor[14] = mfspr(SPRN_IVOR14);
2000         ivor[15] = mfspr(SPRN_IVOR15);
2001
2002         for (i = 0; i < 16; i++) {
2003                 if (ivor[i] > max_ivor)
2004                         max_ivor = i;
2005
2006                 handler_len = handler[i + 1] - handler[i];
2007                 memcpy((void *)kvmppc_booke_handlers + ivor[i],
2008                        (void *)handler[i], handler_len);
2009         }
2010
2011         handler_len = handler[max_ivor + 1] - handler[max_ivor];
2012         flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
2013                            ivor[max_ivor] + handler_len);
2014 #endif /* !BOOKE_HV */
2015         return 0;
2016 }
2017
2018 void __exit kvmppc_booke_exit(void)
2019 {
2020         free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
2021         kvm_exit();
2022 }