2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright IBM Corp. 2007
16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20 * Scott Wood <scottwood@freescale.com>
21 * Varun Sethi <varun.sethi@freescale.com>
24 #include <linux/errno.h>
25 #include <linux/err.h>
26 #include <linux/kvm_host.h>
27 #include <linux/gfp.h>
28 #include <linux/module.h>
29 #include <linux/vmalloc.h>
32 #include <asm/cputable.h>
33 #include <asm/uaccess.h>
34 #include <asm/kvm_ppc.h>
35 #include <asm/cacheflush.h>
36 #include <asm/dbell.h>
37 #include <asm/hw_irq.h>
44 #define CREATE_TRACE_POINTS
45 #include "trace_booke.h"
47 unsigned long kvmppc_booke_handlers;
49 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
50 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
52 struct kvm_stats_debugfs_item debugfs_entries[] = {
53 { "mmio", VCPU_STAT(mmio_exits) },
54 { "sig", VCPU_STAT(signal_exits) },
55 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
56 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
57 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
58 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
59 { "sysc", VCPU_STAT(syscall_exits) },
60 { "isi", VCPU_STAT(isi_exits) },
61 { "dsi", VCPU_STAT(dsi_exits) },
62 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
63 { "dec", VCPU_STAT(dec_exits) },
64 { "ext_intr", VCPU_STAT(ext_intr_exits) },
65 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
66 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
67 { "doorbell", VCPU_STAT(dbell_exits) },
68 { "guest doorbell", VCPU_STAT(gdbell_exits) },
69 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
73 /* TODO: use vcpu_printf() */
74 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
78 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
79 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
80 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
81 vcpu->arch.shared->srr1);
83 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
85 for (i = 0; i < 32; i += 4) {
86 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
87 kvmppc_get_gpr(vcpu, i),
88 kvmppc_get_gpr(vcpu, i+1),
89 kvmppc_get_gpr(vcpu, i+2),
90 kvmppc_get_gpr(vcpu, i+3));
95 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
99 kvmppc_save_guest_spe(vcpu);
100 vcpu->arch.shadow_msr &= ~MSR_SPE;
104 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
108 kvmppc_load_guest_spe(vcpu);
109 vcpu->arch.shadow_msr |= MSR_SPE;
113 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
115 if (vcpu->arch.shared->msr & MSR_SPE) {
116 if (!(vcpu->arch.shadow_msr & MSR_SPE))
117 kvmppc_vcpu_enable_spe(vcpu);
118 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
119 kvmppc_vcpu_disable_spe(vcpu);
123 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
129 * Load up guest vcpu FP state if it's needed.
130 * It also set the MSR_FP in thread so that host know
131 * we're holding FPU, and then host can help to save
132 * guest vcpu FP state if other threads require to use FPU.
133 * This simulates an FP unavailable fault.
135 * It requires to be called with preemption disabled.
137 static inline void kvmppc_load_guest_fp(struct kvm_vcpu *vcpu)
139 #ifdef CONFIG_PPC_FPU
140 if (!(current->thread.regs->msr & MSR_FP)) {
142 load_fp_state(&vcpu->arch.fp);
143 current->thread.fp_save_area = &vcpu->arch.fp;
144 current->thread.regs->msr |= MSR_FP;
150 * Save guest vcpu FP state into thread.
151 * It requires to be called with preemption disabled.
153 static inline void kvmppc_save_guest_fp(struct kvm_vcpu *vcpu)
155 #ifdef CONFIG_PPC_FPU
156 if (current->thread.regs->msr & MSR_FP)
158 current->thread.fp_save_area = NULL;
162 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
164 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
165 /* We always treat the FP bit as enabled from the host
166 perspective, so only need to adjust the shadow MSR */
167 vcpu->arch.shadow_msr &= ~MSR_FP;
168 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
173 * Simulate AltiVec unavailable fault to load guest state
174 * from thread to AltiVec unit.
175 * It requires to be called with preemption disabled.
177 static inline void kvmppc_load_guest_altivec(struct kvm_vcpu *vcpu)
179 #ifdef CONFIG_ALTIVEC
180 if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
181 if (!(current->thread.regs->msr & MSR_VEC)) {
182 enable_kernel_altivec();
183 load_vr_state(&vcpu->arch.vr);
184 current->thread.vr_save_area = &vcpu->arch.vr;
185 current->thread.regs->msr |= MSR_VEC;
192 * Save guest vcpu AltiVec state into thread.
193 * It requires to be called with preemption disabled.
195 static inline void kvmppc_save_guest_altivec(struct kvm_vcpu *vcpu)
197 #ifdef CONFIG_ALTIVEC
198 if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
199 if (current->thread.regs->msr & MSR_VEC)
200 giveup_altivec(current);
201 current->thread.vr_save_area = NULL;
206 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu)
208 /* Synchronize guest's desire to get debug interrupts into shadow MSR */
209 #ifndef CONFIG_KVM_BOOKE_HV
210 vcpu->arch.shadow_msr &= ~MSR_DE;
211 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;
214 /* Force enable debug interrupts when user space wants to debug */
215 if (vcpu->guest_debug) {
216 #ifdef CONFIG_KVM_BOOKE_HV
218 * Since there is no shadow MSR, sync MSR_DE into the guest
221 vcpu->arch.shared->msr |= MSR_DE;
223 vcpu->arch.shadow_msr |= MSR_DE;
224 vcpu->arch.shared->msr &= ~MSR_DE;
230 * Helper function for "full" MSR writes. No need to call this if only
231 * EE/CE/ME/DE/RI are changing.
233 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
235 u32 old_msr = vcpu->arch.shared->msr;
237 #ifdef CONFIG_KVM_BOOKE_HV
241 vcpu->arch.shared->msr = new_msr;
243 kvmppc_mmu_msr_notify(vcpu, old_msr);
244 kvmppc_vcpu_sync_spe(vcpu);
245 kvmppc_vcpu_sync_fpu(vcpu);
246 kvmppc_vcpu_sync_debug(vcpu);
249 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
250 unsigned int priority)
252 trace_kvm_booke_queue_irqprio(vcpu, priority);
253 set_bit(priority, &vcpu->arch.pending_exceptions);
256 void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
257 ulong dear_flags, ulong esr_flags)
259 vcpu->arch.queued_dear = dear_flags;
260 vcpu->arch.queued_esr = esr_flags;
261 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
264 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
265 ulong dear_flags, ulong esr_flags)
267 vcpu->arch.queued_dear = dear_flags;
268 vcpu->arch.queued_esr = esr_flags;
269 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
272 void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu)
274 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
277 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags)
279 vcpu->arch.queued_esr = esr_flags;
280 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
283 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
286 vcpu->arch.queued_dear = dear_flags;
287 vcpu->arch.queued_esr = esr_flags;
288 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
291 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
293 vcpu->arch.queued_esr = esr_flags;
294 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
297 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
299 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
302 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
304 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
307 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
309 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
312 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
313 struct kvm_interrupt *irq)
315 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
317 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
318 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
320 kvmppc_booke_queue_irqprio(vcpu, prio);
323 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
325 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
326 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
329 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
331 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
334 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
336 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
339 void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu)
341 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DEBUG);
344 void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu)
346 clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions);
349 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
351 kvmppc_set_srr0(vcpu, srr0);
352 kvmppc_set_srr1(vcpu, srr1);
355 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
357 vcpu->arch.csrr0 = srr0;
358 vcpu->arch.csrr1 = srr1;
361 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
363 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
364 vcpu->arch.dsrr0 = srr0;
365 vcpu->arch.dsrr1 = srr1;
367 set_guest_csrr(vcpu, srr0, srr1);
371 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
373 vcpu->arch.mcsrr0 = srr0;
374 vcpu->arch.mcsrr1 = srr1;
377 /* Deliver the interrupt of the corresponding priority, if possible. */
378 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
379 unsigned int priority)
383 bool update_esr = false, update_dear = false, update_epr = false;
384 ulong crit_raw = vcpu->arch.shared->critical;
385 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
387 bool keep_irq = false;
388 enum int_class int_class;
389 ulong new_msr = vcpu->arch.shared->msr;
391 /* Truncate crit indicators in 32 bit mode */
392 if (!(vcpu->arch.shared->msr & MSR_SF)) {
393 crit_raw &= 0xffffffff;
394 crit_r1 &= 0xffffffff;
397 /* Critical section when crit == r1 */
398 crit = (crit_raw == crit_r1);
399 /* ... and we're in supervisor mode */
400 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
402 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
403 priority = BOOKE_IRQPRIO_EXTERNAL;
407 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
411 case BOOKE_IRQPRIO_DTLB_MISS:
412 case BOOKE_IRQPRIO_DATA_STORAGE:
413 case BOOKE_IRQPRIO_ALIGNMENT:
416 case BOOKE_IRQPRIO_INST_STORAGE:
417 case BOOKE_IRQPRIO_PROGRAM:
420 case BOOKE_IRQPRIO_ITLB_MISS:
421 case BOOKE_IRQPRIO_SYSCALL:
422 case BOOKE_IRQPRIO_FP_UNAVAIL:
423 #ifdef CONFIG_SPE_POSSIBLE
424 case BOOKE_IRQPRIO_SPE_UNAVAIL:
425 case BOOKE_IRQPRIO_SPE_FP_DATA:
426 case BOOKE_IRQPRIO_SPE_FP_ROUND:
428 #ifdef CONFIG_ALTIVEC
429 case BOOKE_IRQPRIO_ALTIVEC_UNAVAIL:
430 case BOOKE_IRQPRIO_ALTIVEC_ASSIST:
432 case BOOKE_IRQPRIO_AP_UNAVAIL:
434 msr_mask = MSR_CE | MSR_ME | MSR_DE;
435 int_class = INT_CLASS_NONCRIT;
437 case BOOKE_IRQPRIO_WATCHDOG:
438 case BOOKE_IRQPRIO_CRITICAL:
439 case BOOKE_IRQPRIO_DBELL_CRIT:
440 allowed = vcpu->arch.shared->msr & MSR_CE;
441 allowed = allowed && !crit;
443 int_class = INT_CLASS_CRIT;
445 case BOOKE_IRQPRIO_MACHINE_CHECK:
446 allowed = vcpu->arch.shared->msr & MSR_ME;
447 allowed = allowed && !crit;
448 int_class = INT_CLASS_MC;
450 case BOOKE_IRQPRIO_DECREMENTER:
451 case BOOKE_IRQPRIO_FIT:
454 case BOOKE_IRQPRIO_EXTERNAL:
455 case BOOKE_IRQPRIO_DBELL:
456 allowed = vcpu->arch.shared->msr & MSR_EE;
457 allowed = allowed && !crit;
458 msr_mask = MSR_CE | MSR_ME | MSR_DE;
459 int_class = INT_CLASS_NONCRIT;
461 case BOOKE_IRQPRIO_DEBUG:
462 allowed = vcpu->arch.shared->msr & MSR_DE;
463 allowed = allowed && !crit;
465 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
466 int_class = INT_CLASS_DBG;
468 int_class = INT_CLASS_CRIT;
475 case INT_CLASS_NONCRIT:
476 set_guest_srr(vcpu, vcpu->arch.pc,
477 vcpu->arch.shared->msr);
480 set_guest_csrr(vcpu, vcpu->arch.pc,
481 vcpu->arch.shared->msr);
484 set_guest_dsrr(vcpu, vcpu->arch.pc,
485 vcpu->arch.shared->msr);
488 set_guest_mcsrr(vcpu, vcpu->arch.pc,
489 vcpu->arch.shared->msr);
493 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
494 if (update_esr == true)
495 kvmppc_set_esr(vcpu, vcpu->arch.queued_esr);
496 if (update_dear == true)
497 kvmppc_set_dar(vcpu, vcpu->arch.queued_dear);
498 if (update_epr == true) {
499 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
500 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
501 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
502 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
503 kvmppc_mpic_set_epr(vcpu);
508 #if defined(CONFIG_64BIT)
509 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
512 kvmppc_set_msr(vcpu, new_msr);
515 clear_bit(priority, &vcpu->arch.pending_exceptions);
518 #ifdef CONFIG_KVM_BOOKE_HV
520 * If an interrupt is pending but masked, raise a guest doorbell
521 * so that we are notified when the guest enables the relevant
524 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
525 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
526 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
527 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
528 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
529 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
536 * Return the number of jiffies until the next timeout. If the timeout is
537 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
538 * because the larger value can break the timer APIs.
540 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
542 u64 tb, wdt_tb, wdt_ticks = 0;
544 u32 period = TCR_GET_WP(vcpu->arch.tcr);
546 wdt_tb = 1ULL << (63 - period);
549 * The watchdog timeout will hapeen when TB bit corresponding
550 * to watchdog will toggle from 0 to 1.
555 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
557 /* Convert timebase ticks to jiffies */
558 nr_jiffies = wdt_ticks;
560 if (do_div(nr_jiffies, tb_ticks_per_jiffy))
563 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
566 static void arm_next_watchdog(struct kvm_vcpu *vcpu)
568 unsigned long nr_jiffies;
572 * If TSR_ENW and TSR_WIS are not set then no need to exit to
573 * userspace, so clear the KVM_REQ_WATCHDOG request.
575 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
576 clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests);
578 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
579 nr_jiffies = watchdog_next_timeout(vcpu);
581 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
582 * then do not run the watchdog timer as this can break timer APIs.
584 if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
585 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
587 del_timer(&vcpu->arch.wdt_timer);
588 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
591 void kvmppc_watchdog_func(unsigned long data)
593 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
598 new_tsr = tsr = vcpu->arch.tsr;
606 new_tsr = tsr | TSR_WIS;
608 new_tsr = tsr | TSR_ENW;
610 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
612 if (new_tsr & TSR_WIS) {
614 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
619 * If this is final watchdog expiry and some action is required
620 * then exit to userspace.
622 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
623 vcpu->arch.watchdog_enabled) {
625 kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
630 * Stop running the watchdog timer after final expiration to
631 * prevent the host from being flooded with timers if the
632 * guest sets a short period.
633 * Timers will resume when TSR/TCR is updated next time.
636 arm_next_watchdog(vcpu);
639 static void update_timer_ints(struct kvm_vcpu *vcpu)
641 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
642 kvmppc_core_queue_dec(vcpu);
644 kvmppc_core_dequeue_dec(vcpu);
646 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
647 kvmppc_core_queue_watchdog(vcpu);
649 kvmppc_core_dequeue_watchdog(vcpu);
652 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
654 unsigned long *pending = &vcpu->arch.pending_exceptions;
655 unsigned int priority;
657 priority = __ffs(*pending);
658 while (priority < BOOKE_IRQPRIO_MAX) {
659 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
662 priority = find_next_bit(pending,
663 BITS_PER_BYTE * sizeof(*pending),
667 /* Tell the guest about our interrupt status */
668 vcpu->arch.shared->int_pending = !!*pending;
671 /* Check pending exceptions and deliver one, if possible. */
672 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
675 WARN_ON_ONCE(!irqs_disabled());
677 kvmppc_core_check_exceptions(vcpu);
679 if (vcpu->requests) {
680 /* Exception delivery raised request; start over */
684 if (vcpu->arch.shared->msr & MSR_WE) {
686 kvm_vcpu_block(vcpu);
687 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
690 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
697 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
699 int r = 1; /* Indicate we want to get back into the guest */
701 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
702 update_timer_ints(vcpu);
703 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
704 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
705 kvmppc_core_flush_tlb(vcpu);
708 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
709 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
713 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
714 vcpu->run->epr.epr = 0;
715 vcpu->arch.epr_needed = true;
716 vcpu->run->exit_reason = KVM_EXIT_EPR;
723 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
726 struct debug_reg debug;
728 if (!vcpu->arch.sane) {
729 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
733 s = kvmppc_prepare_to_enter(vcpu);
738 /* interrupts now hard-disabled */
740 #ifdef CONFIG_PPC_FPU
741 /* Save userspace FPU state in stack */
745 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
746 * as always using the FPU.
748 kvmppc_load_guest_fp(vcpu);
751 #ifdef CONFIG_ALTIVEC
752 /* Save userspace AltiVec state in stack */
753 if (cpu_has_feature(CPU_FTR_ALTIVEC))
754 enable_kernel_altivec();
756 * Since we can't trap on MSR_VEC in GS-mode, we consider the guest
757 * as always using the AltiVec.
759 kvmppc_load_guest_altivec(vcpu);
762 /* Switch to guest debug context */
763 debug = vcpu->arch.dbg_reg;
764 switch_booke_debug_regs(&debug);
765 debug = current->thread.debug;
766 current->thread.debug = vcpu->arch.dbg_reg;
768 vcpu->arch.pgdir = current->mm->pgd;
769 kvmppc_fix_ee_before_entry();
771 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
773 /* No need for kvm_guest_exit. It's done in handle_exit.
774 We also get here with interrupts enabled. */
776 /* Switch back to user space debug context */
777 switch_booke_debug_regs(&debug);
778 current->thread.debug = debug;
780 #ifdef CONFIG_PPC_FPU
781 kvmppc_save_guest_fp(vcpu);
784 #ifdef CONFIG_ALTIVEC
785 kvmppc_save_guest_altivec(vcpu);
789 vcpu->mode = OUTSIDE_GUEST_MODE;
793 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
795 enum emulation_result er;
797 er = kvmppc_emulate_instruction(run, vcpu);
800 /* don't overwrite subtypes, just account kvm_stats */
801 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
802 /* Future optimization: only reload non-volatiles if
803 * they were actually modified by emulation. */
804 return RESUME_GUEST_NV;
810 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
811 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
812 /* For debugging, encode the failing instruction and
813 * report it to userspace. */
814 run->hw.hardware_exit_reason = ~0ULL << 32;
815 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
816 kvmppc_core_queue_program(vcpu, ESR_PIL);
819 case EMULATE_EXIT_USER:
827 static int kvmppc_handle_debug(struct kvm_run *run, struct kvm_vcpu *vcpu)
829 struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg);
830 u32 dbsr = vcpu->arch.dbsr;
832 if (vcpu->guest_debug == 0) {
834 * Debug resources belong to Guest.
835 * Imprecise debug event is not injected
837 if (dbsr & DBSR_IDE) {
843 if (dbsr && (vcpu->arch.shared->msr & MSR_DE) &&
844 (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM))
845 kvmppc_core_queue_debug(vcpu);
847 /* Inject a program interrupt if trap debug is not allowed */
848 if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE))
849 kvmppc_core_queue_program(vcpu, ESR_PTR);
855 * Debug resource owned by userspace.
856 * Clear guest dbsr (vcpu->arch.dbsr)
859 run->debug.arch.status = 0;
860 run->debug.arch.address = vcpu->arch.pc;
862 if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) {
863 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT;
865 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W))
866 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE;
867 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R))
868 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ;
869 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W))
870 run->debug.arch.address = dbg_reg->dac1;
871 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W))
872 run->debug.arch.address = dbg_reg->dac2;
878 static void kvmppc_fill_pt_regs(struct pt_regs *regs)
880 ulong r1, ip, msr, lr;
882 asm("mr %0, 1" : "=r"(r1));
883 asm("mflr %0" : "=r"(lr));
884 asm("mfmsr %0" : "=r"(msr));
885 asm("bl 1f; 1: mflr %0" : "=r"(ip));
887 memset(regs, 0, sizeof(*regs));
895 * For interrupts needed to be handled by host interrupt handlers,
896 * corresponding host handler are called from here in similar way
897 * (but not exact) as they are called from low level handler
898 * (such as from arch/powerpc/kernel/head_fsl_booke.S).
900 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
901 unsigned int exit_nr)
906 case BOOKE_INTERRUPT_EXTERNAL:
907 kvmppc_fill_pt_regs(®s);
910 case BOOKE_INTERRUPT_DECREMENTER:
911 kvmppc_fill_pt_regs(®s);
912 timer_interrupt(®s);
914 #if defined(CONFIG_PPC_DOORBELL)
915 case BOOKE_INTERRUPT_DOORBELL:
916 kvmppc_fill_pt_regs(®s);
917 doorbell_exception(®s);
920 case BOOKE_INTERRUPT_MACHINE_CHECK:
923 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
924 kvmppc_fill_pt_regs(®s);
925 performance_monitor_exception(®s);
927 case BOOKE_INTERRUPT_WATCHDOG:
928 kvmppc_fill_pt_regs(®s);
929 #ifdef CONFIG_BOOKE_WDT
930 WatchdogException(®s);
932 unknown_exception(®s);
935 case BOOKE_INTERRUPT_CRITICAL:
936 kvmppc_fill_pt_regs(®s);
937 unknown_exception(®s);
939 case BOOKE_INTERRUPT_DEBUG:
940 /* Save DBSR before preemption is enabled */
941 vcpu->arch.dbsr = mfspr(SPRN_DBSR);
947 static int kvmppc_resume_inst_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
948 enum emulation_result emulated, u32 last_inst)
955 pr_debug("%s: load instruction from guest address %lx failed\n",
956 __func__, vcpu->arch.pc);
957 /* For debugging, encode the failing instruction and
958 * report it to userspace. */
959 run->hw.hardware_exit_reason = ~0ULL << 32;
960 run->hw.hardware_exit_reason |= last_inst;
961 kvmppc_core_queue_program(vcpu, ESR_PIL);
972 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
974 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
975 unsigned int exit_nr)
980 u32 last_inst = KVM_INST_FETCH_FAILED;
981 enum emulation_result emulated = EMULATE_DONE;
983 /* update before a new last_exit_type is rewritten */
984 kvmppc_update_timing_stats(vcpu);
986 /* restart interrupts if they were meant for the host */
987 kvmppc_restart_interrupt(vcpu, exit_nr);
990 * get last instruction before beeing preempted
991 * TODO: for e6500 check also BOOKE_INTERRUPT_LRAT_ERROR & ESR_DATA
994 case BOOKE_INTERRUPT_DATA_STORAGE:
995 case BOOKE_INTERRUPT_DTLB_MISS:
996 case BOOKE_INTERRUPT_HV_PRIV:
997 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
999 case BOOKE_INTERRUPT_PROGRAM:
1000 /* SW breakpoints arrive as illegal instructions on HV */
1001 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
1002 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1008 trace_kvm_exit(exit_nr, vcpu);
1013 run->exit_reason = KVM_EXIT_UNKNOWN;
1014 run->ready_for_interrupt_injection = 1;
1016 if (emulated != EMULATE_DONE) {
1017 r = kvmppc_resume_inst_load(run, vcpu, emulated, last_inst);
1022 case BOOKE_INTERRUPT_MACHINE_CHECK:
1023 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
1024 kvmppc_dump_vcpu(vcpu);
1025 /* For debugging, send invalid exit reason to user space */
1026 run->hw.hardware_exit_reason = ~1ULL << 32;
1027 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
1031 case BOOKE_INTERRUPT_EXTERNAL:
1032 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1036 case BOOKE_INTERRUPT_DECREMENTER:
1037 kvmppc_account_exit(vcpu, DEC_EXITS);
1041 case BOOKE_INTERRUPT_WATCHDOG:
1045 case BOOKE_INTERRUPT_DOORBELL:
1046 kvmppc_account_exit(vcpu, DBELL_EXITS);
1050 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
1051 kvmppc_account_exit(vcpu, GDBELL_EXITS);
1054 * We are here because there is a pending guest interrupt
1055 * which could not be delivered as MSR_CE or MSR_ME was not
1056 * set. Once we break from here we will retry delivery.
1061 case BOOKE_INTERRUPT_GUEST_DBELL:
1062 kvmppc_account_exit(vcpu, GDBELL_EXITS);
1065 * We are here because there is a pending guest interrupt
1066 * which could not be delivered as MSR_EE was not set. Once
1067 * we break from here we will retry delivery.
1072 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
1076 case BOOKE_INTERRUPT_HV_PRIV:
1077 r = emulation_exit(run, vcpu);
1080 case BOOKE_INTERRUPT_PROGRAM:
1081 if ((vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) &&
1082 (last_inst == KVMPPC_INST_SW_BREAKPOINT)) {
1084 * We are here because of an SW breakpoint instr,
1085 * so lets return to host to handle.
1087 r = kvmppc_handle_debug(run, vcpu);
1088 run->exit_reason = KVM_EXIT_DEBUG;
1089 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1093 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
1095 * Program traps generated by user-level software must
1096 * be handled by the guest kernel.
1098 * In GS mode, hypervisor privileged instructions trap
1099 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
1100 * actual program interrupts, handled by the guest.
1102 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
1104 kvmppc_account_exit(vcpu, USR_PR_INST);
1108 r = emulation_exit(run, vcpu);
1111 case BOOKE_INTERRUPT_FP_UNAVAIL:
1112 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
1113 kvmppc_account_exit(vcpu, FP_UNAVAIL);
1118 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
1119 if (vcpu->arch.shared->msr & MSR_SPE)
1120 kvmppc_vcpu_enable_spe(vcpu);
1122 kvmppc_booke_queue_irqprio(vcpu,
1123 BOOKE_IRQPRIO_SPE_UNAVAIL);
1128 case BOOKE_INTERRUPT_SPE_FP_DATA:
1129 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
1133 case BOOKE_INTERRUPT_SPE_FP_ROUND:
1134 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
1137 #elif defined(CONFIG_SPE_POSSIBLE)
1138 case BOOKE_INTERRUPT_SPE_UNAVAIL:
1140 * Guest wants SPE, but host kernel doesn't support it. Send
1141 * an "unimplemented operation" program check to the guest.
1143 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
1148 * These really should never happen without CONFIG_SPE,
1149 * as we should never enable the real MSR[SPE] in the guest.
1151 case BOOKE_INTERRUPT_SPE_FP_DATA:
1152 case BOOKE_INTERRUPT_SPE_FP_ROUND:
1153 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
1154 __func__, exit_nr, vcpu->arch.pc);
1155 run->hw.hardware_exit_reason = exit_nr;
1158 #endif /* CONFIG_SPE_POSSIBLE */
1161 * On cores with Vector category, KVM is loaded only if CONFIG_ALTIVEC,
1162 * see kvmppc_core_check_processor_compat().
1164 #ifdef CONFIG_ALTIVEC
1165 case BOOKE_INTERRUPT_ALTIVEC_UNAVAIL:
1166 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL);
1170 case BOOKE_INTERRUPT_ALTIVEC_ASSIST:
1171 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_ASSIST);
1176 case BOOKE_INTERRUPT_DATA_STORAGE:
1177 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
1178 vcpu->arch.fault_esr);
1179 kvmppc_account_exit(vcpu, DSI_EXITS);
1183 case BOOKE_INTERRUPT_INST_STORAGE:
1184 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
1185 kvmppc_account_exit(vcpu, ISI_EXITS);
1189 case BOOKE_INTERRUPT_ALIGNMENT:
1190 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1191 vcpu->arch.fault_esr);
1195 #ifdef CONFIG_KVM_BOOKE_HV
1196 case BOOKE_INTERRUPT_HV_SYSCALL:
1197 if (!(vcpu->arch.shared->msr & MSR_PR)) {
1198 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1201 * hcall from guest userspace -- send privileged
1202 * instruction program check.
1204 kvmppc_core_queue_program(vcpu, ESR_PPR);
1210 case BOOKE_INTERRUPT_SYSCALL:
1211 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1212 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1213 /* KVM PV hypercalls */
1214 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1217 /* Guest syscalls */
1218 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
1220 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1225 case BOOKE_INTERRUPT_DTLB_MISS: {
1226 unsigned long eaddr = vcpu->arch.fault_dear;
1231 #ifdef CONFIG_KVM_E500V2
1232 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1233 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1234 kvmppc_map_magic(vcpu);
1235 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1242 /* Check the guest TLB. */
1243 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1244 if (gtlb_index < 0) {
1245 /* The guest didn't have a mapping for it. */
1246 kvmppc_core_queue_dtlb_miss(vcpu,
1247 vcpu->arch.fault_dear,
1248 vcpu->arch.fault_esr);
1249 kvmppc_mmu_dtlb_miss(vcpu);
1250 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1255 idx = srcu_read_lock(&vcpu->kvm->srcu);
1257 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1258 gfn = gpaddr >> PAGE_SHIFT;
1260 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1261 /* The guest TLB had a mapping, but the shadow TLB
1262 * didn't, and it is RAM. This could be because:
1263 * a) the entry is mapping the host kernel, or
1264 * b) the guest used a large mapping which we're faking
1265 * Either way, we need to satisfy the fault without
1266 * invoking the guest. */
1267 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1268 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1271 /* Guest has mapped and accessed a page which is not
1273 vcpu->arch.paddr_accessed = gpaddr;
1274 vcpu->arch.vaddr_accessed = eaddr;
1275 r = kvmppc_emulate_mmio(run, vcpu);
1276 kvmppc_account_exit(vcpu, MMIO_EXITS);
1279 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1283 case BOOKE_INTERRUPT_ITLB_MISS: {
1284 unsigned long eaddr = vcpu->arch.pc;
1291 /* Check the guest TLB. */
1292 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1293 if (gtlb_index < 0) {
1294 /* The guest didn't have a mapping for it. */
1295 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1296 kvmppc_mmu_itlb_miss(vcpu);
1297 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1301 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1303 idx = srcu_read_lock(&vcpu->kvm->srcu);
1305 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1306 gfn = gpaddr >> PAGE_SHIFT;
1308 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1309 /* The guest TLB had a mapping, but the shadow TLB
1310 * didn't. This could be because:
1311 * a) the entry is mapping the host kernel, or
1312 * b) the guest used a large mapping which we're faking
1313 * Either way, we need to satisfy the fault without
1314 * invoking the guest. */
1315 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1317 /* Guest mapped and leaped at non-RAM! */
1318 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1321 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1325 case BOOKE_INTERRUPT_DEBUG: {
1326 r = kvmppc_handle_debug(run, vcpu);
1327 if (r == RESUME_HOST)
1328 run->exit_reason = KVM_EXIT_DEBUG;
1329 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1334 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1340 * To avoid clobbering exit_reason, only check for signals if we
1341 * aren't already exiting to userspace for some other reason.
1343 if (!(r & RESUME_HOST)) {
1344 s = kvmppc_prepare_to_enter(vcpu);
1346 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
1348 /* interrupts now hard-disabled */
1349 kvmppc_fix_ee_before_entry();
1350 kvmppc_load_guest_fp(vcpu);
1351 kvmppc_load_guest_altivec(vcpu);
1358 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1360 u32 old_tsr = vcpu->arch.tsr;
1362 vcpu->arch.tsr = new_tsr;
1364 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1365 arm_next_watchdog(vcpu);
1367 update_timer_ints(vcpu);
1370 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
1371 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1377 vcpu->arch.shared->pir = vcpu->vcpu_id;
1378 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
1379 kvmppc_set_msr(vcpu, 0);
1381 #ifndef CONFIG_KVM_BOOKE_HV
1382 vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS;
1383 vcpu->arch.shadow_pid = 1;
1384 vcpu->arch.shared->msr = 0;
1387 /* Eye-catching numbers so we know if the guest takes an interrupt
1388 * before it's programmed its own IVPR/IVORs. */
1389 vcpu->arch.ivpr = 0x55550000;
1390 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
1391 vcpu->arch.ivor[i] = 0x7700 | i * 4;
1393 kvmppc_init_timing_stats(vcpu);
1395 r = kvmppc_core_vcpu_setup(vcpu);
1396 kvmppc_sanity_check(vcpu);
1400 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1402 /* setup watchdog timer once */
1403 spin_lock_init(&vcpu->arch.wdt_lock);
1404 setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func,
1405 (unsigned long)vcpu);
1408 * Clear DBSR.MRR to avoid guest debug interrupt as
1409 * this is of host interest
1411 mtspr(SPRN_DBSR, DBSR_MRR);
1415 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1417 del_timer_sync(&vcpu->arch.wdt_timer);
1420 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1424 regs->pc = vcpu->arch.pc;
1425 regs->cr = kvmppc_get_cr(vcpu);
1426 regs->ctr = vcpu->arch.ctr;
1427 regs->lr = vcpu->arch.lr;
1428 regs->xer = kvmppc_get_xer(vcpu);
1429 regs->msr = vcpu->arch.shared->msr;
1430 regs->srr0 = kvmppc_get_srr0(vcpu);
1431 regs->srr1 = kvmppc_get_srr1(vcpu);
1432 regs->pid = vcpu->arch.pid;
1433 regs->sprg0 = kvmppc_get_sprg0(vcpu);
1434 regs->sprg1 = kvmppc_get_sprg1(vcpu);
1435 regs->sprg2 = kvmppc_get_sprg2(vcpu);
1436 regs->sprg3 = kvmppc_get_sprg3(vcpu);
1437 regs->sprg4 = kvmppc_get_sprg4(vcpu);
1438 regs->sprg5 = kvmppc_get_sprg5(vcpu);
1439 regs->sprg6 = kvmppc_get_sprg6(vcpu);
1440 regs->sprg7 = kvmppc_get_sprg7(vcpu);
1442 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1443 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1448 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1452 vcpu->arch.pc = regs->pc;
1453 kvmppc_set_cr(vcpu, regs->cr);
1454 vcpu->arch.ctr = regs->ctr;
1455 vcpu->arch.lr = regs->lr;
1456 kvmppc_set_xer(vcpu, regs->xer);
1457 kvmppc_set_msr(vcpu, regs->msr);
1458 kvmppc_set_srr0(vcpu, regs->srr0);
1459 kvmppc_set_srr1(vcpu, regs->srr1);
1460 kvmppc_set_pid(vcpu, regs->pid);
1461 kvmppc_set_sprg0(vcpu, regs->sprg0);
1462 kvmppc_set_sprg1(vcpu, regs->sprg1);
1463 kvmppc_set_sprg2(vcpu, regs->sprg2);
1464 kvmppc_set_sprg3(vcpu, regs->sprg3);
1465 kvmppc_set_sprg4(vcpu, regs->sprg4);
1466 kvmppc_set_sprg5(vcpu, regs->sprg5);
1467 kvmppc_set_sprg6(vcpu, regs->sprg6);
1468 kvmppc_set_sprg7(vcpu, regs->sprg7);
1470 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1471 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1476 static void get_sregs_base(struct kvm_vcpu *vcpu,
1477 struct kvm_sregs *sregs)
1481 sregs->u.e.features |= KVM_SREGS_E_BASE;
1483 sregs->u.e.csrr0 = vcpu->arch.csrr0;
1484 sregs->u.e.csrr1 = vcpu->arch.csrr1;
1485 sregs->u.e.mcsr = vcpu->arch.mcsr;
1486 sregs->u.e.esr = kvmppc_get_esr(vcpu);
1487 sregs->u.e.dear = kvmppc_get_dar(vcpu);
1488 sregs->u.e.tsr = vcpu->arch.tsr;
1489 sregs->u.e.tcr = vcpu->arch.tcr;
1490 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1492 sregs->u.e.vrsave = vcpu->arch.vrsave;
1495 static int set_sregs_base(struct kvm_vcpu *vcpu,
1496 struct kvm_sregs *sregs)
1498 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1501 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1502 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1503 vcpu->arch.mcsr = sregs->u.e.mcsr;
1504 kvmppc_set_esr(vcpu, sregs->u.e.esr);
1505 kvmppc_set_dar(vcpu, sregs->u.e.dear);
1506 vcpu->arch.vrsave = sregs->u.e.vrsave;
1507 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
1509 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
1510 vcpu->arch.dec = sregs->u.e.dec;
1511 kvmppc_emulate_dec(vcpu);
1514 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1515 kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
1520 static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1521 struct kvm_sregs *sregs)
1523 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1525 sregs->u.e.pir = vcpu->vcpu_id;
1526 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1527 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1528 sregs->u.e.decar = vcpu->arch.decar;
1529 sregs->u.e.ivpr = vcpu->arch.ivpr;
1532 static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1533 struct kvm_sregs *sregs)
1535 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1538 if (sregs->u.e.pir != vcpu->vcpu_id)
1541 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1542 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1543 vcpu->arch.decar = sregs->u.e.decar;
1544 vcpu->arch.ivpr = sregs->u.e.ivpr;
1549 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1551 sregs->u.e.features |= KVM_SREGS_E_IVOR;
1553 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1554 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1555 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1556 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1557 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1558 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1559 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1560 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1561 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1562 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1563 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1564 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1565 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1566 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1567 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1568 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1572 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1574 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1577 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1578 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1579 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1580 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1581 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1582 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1583 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1584 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1585 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1586 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1587 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1588 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1589 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1590 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1591 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1592 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1597 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1598 struct kvm_sregs *sregs)
1600 sregs->pvr = vcpu->arch.pvr;
1602 get_sregs_base(vcpu, sregs);
1603 get_sregs_arch206(vcpu, sregs);
1604 return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
1607 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1608 struct kvm_sregs *sregs)
1612 if (vcpu->arch.pvr != sregs->pvr)
1615 ret = set_sregs_base(vcpu, sregs);
1619 ret = set_sregs_arch206(vcpu, sregs);
1623 return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
1626 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
1627 union kvmppc_one_reg *val)
1632 case KVM_REG_PPC_IAC1:
1633 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1);
1635 case KVM_REG_PPC_IAC2:
1636 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac2);
1638 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1639 case KVM_REG_PPC_IAC3:
1640 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac3);
1642 case KVM_REG_PPC_IAC4:
1643 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac4);
1646 case KVM_REG_PPC_DAC1:
1647 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac1);
1649 case KVM_REG_PPC_DAC2:
1650 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac2);
1652 case KVM_REG_PPC_EPR: {
1653 u32 epr = kvmppc_get_epr(vcpu);
1654 *val = get_reg_val(id, epr);
1657 #if defined(CONFIG_64BIT)
1658 case KVM_REG_PPC_EPCR:
1659 *val = get_reg_val(id, vcpu->arch.epcr);
1662 case KVM_REG_PPC_TCR:
1663 *val = get_reg_val(id, vcpu->arch.tcr);
1665 case KVM_REG_PPC_TSR:
1666 *val = get_reg_val(id, vcpu->arch.tsr);
1668 case KVM_REG_PPC_DEBUG_INST:
1669 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1671 case KVM_REG_PPC_VRSAVE:
1672 *val = get_reg_val(id, vcpu->arch.vrsave);
1675 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
1682 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
1683 union kvmppc_one_reg *val)
1688 case KVM_REG_PPC_IAC1:
1689 vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val);
1691 case KVM_REG_PPC_IAC2:
1692 vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val);
1694 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1695 case KVM_REG_PPC_IAC3:
1696 vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val);
1698 case KVM_REG_PPC_IAC4:
1699 vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val);
1702 case KVM_REG_PPC_DAC1:
1703 vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val);
1705 case KVM_REG_PPC_DAC2:
1706 vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val);
1708 case KVM_REG_PPC_EPR: {
1709 u32 new_epr = set_reg_val(id, *val);
1710 kvmppc_set_epr(vcpu, new_epr);
1713 #if defined(CONFIG_64BIT)
1714 case KVM_REG_PPC_EPCR: {
1715 u32 new_epcr = set_reg_val(id, *val);
1716 kvmppc_set_epcr(vcpu, new_epcr);
1720 case KVM_REG_PPC_OR_TSR: {
1721 u32 tsr_bits = set_reg_val(id, *val);
1722 kvmppc_set_tsr_bits(vcpu, tsr_bits);
1725 case KVM_REG_PPC_CLEAR_TSR: {
1726 u32 tsr_bits = set_reg_val(id, *val);
1727 kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1730 case KVM_REG_PPC_TSR: {
1731 u32 tsr = set_reg_val(id, *val);
1732 kvmppc_set_tsr(vcpu, tsr);
1735 case KVM_REG_PPC_TCR: {
1736 u32 tcr = set_reg_val(id, *val);
1737 kvmppc_set_tcr(vcpu, tcr);
1740 case KVM_REG_PPC_VRSAVE:
1741 vcpu->arch.vrsave = set_reg_val(id, *val);
1744 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
1751 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1756 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1761 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1762 struct kvm_translation *tr)
1766 r = kvmppc_core_vcpu_translate(vcpu, tr);
1770 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1775 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1776 struct kvm_memory_slot *dont)
1780 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1781 unsigned long npages)
1786 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1787 struct kvm_memory_slot *memslot,
1788 const struct kvm_userspace_memory_region *mem)
1793 void kvmppc_core_commit_memory_region(struct kvm *kvm,
1794 const struct kvm_userspace_memory_region *mem,
1795 const struct kvm_memory_slot *old,
1796 const struct kvm_memory_slot *new)
1800 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1804 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
1806 #if defined(CONFIG_64BIT)
1807 vcpu->arch.epcr = new_epcr;
1808 #ifdef CONFIG_KVM_BOOKE_HV
1809 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1810 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
1811 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1816 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1818 vcpu->arch.tcr = new_tcr;
1819 arm_next_watchdog(vcpu);
1820 update_timer_ints(vcpu);
1823 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1825 set_bits(tsr_bits, &vcpu->arch.tsr);
1827 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1828 kvm_vcpu_kick(vcpu);
1831 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1833 clear_bits(tsr_bits, &vcpu->arch.tsr);
1836 * We may have stopped the watchdog due to
1837 * being stuck on final expiration.
1839 if (tsr_bits & (TSR_ENW | TSR_WIS))
1840 arm_next_watchdog(vcpu);
1842 update_timer_ints(vcpu);
1845 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
1847 if (vcpu->arch.tcr & TCR_ARE) {
1848 vcpu->arch.dec = vcpu->arch.decar;
1849 kvmppc_emulate_dec(vcpu);
1852 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1855 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg,
1856 uint64_t addr, int index)
1860 dbg_reg->dbcr0 |= DBCR0_IAC1;
1861 dbg_reg->iac1 = addr;
1864 dbg_reg->dbcr0 |= DBCR0_IAC2;
1865 dbg_reg->iac2 = addr;
1867 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1869 dbg_reg->dbcr0 |= DBCR0_IAC3;
1870 dbg_reg->iac3 = addr;
1873 dbg_reg->dbcr0 |= DBCR0_IAC4;
1874 dbg_reg->iac4 = addr;
1881 dbg_reg->dbcr0 |= DBCR0_IDM;
1885 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr,
1886 int type, int index)
1890 if (type & KVMPPC_DEBUG_WATCH_READ)
1891 dbg_reg->dbcr0 |= DBCR0_DAC1R;
1892 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1893 dbg_reg->dbcr0 |= DBCR0_DAC1W;
1894 dbg_reg->dac1 = addr;
1897 if (type & KVMPPC_DEBUG_WATCH_READ)
1898 dbg_reg->dbcr0 |= DBCR0_DAC2R;
1899 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1900 dbg_reg->dbcr0 |= DBCR0_DAC2W;
1901 dbg_reg->dac2 = addr;
1907 dbg_reg->dbcr0 |= DBCR0_IDM;
1910 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set)
1912 /* XXX: Add similar MSR protection for BookE-PR */
1913 #ifdef CONFIG_KVM_BOOKE_HV
1914 BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP));
1916 if (prot_bitmap & MSR_UCLE)
1917 vcpu->arch.shadow_msrp |= MSRP_UCLEP;
1918 if (prot_bitmap & MSR_DE)
1919 vcpu->arch.shadow_msrp |= MSRP_DEP;
1920 if (prot_bitmap & MSR_PMM)
1921 vcpu->arch.shadow_msrp |= MSRP_PMMP;
1923 if (prot_bitmap & MSR_UCLE)
1924 vcpu->arch.shadow_msrp &= ~MSRP_UCLEP;
1925 if (prot_bitmap & MSR_DE)
1926 vcpu->arch.shadow_msrp &= ~MSRP_DEP;
1927 if (prot_bitmap & MSR_PMM)
1928 vcpu->arch.shadow_msrp &= ~MSRP_PMMP;
1933 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
1934 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
1939 #ifdef CONFIG_KVM_E500V2
1940 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1941 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1943 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) |
1944 (eaddr & ~PAGE_MASK);
1945 pte->vpage = eaddr >> PAGE_SHIFT;
1946 pte->may_read = true;
1947 pte->may_write = true;
1948 pte->may_execute = true;
1954 /* Check the guest TLB. */
1957 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1960 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1966 /* Do we have a TLB entry at all? */
1970 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1973 pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK);
1974 pte->vpage = eaddr >> PAGE_SHIFT;
1976 /* XXX read permissions from the guest TLB */
1977 pte->may_read = true;
1978 pte->may_write = true;
1979 pte->may_execute = true;
1984 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
1985 struct kvm_guest_debug *dbg)
1987 struct debug_reg *dbg_reg;
1988 int n, b = 0, w = 0;
1990 if (!(dbg->control & KVM_GUESTDBG_ENABLE)) {
1991 vcpu->arch.dbg_reg.dbcr0 = 0;
1992 vcpu->guest_debug = 0;
1993 kvm_guest_protect_msr(vcpu, MSR_DE, false);
1997 kvm_guest_protect_msr(vcpu, MSR_DE, true);
1998 vcpu->guest_debug = dbg->control;
1999 vcpu->arch.dbg_reg.dbcr0 = 0;
2001 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
2002 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC;
2004 /* Code below handles only HW breakpoints */
2005 dbg_reg = &(vcpu->arch.dbg_reg);
2007 #ifdef CONFIG_KVM_BOOKE_HV
2009 * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1
2010 * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0
2016 * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1
2017 * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR
2020 dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US |
2022 dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
2025 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
2028 for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) {
2029 uint64_t addr = dbg->arch.bp[n].addr;
2030 uint32_t type = dbg->arch.bp[n].type;
2032 if (type == KVMPPC_DEBUG_NONE)
2035 if (type & !(KVMPPC_DEBUG_WATCH_READ |
2036 KVMPPC_DEBUG_WATCH_WRITE |
2037 KVMPPC_DEBUG_BREAKPOINT))
2040 if (type & KVMPPC_DEBUG_BREAKPOINT) {
2041 /* Setting H/W breakpoint */
2042 if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++))
2045 /* Setting H/W watchpoint */
2046 if (kvmppc_booke_add_watchpoint(dbg_reg, addr,
2055 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2057 vcpu->cpu = smp_processor_id();
2058 current->thread.kvm_vcpu = vcpu;
2061 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
2063 current->thread.kvm_vcpu = NULL;
2066 /* Clear pending debug event in DBSR */
2067 kvmppc_clear_dbsr();
2070 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
2072 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
2075 int kvmppc_core_init_vm(struct kvm *kvm)
2077 return kvm->arch.kvm_ops->init_vm(kvm);
2080 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
2082 return kvm->arch.kvm_ops->vcpu_create(kvm, id);
2085 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
2087 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2090 void kvmppc_core_destroy_vm(struct kvm *kvm)
2092 kvm->arch.kvm_ops->destroy_vm(kvm);
2095 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2097 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
2100 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
2102 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
2105 int __init kvmppc_booke_init(void)
2107 #ifndef CONFIG_KVM_BOOKE_HV
2108 unsigned long ivor[16];
2109 unsigned long *handler = kvmppc_booke_handler_addr;
2110 unsigned long max_ivor = 0;
2111 unsigned long handler_len;
2114 /* We install our own exception handlers by hijacking IVPR. IVPR must
2115 * be 16-bit aligned, so we need a 64KB allocation. */
2116 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
2118 if (!kvmppc_booke_handlers)
2121 /* XXX make sure our handlers are smaller than Linux's */
2123 /* Copy our interrupt handlers to match host IVORs. That way we don't
2124 * have to swap the IVORs on every guest/host transition. */
2125 ivor[0] = mfspr(SPRN_IVOR0);
2126 ivor[1] = mfspr(SPRN_IVOR1);
2127 ivor[2] = mfspr(SPRN_IVOR2);
2128 ivor[3] = mfspr(SPRN_IVOR3);
2129 ivor[4] = mfspr(SPRN_IVOR4);
2130 ivor[5] = mfspr(SPRN_IVOR5);
2131 ivor[6] = mfspr(SPRN_IVOR6);
2132 ivor[7] = mfspr(SPRN_IVOR7);
2133 ivor[8] = mfspr(SPRN_IVOR8);
2134 ivor[9] = mfspr(SPRN_IVOR9);
2135 ivor[10] = mfspr(SPRN_IVOR10);
2136 ivor[11] = mfspr(SPRN_IVOR11);
2137 ivor[12] = mfspr(SPRN_IVOR12);
2138 ivor[13] = mfspr(SPRN_IVOR13);
2139 ivor[14] = mfspr(SPRN_IVOR14);
2140 ivor[15] = mfspr(SPRN_IVOR15);
2142 for (i = 0; i < 16; i++) {
2143 if (ivor[i] > max_ivor)
2146 handler_len = handler[i + 1] - handler[i];
2147 memcpy((void *)kvmppc_booke_handlers + ivor[i],
2148 (void *)handler[i], handler_len);
2151 handler_len = handler[max_ivor + 1] - handler[max_ivor];
2152 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
2153 ivor[max_ivor] + handler_len);
2154 #endif /* !BOOKE_HV */
2158 void __exit kvmppc_booke_exit(void)
2160 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);