2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright IBM Corp. 2007
16 * Copyright 2011 Freescale Semiconductor, Inc.
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
21 #include <linux/jiffies.h>
22 #include <linux/hrtimer.h>
23 #include <linux/types.h>
24 #include <linux/string.h>
25 #include <linux/kvm_host.h>
26 #include <linux/clockchips.h>
30 #include <asm/byteorder.h>
31 #include <asm/kvm_ppc.h>
32 #include <asm/disassemble.h>
39 #define OP_31_XOP_TRAP 4
40 #define OP_31_XOP_LWZX 23
41 #define OP_31_XOP_TRAP_64 68
42 #define OP_31_XOP_DCBF 86
43 #define OP_31_XOP_LBZX 87
44 #define OP_31_XOP_STWX 151
45 #define OP_31_XOP_STBX 215
46 #define OP_31_XOP_LBZUX 119
47 #define OP_31_XOP_STBUX 247
48 #define OP_31_XOP_LHZX 279
49 #define OP_31_XOP_LHZUX 311
50 #define OP_31_XOP_MFSPR 339
51 #define OP_31_XOP_LHAX 343
52 #define OP_31_XOP_STHX 407
53 #define OP_31_XOP_STHUX 439
54 #define OP_31_XOP_MTSPR 467
55 #define OP_31_XOP_DCBI 470
56 #define OP_31_XOP_LWBRX 534
57 #define OP_31_XOP_TLBSYNC 566
58 #define OP_31_XOP_STWBRX 662
59 #define OP_31_XOP_LHBRX 790
60 #define OP_31_XOP_STHBRX 918
79 void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
81 unsigned long dec_nsec;
82 unsigned long long dec_time;
84 pr_debug("mtDEC: %x\n", vcpu->arch.dec);
85 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
87 #ifdef CONFIG_PPC_BOOK3S
88 /* mtdec lowers the interrupt line when positive. */
89 kvmppc_core_dequeue_dec(vcpu);
91 /* POWER4+ triggers a dec interrupt if the value is < 0 */
92 if (vcpu->arch.dec & 0x80000000) {
93 kvmppc_core_queue_dec(vcpu);
99 /* On BOOKE, DEC = 0 is as good as decrementer not enabled */
100 if (vcpu->arch.dec == 0)
105 * The decrementer ticks at the same rate as the timebase, so
106 * that's how we convert the guest DEC value to the number of
110 dec_time = vcpu->arch.dec;
112 * Guest timebase ticks at the same frequency as host decrementer.
113 * So use the host decrementer calculations for decrementer emulation.
115 dec_time = dec_time << decrementer_clockevent.shift;
116 do_div(dec_time, decrementer_clockevent.mult);
117 dec_nsec = do_div(dec_time, NSEC_PER_SEC);
118 hrtimer_start(&vcpu->arch.dec_timer,
119 ktime_set(dec_time, dec_nsec), HRTIMER_MODE_REL);
120 vcpu->arch.dec_jiffies = get_tb();
123 u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb)
125 u64 jd = tb - vcpu->arch.dec_jiffies;
128 if (vcpu->arch.dec < jd)
132 return vcpu->arch.dec - jd;
135 static int kvmppc_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
137 enum emulation_result emulated = EMULATE_DONE;
138 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
142 vcpu->arch.shared->srr0 = spr_val;
145 vcpu->arch.shared->srr1 = spr_val;
148 /* XXX We need to context-switch the timebase for
149 * watchdog and FIT. */
150 case SPRN_TBWL: break;
151 case SPRN_TBWU: break;
153 case SPRN_MSSSR0: break;
156 vcpu->arch.dec = spr_val;
157 kvmppc_emulate_dec(vcpu);
161 vcpu->arch.shared->sprg0 = spr_val;
164 vcpu->arch.shared->sprg1 = spr_val;
167 vcpu->arch.shared->sprg2 = spr_val;
170 vcpu->arch.shared->sprg3 = spr_val;
174 emulated = kvmppc_core_emulate_mtspr(vcpu, sprn,
176 if (emulated == EMULATE_FAIL)
177 printk(KERN_INFO "mtspr: unknown spr "
182 kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
187 static int kvmppc_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
189 enum emulation_result emulated = EMULATE_DONE;
194 spr_val = vcpu->arch.shared->srr0;
197 spr_val = vcpu->arch.shared->srr1;
200 spr_val = vcpu->arch.pvr;
203 spr_val = vcpu->vcpu_id;
209 /* Note: mftb and TBRL/TBWL are user-accessible, so
210 * the guest can always access the real TB anyways.
211 * In fact, we probably will never see these traps. */
213 spr_val = get_tb() >> 32;
220 spr_val = vcpu->arch.shared->sprg0;
223 spr_val = vcpu->arch.shared->sprg1;
226 spr_val = vcpu->arch.shared->sprg2;
229 spr_val = vcpu->arch.shared->sprg3;
231 /* Note: SPRG4-7 are user-readable, so we don't get
235 spr_val = kvmppc_get_dec(vcpu, get_tb());
238 emulated = kvmppc_core_emulate_mfspr(vcpu, sprn,
240 if (unlikely(emulated == EMULATE_FAIL)) {
241 printk(KERN_INFO "mfspr: unknown spr "
247 if (emulated == EMULATE_DONE)
248 kvmppc_set_gpr(vcpu, rt, spr_val);
249 kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
266 * XXX is_bigendian should depend on MMU mapping or MSR[LE]
268 /* XXX Should probably auto-generate instruction decoding for a particular core
269 * from opcode tables in the future. */
270 int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
272 u32 inst = kvmppc_get_last_inst(vcpu);
273 int ra = get_ra(inst);
274 int rs = get_rs(inst);
275 int rt = get_rt(inst);
276 int sprn = get_sprn(inst);
277 enum emulation_result emulated = EMULATE_DONE;
280 /* this default type might be overwritten by subcategories */
281 kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
283 pr_debug("Emulating opcode %d / %d\n", get_op(inst), get_xop(inst));
285 switch (get_op(inst)) {
287 #ifdef CONFIG_PPC_BOOK3S
289 kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
291 kvmppc_core_queue_program(vcpu,
292 vcpu->arch.shared->esr | ESR_PTR);
298 switch (get_xop(inst)) {
302 case OP_31_XOP_TRAP_64:
304 #ifdef CONFIG_PPC_BOOK3S
305 kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
307 kvmppc_core_queue_program(vcpu,
308 vcpu->arch.shared->esr | ESR_PTR);
313 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
317 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
320 case OP_31_XOP_LBZUX:
321 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
322 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
326 emulated = kvmppc_handle_store(run, vcpu,
327 kvmppc_get_gpr(vcpu, rs),
332 emulated = kvmppc_handle_store(run, vcpu,
333 kvmppc_get_gpr(vcpu, rs),
337 case OP_31_XOP_STBUX:
338 emulated = kvmppc_handle_store(run, vcpu,
339 kvmppc_get_gpr(vcpu, rs),
341 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
345 emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);
349 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
352 case OP_31_XOP_LHZUX:
353 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
354 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
357 case OP_31_XOP_MFSPR:
358 emulated = kvmppc_emulate_mfspr(vcpu, sprn, rt);
362 emulated = kvmppc_handle_store(run, vcpu,
363 kvmppc_get_gpr(vcpu, rs),
367 case OP_31_XOP_STHUX:
368 emulated = kvmppc_handle_store(run, vcpu,
369 kvmppc_get_gpr(vcpu, rs),
371 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
374 case OP_31_XOP_MTSPR:
375 emulated = kvmppc_emulate_mtspr(vcpu, sprn, rs);
380 /* Do nothing. The guest is performing dcbi because
381 * hardware DMA is not snooped by the dcache, but
382 * emulated DMA either goes through the dcache as
383 * normal writes, or the host kernel has handled dcache
387 case OP_31_XOP_LWBRX:
388 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 0);
391 case OP_31_XOP_TLBSYNC:
394 case OP_31_XOP_STWBRX:
395 emulated = kvmppc_handle_store(run, vcpu,
396 kvmppc_get_gpr(vcpu, rs),
400 case OP_31_XOP_LHBRX:
401 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 0);
404 case OP_31_XOP_STHBRX:
405 emulated = kvmppc_handle_store(run, vcpu,
406 kvmppc_get_gpr(vcpu, rs),
411 /* Attempt core-specific emulation below. */
412 emulated = EMULATE_FAIL;
417 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
420 /* TBD: Add support for other 64 bit load variants like ldu, ldux, ldx etc. */
423 emulated = kvmppc_handle_load(run, vcpu, rt, 8, 1);
427 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
428 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
432 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
436 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
437 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
441 emulated = kvmppc_handle_store(run, vcpu,
442 kvmppc_get_gpr(vcpu, rs),
446 /* TBD: Add support for other 64 bit store variants like stdu, stdux, stdx etc. */
449 emulated = kvmppc_handle_store(run, vcpu,
450 kvmppc_get_gpr(vcpu, rs),
455 emulated = kvmppc_handle_store(run, vcpu,
456 kvmppc_get_gpr(vcpu, rs),
458 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
462 emulated = kvmppc_handle_store(run, vcpu,
463 kvmppc_get_gpr(vcpu, rs),
468 emulated = kvmppc_handle_store(run, vcpu,
469 kvmppc_get_gpr(vcpu, rs),
471 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
475 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
479 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
480 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
484 emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);
488 emulated = kvmppc_handle_loads(run, vcpu, rt, 2, 1);
489 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
493 emulated = kvmppc_handle_store(run, vcpu,
494 kvmppc_get_gpr(vcpu, rs),
499 emulated = kvmppc_handle_store(run, vcpu,
500 kvmppc_get_gpr(vcpu, rs),
502 kvmppc_set_gpr(vcpu, ra, vcpu->arch.vaddr_accessed);
506 emulated = EMULATE_FAIL;
509 if (emulated == EMULATE_FAIL) {
510 emulated = kvmppc_core_emulate_op(run, vcpu, inst, &advance);
511 if (emulated == EMULATE_AGAIN) {
513 } else if (emulated == EMULATE_FAIL) {
515 printk(KERN_ERR "Couldn't emulate instruction 0x%08x "
516 "(op %d xop %d)\n", inst, get_op(inst), get_xop(inst));
517 kvmppc_core_queue_program(vcpu, 0);
521 trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated);
523 /* Advance past emulated instruction. */
525 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);