2 * Floating-point, VMX/Altivec and VSX loads and stores
3 * for use in instruction emulation.
5 * Copyright 2010 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
13 #include <asm/processor.h>
14 #include <asm/ppc_asm.h>
15 #include <asm/ppc-opcode.h>
17 #include <asm/asm-offsets.h>
18 #include <linux/errno.h>
20 #define STKFRM (PPC_MIN_STKFRM + 16)
22 .macro extab instr,handler
23 .section __ex_table,"a"
24 PPC_LONG \instr,\handler
38 /* Get the contents of frN into fr0; N is in r3. */
43 blr /* fr0 is already in fr0 */
57 /* Put the contents of fr0 into frN; N is in r3. */
62 blr /* fr0 is already in fr0 */
76 /* Load FP reg N from float at *p. N is in r3, p in r4. */
78 PPC_STLU r1,-STKFRM(r1)
80 PPC_STL r0,STKFRM+PPC_LR_STKOFF(r1)
87 stfd fr0,STKFRM-16(r1)
94 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
103 /* Load FP reg N from double at *p. N is in r3, p in r4. */
105 PPC_STLU r1,-STKFRM(r1)
107 PPC_STL r0,STKFRM+PPC_LR_STKOFF(r1)
114 stfd fr0,STKFRM-16(r1)
120 lfd fr0,STKFRM-16(r1)
121 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
130 /* Store FP reg N to float at *p. N is in r3, p in r4. */
132 PPC_STLU r1,-STKFRM(r1)
134 PPC_STL r0,STKFRM+PPC_LR_STKOFF(r1)
141 stfd fr0,STKFRM-16(r1)
147 lfd fr0,STKFRM-16(r1)
148 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
157 /* Store FP reg N to double at *p. N is in r3, p in r4. */
159 PPC_STLU r1,-STKFRM(r1)
161 PPC_STL r0,STKFRM+PPC_LR_STKOFF(r1)
168 stfd fr0,STKFRM-16(r1)
174 lfd fr0,STKFRM-16(r1)
175 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
184 #ifdef CONFIG_ALTIVEC
185 /* Get the contents of vrN into vr0; N is in r3. */
190 blr /* vr0 is already in vr0 */
194 vor vr0,reg,reg /* assembler doesn't know vmr? */
204 /* Put the contents of vr0 into vrN; N is in r3. */
209 blr /* vr0 is already in vr0 */
223 /* Load vector reg N from *p. N is in r3, p in r4. */
225 PPC_STLU r1,-STKFRM(r1)
227 PPC_STL r0,STKFRM+PPC_LR_STKOFF(r1)
242 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
251 /* Store vector reg N to *p. N is in r3, p in r4. */
253 PPC_STLU r1,-STKFRM(r1)
255 PPC_STL r0,STKFRM+PPC_LR_STKOFF(r1)
270 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
278 #endif /* CONFIG_ALTIVEC */
281 /* Get the contents of vsrN into vsr0; N is in r3. */
286 blr /* vsr0 is already in vsr0 */
300 /* Put the contents of vsr0 into vsrN; N is in r3. */
305 blr /* vr0 is already in vr0 */
319 /* Load VSX reg N from vector doubleword *p. N is in r3, p in r4. */
321 PPC_STLU r1,-STKFRM(r1)
323 PPC_STL r0,STKFRM+PPC_LR_STKOFF(r1)
338 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
347 /* Store VSX reg N to vector doubleword *p. N is in r3, p in r4. */
349 PPC_STLU r1,-STKFRM(r1)
351 PPC_STL r0,STKFRM+PPC_LR_STKOFF(r1)
366 4: PPC_LL r0,STKFRM+PPC_LR_STKOFF(r1)
375 #endif /* CONFIG_VSX */