2 * This file contains common routines for dealing with free of page tables
3 * Along with common page table handling code
5 * Derived from arch/powerpc/mm/tlb_64.c:
6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
9 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
10 * Copyright (C) 1996 Paul Mackerras
12 * Derived from "arch/i386/mm/init.c"
13 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
15 * Dave Engebretsen <engebret@us.ibm.com>
16 * Rework for PPC64 port.
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
24 #include <linux/kernel.h>
26 #include <linux/init.h>
27 #include <linux/percpu.h>
28 #include <linux/hardirq.h>
29 #include <asm/pgalloc.h>
30 #include <asm/tlbflush.h>
35 DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
40 * Handle batching of page table freeing on SMP. Page tables are
41 * queued up and send to be freed later by RCU in order to avoid
42 * freeing a page table page that is being walked without locks
45 static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
46 static unsigned long pte_freelist_forced_free;
48 struct pte_freelist_batch
52 pgtable_free_t tables[0];
55 #define PTE_FREELIST_SIZE \
56 ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
57 / sizeof(pgtable_free_t))
59 static void pte_free_smp_sync(void *arg)
61 /* Do nothing, just ensure we sync with all CPUs */
64 /* This is only called when we are critically out of memory
65 * (and fail to get a page in pte_free_tlb).
67 static void pgtable_free_now(pgtable_free_t pgf)
69 pte_freelist_forced_free++;
71 smp_call_function(pte_free_smp_sync, NULL, 1);
76 static void pte_free_rcu_callback(struct rcu_head *head)
78 struct pte_freelist_batch *batch =
79 container_of(head, struct pte_freelist_batch, rcu);
82 for (i = 0; i < batch->index; i++)
83 pgtable_free(batch->tables[i]);
85 free_page((unsigned long)batch);
88 static void pte_free_submit(struct pte_freelist_batch *batch)
90 INIT_RCU_HEAD(&batch->rcu);
91 call_rcu(&batch->rcu, pte_free_rcu_callback);
94 void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf)
96 /* This is safe since tlb_gather_mmu has disabled preemption */
97 struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
99 if (atomic_read(&tlb->mm->mm_users) < 2 ||
100 cpumask_equal(mm_cpumask(tlb->mm), cpumask_of(smp_processor_id()))){
105 if (*batchp == NULL) {
106 *batchp = (struct pte_freelist_batch *)__get_free_page(GFP_ATOMIC);
107 if (*batchp == NULL) {
108 pgtable_free_now(pgf);
111 (*batchp)->index = 0;
113 (*batchp)->tables[(*batchp)->index++] = pgf;
114 if ((*batchp)->index == PTE_FREELIST_SIZE) {
115 pte_free_submit(*batchp);
120 void pte_free_finish(void)
122 /* This is safe since tlb_gather_mmu has disabled preemption */
123 struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
127 pte_free_submit(*batchp);
131 #endif /* CONFIG_SMP */
133 static inline int is_exec_fault(void)
135 return current->thread.regs && TRAP(current->thread.regs) == 0x400;
138 /* We only try to do i/d cache coherency on stuff that looks like
139 * reasonably "normal" PTEs. We currently require a PTE to be present
140 * and we avoid _PAGE_SPECIAL and _PAGE_NO_CACHE. We also only do that
143 static inline int pte_looks_normal(pte_t pte)
145 return (pte_val(pte) &
146 (_PAGE_PRESENT | _PAGE_SPECIAL | _PAGE_NO_CACHE | _PAGE_USER)) ==
147 (_PAGE_PRESENT | _PAGE_USER);
150 struct page * maybe_pte_to_page(pte_t pte)
152 unsigned long pfn = pte_pfn(pte);
155 if (unlikely(!pfn_valid(pfn)))
157 page = pfn_to_page(pfn);
158 if (PageReserved(page))
163 #if defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0
165 /* Server-style MMU handles coherency when hashing if HW exec permission
166 * is supposed per page (currently 64-bit only). If not, then, we always
167 * flush the cache for valid PTEs in set_pte. Embedded CPU without HW exec
168 * support falls into the same category.
171 static pte_t set_pte_filter(pte_t pte, unsigned long addr)
173 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
174 if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
175 cpu_has_feature(CPU_FTR_NOEXECUTE))) {
176 struct page *pg = maybe_pte_to_page(pte);
179 if (!test_bit(PG_arch_1, &pg->flags)) {
181 /* On 8xx, cache control instructions (particularly
182 * "dcbst" from flush_dcache_icache) fault as write
183 * operation if there is an unpopulated TLB entry
184 * for the address in question. To workaround that,
185 * we invalidate the TLB here, thus avoiding dcbst
188 /* 8xx doesn't care about PID, size or ind args */
189 _tlbil_va(addr, 0, 0, 0);
190 #endif /* CONFIG_8xx */
191 flush_dcache_icache_page(pg);
192 set_bit(PG_arch_1, &pg->flags);
198 static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
204 #else /* defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0 */
206 /* Embedded type MMU with HW exec support. This is a bit more complicated
207 * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
208 * instead we "filter out" the exec permission for non clean pages.
210 static pte_t set_pte_filter(pte_t pte, unsigned long addr)
214 /* No exec permission in the first place, move on */
215 if (!(pte_val(pte) & _PAGE_EXEC) || !pte_looks_normal(pte))
218 /* If you set _PAGE_EXEC on weird pages you're on your own */
219 pg = maybe_pte_to_page(pte);
223 /* If the page clean, we move on */
224 if (test_bit(PG_arch_1, &pg->flags))
227 /* If it's an exec fault, we flush the cache and make it clean */
228 if (is_exec_fault()) {
229 flush_dcache_icache_page(pg);
230 set_bit(PG_arch_1, &pg->flags);
234 /* Else, we filter out _PAGE_EXEC */
235 return __pte(pte_val(pte) & ~_PAGE_EXEC);
238 static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
243 /* So here, we only care about exec faults, as we use them
244 * to recover lost _PAGE_EXEC and perform I$/D$ coherency
245 * if necessary. Also if _PAGE_EXEC is already set, same deal,
248 if (dirty || (pte_val(pte) & _PAGE_EXEC) || !is_exec_fault())
251 #ifdef CONFIG_DEBUG_VM
252 /* So this is an exec fault, _PAGE_EXEC is not set. If it was
253 * an error we would have bailed out earlier in do_page_fault()
254 * but let's make sure of it
256 if (WARN_ON(!(vma->vm_flags & VM_EXEC)))
258 #endif /* CONFIG_DEBUG_VM */
260 /* If you set _PAGE_EXEC on weird pages you're on your own */
261 pg = maybe_pte_to_page(pte);
265 /* If the page is already clean, we move on */
266 if (test_bit(PG_arch_1, &pg->flags))
269 /* Clean the page and set PG_arch_1 */
270 flush_dcache_icache_page(pg);
271 set_bit(PG_arch_1, &pg->flags);
274 return __pte(pte_val(pte) | _PAGE_EXEC);
277 #endif /* !(defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0) */
280 * set_pte stores a linux PTE into the linux page table.
282 void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
285 #ifdef CONFIG_DEBUG_VM
286 WARN_ON(pte_present(*ptep));
288 /* Note: mm->context.id might not yet have been assigned as
289 * this context might not have been activated yet when this
292 pte = set_pte_filter(pte, addr);
294 /* Perform the setting of the PTE */
295 __set_pte_at(mm, addr, ptep, pte, 0);
299 * This is called when relaxing access to a PTE. It's also called in the page
300 * fault path when we don't hit any of the major fault cases, ie, a minor
301 * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
302 * handled those two for us, we additionally deal with missing execute
303 * permission here on some processors
305 int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
306 pte_t *ptep, pte_t entry, int dirty)
309 entry = set_access_flags_filter(entry, vma, dirty);
310 changed = !pte_same(*(ptep), entry);
312 if (!(vma->vm_flags & VM_HUGETLB))
313 assert_pte_locked(vma->vm_mm, address);
314 __ptep_set_access_flags(ptep, entry);
315 flush_tlb_page_nohash(vma, address);
320 #ifdef CONFIG_DEBUG_VM
321 void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
329 pgd = mm->pgd + pgd_index(addr);
330 BUG_ON(pgd_none(*pgd));
331 pud = pud_offset(pgd, addr);
332 BUG_ON(pud_none(*pud));
333 pmd = pmd_offset(pud, addr);
334 BUG_ON(!pmd_present(*pmd));
335 assert_spin_locked(pte_lockptr(mm, pmd));
337 #endif /* CONFIG_DEBUG_VM */