2 * MPC83xx suspend support
4 * Author: Scott Wood <scottwood@freescale.com>
6 * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
14 #include <linux/types.h>
15 #include <linux/ioport.h>
16 #include <linux/interrupt.h>
17 #include <linux/wait.h>
18 #include <linux/kthread.h>
19 #include <linux/freezer.h>
20 #include <linux/suspend.h>
21 #include <linux/fsl_devices.h>
22 #include <linux/of_address.h>
23 #include <linux/of_irq.h>
24 #include <linux/of_platform.h>
25 #include <linux/export.h>
30 #include <asm/mpc6xx.h>
31 #include <asm/switch_to.h>
33 #include <sysdev/fsl_soc.h>
35 #define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */
36 #define PMCCR1_NEXT_STATE_SHIFT 2
37 #define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/
38 #define IMMR_SYSCR_OFFSET 0x100
39 #define IMMR_RCW_OFFSET 0x900
40 #define RCW_PCI_HOST 0x80000000
42 void mpc83xx_enter_deep_sleep(phys_addr_t immrbase);
46 #define PMCCR_DLPEN 2 /* DDR SDRAM low power enable */
47 #define PMCCR_SLPEN 1 /* System low power enable */
51 /* All but PMCI are deep-sleep only */
52 #define PMCER_GPIO 0x100
53 #define PMCER_PCI 0x080
54 #define PMCER_USB 0x040
55 #define PMCER_ETSEC1 0x020
56 #define PMCER_ETSEC2 0x010
57 #define PMCER_TIMER 0x008
58 #define PMCER_INT1 0x004
59 #define PMCER_INT2 0x002
60 #define PMCER_PMCI 0x001
61 #define PMCER_ALL 0x1FF
65 #define PMCCR1_USE_STATE 0x80000000
66 #define PMCCR1_PME_EN 0x00000080
67 #define PMCCR1_ASSERT_PME 0x00000040
68 #define PMCCR1_POWER_OFF 0x00000020
79 struct mpc83xx_clock {
85 struct mpc83xx_syscr {
95 struct mpc83xx_saved {
105 static struct platform_device *pmc_dev;
106 static int has_deep_sleep, deep_sleeping;
108 static struct mpc83xx_pmc __iomem *pmc_regs;
109 static struct mpc83xx_clock __iomem *clock_regs;
110 static struct mpc83xx_syscr __iomem *syscr_regs;
111 static struct mpc83xx_saved saved_regs;
112 static int is_pci_agent, wake_from_pci;
113 static phys_addr_t immrbase;
114 static int pci_pm_state;
115 static DECLARE_WAIT_QUEUE_HEAD(agent_wq);
117 int fsl_deep_sleep(void)
119 return deep_sleeping;
121 EXPORT_SYMBOL(fsl_deep_sleep);
123 static int mpc83xx_change_state(void)
126 u32 reg_cfg1 = in_be32(&pmc_regs->config1);
129 pci_pm_state = (reg_cfg1 & PMCCR1_NEXT_STATE) >>
130 PMCCR1_NEXT_STATE_SHIFT;
131 curr_state = reg_cfg1 & PMCCR1_CURR_STATE;
133 if (curr_state != pci_pm_state) {
134 reg_cfg1 &= ~PMCCR1_CURR_STATE;
135 reg_cfg1 |= pci_pm_state;
136 out_be32(&pmc_regs->config1, reg_cfg1);
146 static irqreturn_t pmc_irq_handler(int irq, void *dev_id)
148 u32 event = in_be32(&pmc_regs->event);
151 if (mpc83xx_change_state())
155 out_be32(&pmc_regs->event, event);
162 static void mpc83xx_suspend_restore_regs(void)
164 out_be32(&syscr_regs->sicrl, saved_regs.sicrl);
165 out_be32(&syscr_regs->sicrh, saved_regs.sicrh);
166 out_be32(&clock_regs->sccr, saved_regs.sccr);
169 static void mpc83xx_suspend_save_regs(void)
171 saved_regs.sicrl = in_be32(&syscr_regs->sicrl);
172 saved_regs.sicrh = in_be32(&syscr_regs->sicrh);
173 saved_regs.sccr = in_be32(&clock_regs->sccr);
176 static int mpc83xx_suspend_enter(suspend_state_t state)
180 /* Don't go to sleep if there's a race where pci_pm_state changes
181 * between the agent thread checking it and the PM code disabling
185 if (pci_pm_state != (deep_sleeping ? 3 : 2))
188 out_be32(&pmc_regs->config1,
189 in_be32(&pmc_regs->config1) | PMCCR1_PME_EN);
192 /* Put the system into low-power mode and the RAM
193 * into self-refresh mode once the core goes to
197 out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN);
199 /* If it has deep sleep (i.e. it's an 831x or compatible),
200 * disable power to the core upon entering sleep mode. This will
201 * require going through the boot firmware upon a wakeup event.
205 mpc83xx_suspend_save_regs();
207 out_be32(&pmc_regs->mask, PMCER_ALL);
209 out_be32(&pmc_regs->config1,
210 in_be32(&pmc_regs->config1) | PMCCR1_POWER_OFF);
214 mpc83xx_enter_deep_sleep(immrbase);
216 out_be32(&pmc_regs->config1,
217 in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF);
219 out_be32(&pmc_regs->mask, PMCER_PMCI);
221 mpc83xx_suspend_restore_regs();
223 out_be32(&pmc_regs->mask, PMCER_PMCI);
225 mpc6xx_enter_standby();
231 out_be32(&pmc_regs->config1,
232 in_be32(&pmc_regs->config1) & ~PMCCR1_PME_EN);
237 static void mpc83xx_suspend_end(void)
242 static int mpc83xx_suspend_valid(suspend_state_t state)
244 return state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM;
247 static int mpc83xx_suspend_begin(suspend_state_t state)
250 case PM_SUSPEND_STANDBY:
265 static int agent_thread_fn(void *data)
268 wait_event_interruptible(agent_wq, pci_pm_state >= 2);
271 if (signal_pending(current) || pci_pm_state < 2)
274 /* With a preemptible kernel (or SMP), this could race with
275 * a userspace-driven suspend request. It's probably best
276 * to avoid mixing the two with such a configuration (or
277 * else fix it by adding a mutex to state_store that we can
283 pm_suspend(pci_pm_state == 3 ? PM_SUSPEND_MEM :
292 static void mpc83xx_set_agent(void)
294 out_be32(&pmc_regs->config1, PMCCR1_USE_STATE);
295 out_be32(&pmc_regs->mask, PMCER_PMCI);
297 kthread_run(agent_thread_fn, NULL, "PCI power mgt");
300 static int mpc83xx_is_pci_agent(void)
302 struct mpc83xx_rcw __iomem *rcw_regs;
305 rcw_regs = ioremap(get_immrbase() + IMMR_RCW_OFFSET,
306 sizeof(struct mpc83xx_rcw));
311 ret = !(in_be32(&rcw_regs->rcwhr) & RCW_PCI_HOST);
317 static const struct platform_suspend_ops mpc83xx_suspend_ops = {
318 .valid = mpc83xx_suspend_valid,
319 .begin = mpc83xx_suspend_begin,
320 .enter = mpc83xx_suspend_enter,
321 .end = mpc83xx_suspend_end,
324 static const struct of_device_id pmc_match[];
325 static int pmc_probe(struct platform_device *ofdev)
327 const struct of_device_id *match;
328 struct device_node *np = ofdev->dev.of_node;
330 const struct pmc_type *type;
333 match = of_match_device(pmc_match, &ofdev->dev);
339 if (!of_device_is_available(np))
342 has_deep_sleep = type->has_deep_sleep;
343 immrbase = get_immrbase();
346 is_pci_agent = mpc83xx_is_pci_agent();
347 if (is_pci_agent < 0)
350 ret = of_address_to_resource(np, 0, &res);
354 pmc_irq = irq_of_parse_and_map(np, 0);
356 ret = request_irq(pmc_irq, pmc_irq_handler, IRQF_SHARED,
363 pmc_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
370 ret = of_address_to_resource(np, 1, &res);
376 clock_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
383 if (has_deep_sleep) {
384 syscr_regs = ioremap(immrbase + IMMR_SYSCR_OFFSET,
385 sizeof(*syscr_regs));
395 suspend_set_ops(&mpc83xx_suspend_ops);
404 free_irq(pmc_irq, ofdev);
409 static int pmc_remove(struct platform_device *ofdev)
414 static struct pmc_type pmc_types[] = {
423 static const struct of_device_id pmc_match[] = {
425 .compatible = "fsl,mpc8313-pmc",
426 .data = &pmc_types[0],
429 .compatible = "fsl,mpc8349-pmc",
430 .data = &pmc_types[1],
435 static struct platform_driver pmc_driver = {
437 .name = "mpc83xx-pmc",
438 .of_match_table = pmc_match,
444 builtin_platform_driver(pmc_driver);