arch/powerpc/platforms/85xx/mpc85xx_rdb.c

   1 /*
   2  * MPC85xx RDB Board Setup
   3  *
   4  * Copyright 2009,2012-2013 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 #include <linux/stddef.h>
  13 #include <linux/kernel.h>
  14 #include <linux/pci.h>
  15 #include <linux/kdev_t.h>
  16 #include <linux/delay.h>
  17 #include <linux/seq_file.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/of_platform.h>
  20
  21 #include <asm/time.h>
  22 #include <asm/machdep.h>
  23 #include <asm/pci-bridge.h>
  24 #include <mm/mmu_decl.h>
  25 #include <asm/prom.h>
  26 #include <asm/udbg.h>
  27 #include <asm/mpic.h>
  28 #include <asm/qe.h>
  29 #include <asm/qe_ic.h>
  30 #include <asm/fsl_guts.h>
  31
  32 #include <sysdev/fsl_soc.h>
  33 #include <sysdev/fsl_pci.h>
  34 #include "smp.h"
  35
  36 #include "mpc85xx.h"
  37
  38 #undef DEBUG
  39
  40 #ifdef DEBUG
  41 #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
  42 #else
  43 #define DBG(fmt, args...)
  44 #endif
  45
  46
  47 void __init mpc85xx_rdb_pic_init(void)
  48 {
  49         struct mpic *mpic;
  50         unsigned long root = of_get_flat_dt_root();
  51
  52 #ifdef CONFIG_QUICC_ENGINE
  53         struct device_node *np;
  54 #endif
  55
  56         if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
  57                 mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
  58                         MPIC_BIG_ENDIAN |
  59                         MPIC_SINGLE_DEST_CPU,
  60                         0, 256, " OpenPIC  ");
  61         } else {
  62                 mpic = mpic_alloc(NULL, 0,
  63                   MPIC_BIG_ENDIAN |
  64                   MPIC_SINGLE_DEST_CPU,
  65                   0, 256, " OpenPIC  ");
  66         }
  67
  68         BUG_ON(mpic == NULL);
  69         mpic_init(mpic);
  70
  71 #ifdef CONFIG_QUICC_ENGINE
  72         np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
  73         if (np) {
  74                 qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
  75                                 qe_ic_cascade_high_mpic);
  76                 of_node_put(np);
  77
  78         } else
  79                 pr_err("%s: Could not find qe-ic node\n", __func__);
  80 #endif
  81
  82 }
  83
  84 /*
  85  * Setup the architecture
  86  */
  87 static void __init mpc85xx_rdb_setup_arch(void)
  88 {
  89 #ifdef CONFIG_QUICC_ENGINE
  90         struct device_node *np;
  91 #endif
  92
  93         if (ppc_md.progress)
  94                 ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
  95
  96         mpc85xx_smp_init();
  97
  98         fsl_pci_assign_primary();
  99
 100 #ifdef CONFIG_QUICC_ENGINE
 101         mpc85xx_qe_init();
 102 #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
 103         if (machine_is(p1025_rdb)) {
 104
 105                 struct ccsr_guts __iomem *guts;
 106
 107                 np = of_find_node_by_name(NULL, "global-utilities");
 108                 if (np) {
 109                         guts = of_iomap(np, 0);
 110                         if (!guts) {
 111
 112                                 pr_err("mpc85xx-rdb: could not map global utilities register\n");
 113
 114                         } else {
 115                         /* P1025 has pins muxed for QE and other functions. To
 116                         * enable QE UEC mode, we need to set bit QE0 for UCC1
 117                         * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
 118                         * and QE12 for QE MII management singals in PMUXCR
 119                         * register.
 120                         */
 121                                 setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
 122                                                 MPC85xx_PMUXCR_QE(3) |
 123                                                 MPC85xx_PMUXCR_QE(9) |
 124                                                 MPC85xx_PMUXCR_QE(12));
 125                                 iounmap(guts);
 126                         }
 127                         of_node_put(np);
 128                 }
 129
 130         }
 131 #endif
 132 #endif  /* CONFIG_QUICC_ENGINE */
 133
 134         printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
 135 }
 136
 137 machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices);
 138 machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
 139 machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
 140 machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
 141 machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
 142 machine_arch_initcall(p1020_rdb_pd, mpc85xx_common_publish_devices);
 143 machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
 144 machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
 145 machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
 146 machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices);
 147
 148 /*
 149  * Called very early, device-tree isn't unflattened
 150  */
 151 static int __init p2020_rdb_probe(void)
 152 {
 153         unsigned long root = of_get_flat_dt_root();
 154
 155         if (of_flat_dt_is_compatible(root, "fsl,P2020RDB"))
 156                 return 1;
 157         return 0;
 158 }
 159
 160 static int __init p1020_rdb_probe(void)
 161 {
 162         unsigned long root = of_get_flat_dt_root();
 163
 164         if (of_flat_dt_is_compatible(root, "fsl,P1020RDB"))
 165                 return 1;
 166         return 0;
 167 }
 168
 169 static int __init p1020_rdb_pc_probe(void)
 170 {
 171         unsigned long root = of_get_flat_dt_root();
 172
 173         return of_flat_dt_is_compatible(root, "fsl,P1020RDB-PC");
 174 }
 175
 176 static int __init p1020_rdb_pd_probe(void)
 177 {
 178         unsigned long root = of_get_flat_dt_root();
 179
 180         return of_flat_dt_is_compatible(root, "fsl,P1020RDB-PD");
 181 }
 182
 183 static int __init p1021_rdb_pc_probe(void)
 184 {
 185         unsigned long root = of_get_flat_dt_root();
 186
 187         if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC"))
 188                 return 1;
 189         return 0;
 190 }
 191
 192 static int __init p2020_rdb_pc_probe(void)
 193 {
 194         unsigned long root = of_get_flat_dt_root();
 195
 196         if (of_flat_dt_is_compatible(root, "fsl,P2020RDB-PC"))
 197                 return 1;
 198         return 0;
 199 }
 200
 201 static int __init p1025_rdb_probe(void)
 202 {
 203         unsigned long root = of_get_flat_dt_root();
 204
 205         return of_flat_dt_is_compatible(root, "fsl,P1025RDB");
 206 }
 207
 208 static int __init p1020_mbg_pc_probe(void)
 209 {
 210         unsigned long root = of_get_flat_dt_root();
 211
 212         return of_flat_dt_is_compatible(root, "fsl,P1020MBG-PC");
 213 }
 214
 215 static int __init p1020_utm_pc_probe(void)
 216 {
 217         unsigned long root = of_get_flat_dt_root();
 218
 219         return of_flat_dt_is_compatible(root, "fsl,P1020UTM-PC");
 220 }
 221
 222 static int __init p1024_rdb_probe(void)
 223 {
 224         unsigned long root = of_get_flat_dt_root();
 225
 226         return of_flat_dt_is_compatible(root, "fsl,P1024RDB");
 227 }
 228
 229 define_machine(p2020_rdb) {
 230         .name                   = "P2020 RDB",
 231         .probe                  = p2020_rdb_probe,
 232         .setup_arch             = mpc85xx_rdb_setup_arch,
 233         .init_IRQ               = mpc85xx_rdb_pic_init,
 234 #ifdef CONFIG_PCI
 235         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 236 #endif
 237         .get_irq                = mpic_get_irq,
 238         .restart                = fsl_rstcr_restart,
 239         .calibrate_decr         = generic_calibrate_decr,
 240         .progress               = udbg_progress,
 241 };
 242
 243 define_machine(p1020_rdb) {
 244         .name                   = "P1020 RDB",
 245         .probe                  = p1020_rdb_probe,
 246         .setup_arch             = mpc85xx_rdb_setup_arch,
 247         .init_IRQ               = mpc85xx_rdb_pic_init,
 248 #ifdef CONFIG_PCI
 249         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 250 #endif
 251         .get_irq                = mpic_get_irq,
 252         .restart                = fsl_rstcr_restart,
 253         .calibrate_decr         = generic_calibrate_decr,
 254         .progress               = udbg_progress,
 255 };
 256
 257 define_machine(p1021_rdb_pc) {
 258         .name                   = "P1021 RDB-PC",
 259         .probe                  = p1021_rdb_pc_probe,
 260         .setup_arch             = mpc85xx_rdb_setup_arch,
 261         .init_IRQ               = mpc85xx_rdb_pic_init,
 262 #ifdef CONFIG_PCI
 263         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 264 #endif
 265         .get_irq                = mpic_get_irq,
 266         .restart                = fsl_rstcr_restart,
 267         .calibrate_decr         = generic_calibrate_decr,
 268         .progress               = udbg_progress,
 269 };
 270
 271 define_machine(p2020_rdb_pc) {
 272         .name                   = "P2020RDB-PC",
 273         .probe                  = p2020_rdb_pc_probe,
 274         .setup_arch             = mpc85xx_rdb_setup_arch,
 275         .init_IRQ               = mpc85xx_rdb_pic_init,
 276 #ifdef CONFIG_PCI
 277         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 278 #endif
 279         .get_irq                = mpic_get_irq,
 280         .restart                = fsl_rstcr_restart,
 281         .calibrate_decr         = generic_calibrate_decr,
 282         .progress               = udbg_progress,
 283 };
 284
 285 define_machine(p1025_rdb) {
 286         .name                   = "P1025 RDB",
 287         .probe                  = p1025_rdb_probe,
 288         .setup_arch             = mpc85xx_rdb_setup_arch,
 289         .init_IRQ               = mpc85xx_rdb_pic_init,
 290 #ifdef CONFIG_PCI
 291         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 292 #endif
 293         .get_irq                = mpic_get_irq,
 294         .restart                = fsl_rstcr_restart,
 295         .calibrate_decr         = generic_calibrate_decr,
 296         .progress               = udbg_progress,
 297 };
 298
 299 define_machine(p1020_mbg_pc) {
 300         .name                   = "P1020 MBG-PC",
 301         .probe                  = p1020_mbg_pc_probe,
 302         .setup_arch             = mpc85xx_rdb_setup_arch,
 303         .init_IRQ               = mpc85xx_rdb_pic_init,
 304 #ifdef CONFIG_PCI
 305         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 306 #endif
 307         .get_irq                = mpic_get_irq,
 308         .restart                = fsl_rstcr_restart,
 309         .calibrate_decr         = generic_calibrate_decr,
 310         .progress               = udbg_progress,
 311 };
 312
 313 define_machine(p1020_utm_pc) {
 314         .name                   = "P1020 UTM-PC",
 315         .probe                  = p1020_utm_pc_probe,
 316         .setup_arch             = mpc85xx_rdb_setup_arch,
 317         .init_IRQ               = mpc85xx_rdb_pic_init,
 318 #ifdef CONFIG_PCI
 319         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 320 #endif
 321         .get_irq                = mpic_get_irq,
 322         .restart                = fsl_rstcr_restart,
 323         .calibrate_decr         = generic_calibrate_decr,
 324         .progress               = udbg_progress,
 325 };
 326
 327 define_machine(p1020_rdb_pc) {
 328         .name                   = "P1020RDB-PC",
 329         .probe                  = p1020_rdb_pc_probe,
 330         .setup_arch             = mpc85xx_rdb_setup_arch,
 331         .init_IRQ               = mpc85xx_rdb_pic_init,
 332 #ifdef CONFIG_PCI
 333         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 334 #endif
 335         .get_irq                = mpic_get_irq,
 336         .restart                = fsl_rstcr_restart,
 337         .calibrate_decr         = generic_calibrate_decr,
 338         .progress               = udbg_progress,
 339 };
 340
 341 define_machine(p1020_rdb_pd) {
 342         .name                   = "P1020RDB-PD",
 343         .probe                  = p1020_rdb_pd_probe,
 344         .setup_arch             = mpc85xx_rdb_setup_arch,
 345         .init_IRQ               = mpc85xx_rdb_pic_init,
 346 #ifdef CONFIG_PCI
 347         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 348 #endif
 349         .get_irq                = mpic_get_irq,
 350         .restart                = fsl_rstcr_restart,
 351         .calibrate_decr         = generic_calibrate_decr,
 352         .progress               = udbg_progress,
 353 };
 354
 355 define_machine(p1024_rdb) {
 356         .name                   = "P1024 RDB",
 357         .probe                  = p1024_rdb_probe,
 358         .setup_arch             = mpc85xx_rdb_setup_arch,
 359         .init_IRQ               = mpc85xx_rdb_pic_init,
 360 #ifdef CONFIG_PCI
 361         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 362 #endif
 363         .get_irq                = mpic_get_irq,
 364         .restart                = fsl_rstcr_restart,
 365         .calibrate_decr         = generic_calibrate_decr,
 366         .progress               = udbg_progress,
 367 };