1 menu "Platform support"
3 source "arch/powerpc/platforms/powernv/Kconfig"
4 source "arch/powerpc/platforms/pseries/Kconfig"
5 source "arch/powerpc/platforms/chrp/Kconfig"
6 source "arch/powerpc/platforms/512x/Kconfig"
7 source "arch/powerpc/platforms/52xx/Kconfig"
8 source "arch/powerpc/platforms/powermac/Kconfig"
9 source "arch/powerpc/platforms/maple/Kconfig"
10 source "arch/powerpc/platforms/pasemi/Kconfig"
11 source "arch/powerpc/platforms/ps3/Kconfig"
12 source "arch/powerpc/platforms/cell/Kconfig"
13 source "arch/powerpc/platforms/8xx/Kconfig"
14 source "arch/powerpc/platforms/82xx/Kconfig"
15 source "arch/powerpc/platforms/83xx/Kconfig"
16 source "arch/powerpc/platforms/85xx/Kconfig"
17 source "arch/powerpc/platforms/86xx/Kconfig"
18 source "arch/powerpc/platforms/embedded6xx/Kconfig"
19 source "arch/powerpc/platforms/44x/Kconfig"
20 source "arch/powerpc/platforms/40x/Kconfig"
21 source "arch/powerpc/platforms/amigaone/Kconfig"
24 bool "KVM Guest support"
28 This option enables various optimizations for running under the KVM
29 hypervisor. Overhead for the kernel when not running inside KVM should
32 In case of doubt, say Y
35 bool "ePAPR para-virtualization support"
38 Enables ePAPR para-virtualization support for guests.
40 In case of doubt, say Y
44 depends on 6xx || PPC64
46 Support for running natively on the hardware, i.e. without
47 a hypervisor. This option is not user-selectable but should
48 be selected by all platforms that need it.
50 config PPC_OF_BOOT_TRAMPOLINE
51 bool "Support booting from Open Firmware or yaboot"
52 depends on 6xx || PPC64
55 Support from booting from Open Firmware or yaboot using an
56 Open Firmware client interface. This enables the kernel to
57 communicate with open firmware to retrieve system information
58 such as the device tree.
60 In case of doubt, say Y
62 config UDBG_RTAS_CONSOLE
63 bool "RTAS based debug console"
67 config PPC_SMP_MUXED_IPI
70 Select this opton if your platform supports SMP and your
71 interrupt controller provides less than 4 interrupts to each
72 cpu. This will enable the generic code to multiplex the 4
73 messages on to one ipi.
84 bool "MPIC Global Timer"
85 depends on MPIC && FSL_SOC
88 The MPIC global timer is a hardware timer inside the
89 Freescale PIC complying with OpenPIC standard. When the
90 specified interval times out, the hardware timer generates
91 an interrupt. The driver currently is only tested on fsl
92 chip, but it can potentially support other global timers
93 complying with the OpenPIC standard.
95 config FSL_MPIC_TIMER_WAKEUP
96 tristate "Freescale MPIC global timer wakeup driver"
97 depends on FSL_SOC && MPIC_TIMER && PM
100 The driver provides a way to wake up the system by MPIC
102 e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup"
104 config PPC_EPAPR_HV_PIC
107 select EPAPR_PARAVIRT
114 bool "MPIC message register support"
118 Enables support for the MPIC message registers. These
119 registers are used for inter-processor communication.
134 config RTAS_ERROR_LOGGING
139 config PPC_RTAS_DAEMON
145 bool "Proc interface to RTAS"
146 depends on PPC_RTAS && PROC_FS
150 tristate "Firmware flash interface"
151 depends on PPC64 && RTAS_PROC
157 config MPIC_U3_HT_IRQS
161 config MPIC_BROKEN_REGREAD
165 This option enables a MPIC driver workaround for some chips
166 that have a bug that causes some interrupt source information
167 to not read back properly. It is safe to use on other chips as
168 well, but enabling it uses about 8KB of memory to keep copies
169 of the register contents in software.
173 depends on (PPC_POWERNV || PPC_PSERIES) && PCI
188 config PPC_INDIRECT_PIO
192 config PPC_INDIRECT_MMIO
195 config PPC_IO_WORKAROUNDS
198 source "drivers/cpufreq/Kconfig"
200 menu "CPUIdle driver"
202 source "drivers/cpuidle/Kconfig"
206 config PPC601_SYNC_FIX
207 bool "Workarounds for PPC601 bugs"
208 depends on 6xx && PPC_PMAC
210 Some versions of the PPC601 (the first PowerPC chip) have bugs which
211 mean that extra synchronization instructions are required near
212 certain instructions, typically those that make major changes to the
213 CPU state. These extra instructions reduce performance slightly.
214 If you say N here, these extra instructions will not be included,
215 resulting in a kernel which will run faster but may not run at all
216 on some systems with the PPC601 chip.
218 If in doubt, say Y here.
221 bool "On-chip CPU temperature sensor support"
224 G3 and G4 processors have an on-chip temperature sensor called the
225 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
226 temperature within 2-4 degrees Celsius. This option shows the current
227 on-die temperature in /proc/cpuinfo if the cpu supports it.
229 Unfortunately, on some chip revisions, this sensor is very inaccurate
230 and in many cases, does not work at all, so don't assume the cpu
231 temp is actually what /proc/cpuinfo says it is.
234 bool "Interrupt driven TAU driver (DANGEROUS)"
237 The TAU supports an interrupt driven mode which causes an interrupt
238 whenever the temperature goes out of range. This is the fastest way
239 to get notified the temp has exceeded a range. With this option off,
240 a timer is used to re-check the temperature periodically.
242 However, on some cpus it appears that the TAU interrupt hardware
243 is buggy and can cause a situation which would lead unexplained hard
246 Unless you are extending the TAU driver, or enjoy kernel/hardware
247 debugging, leave this option off.
250 bool "Average high and low temp"
253 The TAU hardware can compare the temperature to an upper and lower
254 bound. The default behavior is to show both the upper and lower
255 bound in /proc/cpuinfo. If the range is large, the temperature is
256 either changing a lot, or the TAU hardware is broken (likely on some
257 G4's). If the range is small (around 4 degrees), the temperature is
258 relatively stable. If you say Y here, a single temperature value,
259 halfway between the upper and lower bounds, will be reported in
262 If in doubt, say N here.
265 bool "QE GPIO support"
266 depends on QUICC_ENGINE
269 Say Y here if you're going to use hardware that connects to the
273 bool "Enable support for the CPM2 (Communications Processor Module)"
274 depends on (FSL_SOC_BOOKE && PPC32) || 8260
276 select PPC_PCI_CHOICE
279 The CPM2 (Communications Processor Module) is a coprocessor on
280 embedded CPUs made by Freescale. Selecting this option means that
281 you wish to build a kernel for a machine with a CPM2 coprocessor
282 on it (826x, 827x, 8560).
285 tristate "Axon DDR2 memory device driver"
286 depends on PPC_IBM_CELL_BLADE && BLOCK
289 It registers one block device per Axon's DDR2 memory bank found
290 on a system. Block devices are called axonram?, their major and
291 minor numbers are available in /proc/devices, /proc/partitions or
292 in /sys/block/axonram?/dev.
297 select GENERIC_ISA_DMA
299 Supports for the ULI1575 PCIe south bridge that exists on some
300 Freescale reference boards. The boards all use the ULI in pretty
305 select GENERIC_ALLOCATOR
310 Uses information from the OF or flattened device tree to instantiate
311 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
314 bool "Use the platform RTC operations from user space"
316 select RTC_DRV_GENERIC
318 This option provides backwards compatibility with the old gen_rtc.ko
319 module that was traditionally used for old PowerPC machines.
320 Platforms should migrate to enabling the RTC_DRV_GENERIC by hand
321 replacing their get_rtc_time/set_rtc_time callbacks with
322 a proper RTC device driver.
325 bool "Support for simple, memory-mapped GPIO controllers"
329 Say Y here to support simple, memory-mapped GPIO controllers.
330 These are usually BCSRs used to control board's switches, LEDs,
331 chip-selects, Ethernet/USB PHY's power and various other small
332 on-board peripherals.
334 config MCU_MPC8349EMITX
335 bool "MPC8349E-mITX MCU driver"
336 depends on I2C=y && PPC_83xx
339 Say Y here to enable soft power-off functionality on the Freescale
340 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
341 also register MCU GPIOs with the generic GPIO API, so you'll able
342 to use MCU pins as GPIOs.
345 bool "Xilinx PCI host bridge support"
346 depends on PCI && XILINX_VIRTEX