1 menu "Platform support"
3 source "arch/powerpc/platforms/powernv/Kconfig"
4 source "arch/powerpc/platforms/pseries/Kconfig"
5 source "arch/powerpc/platforms/chrp/Kconfig"
6 source "arch/powerpc/platforms/512x/Kconfig"
7 source "arch/powerpc/platforms/52xx/Kconfig"
8 source "arch/powerpc/platforms/powermac/Kconfig"
9 source "arch/powerpc/platforms/maple/Kconfig"
10 source "arch/powerpc/platforms/pasemi/Kconfig"
11 source "arch/powerpc/platforms/ps3/Kconfig"
12 source "arch/powerpc/platforms/cell/Kconfig"
13 source "arch/powerpc/platforms/8xx/Kconfig"
14 source "arch/powerpc/platforms/82xx/Kconfig"
15 source "arch/powerpc/platforms/83xx/Kconfig"
16 source "arch/powerpc/platforms/85xx/Kconfig"
17 source "arch/powerpc/platforms/86xx/Kconfig"
18 source "arch/powerpc/platforms/embedded6xx/Kconfig"
19 source "arch/powerpc/platforms/44x/Kconfig"
20 source "arch/powerpc/platforms/40x/Kconfig"
21 source "arch/powerpc/platforms/amigaone/Kconfig"
22 source "arch/powerpc/platforms/wsp/Kconfig"
25 bool "KVM Guest support"
29 This option enables various optimizations for running under the KVM
30 hypervisor. Overhead for the kernel when not running inside KVM should
33 In case of doubt, say Y
36 bool "ePAPR para-virtualization support"
39 Enables ePAPR para-virtualization support for guests.
41 In case of doubt, say Y
45 depends on 6xx || PPC64
47 Support for running natively on the hardware, i.e. without
48 a hypervisor. This option is not user-selectable but should
49 be selected by all platforms that need it.
51 config PPC_OF_BOOT_TRAMPOLINE
52 bool "Support booting from Open Firmware or yaboot"
53 depends on 6xx || PPC64
56 Support from booting from Open Firmware or yaboot using an
57 Open Firmware client interface. This enables the kernel to
58 communicate with open firmware to retrieve system information
59 such as the device tree.
61 In case of doubt, say Y
63 config UDBG_RTAS_CONSOLE
64 bool "RTAS based debug console"
68 config PPC_SMP_MUXED_IPI
71 Select this opton if your platform supports SMP and your
72 interrupt controller provides less than 4 interrupts to each
73 cpu. This will enable the generic code to multiplex the 4
74 messages on to one ipi.
77 bool "BEAT based debug console"
89 config PPC_EPAPR_HV_PIC
99 bool "MPIC message register support"
103 Enables support for the MPIC message registers. These
104 registers are used for inter-processor communication.
119 config RTAS_ERROR_LOGGING
124 config PPC_RTAS_DAEMON
130 bool "Proc interface to RTAS"
131 depends on PPC_RTAS && PROC_FS
135 tristate "Firmware flash interface"
136 depends on PPC64 && RTAS_PROC
142 config MPIC_U3_HT_IRQS
146 config MPIC_BROKEN_REGREAD
150 This option enables a MPIC driver workaround for some chips
151 that have a bug that causes some interrupt source information
152 to not read back properly. It is safe to use on other chips as
153 well, but enabling it uses about 8KB of memory to keep copies
154 of the register contents in software.
157 depends on PPC_PSERIES
162 depends on PPC_PSERIES
163 bool "Support for GX bus based adapters"
165 Bus device driver for GX bus based adapters.
179 config PPC_INDIRECT_IO
183 config PPC_INDIRECT_PIO
185 select PPC_INDIRECT_IO
187 config PPC_INDIRECT_MMIO
189 select PPC_INDIRECT_IO
191 config PPC_IO_WORKAROUNDS
194 source "drivers/cpufreq/Kconfig"
196 menu "CPUIdle driver"
198 source "drivers/cpuidle/Kconfig"
202 config PPC601_SYNC_FIX
203 bool "Workarounds for PPC601 bugs"
204 depends on 6xx && PPC_PMAC
206 Some versions of the PPC601 (the first PowerPC chip) have bugs which
207 mean that extra synchronization instructions are required near
208 certain instructions, typically those that make major changes to the
209 CPU state. These extra instructions reduce performance slightly.
210 If you say N here, these extra instructions will not be included,
211 resulting in a kernel which will run faster but may not run at all
212 on some systems with the PPC601 chip.
214 If in doubt, say Y here.
217 bool "On-chip CPU temperature sensor support"
220 G3 and G4 processors have an on-chip temperature sensor called the
221 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
222 temperature within 2-4 degrees Celsius. This option shows the current
223 on-die temperature in /proc/cpuinfo if the cpu supports it.
225 Unfortunately, on some chip revisions, this sensor is very inaccurate
226 and in many cases, does not work at all, so don't assume the cpu
227 temp is actually what /proc/cpuinfo says it is.
230 bool "Interrupt driven TAU driver (DANGEROUS)"
233 The TAU supports an interrupt driven mode which causes an interrupt
234 whenever the temperature goes out of range. This is the fastest way
235 to get notified the temp has exceeded a range. With this option off,
236 a timer is used to re-check the temperature periodically.
238 However, on some cpus it appears that the TAU interrupt hardware
239 is buggy and can cause a situation which would lead unexplained hard
242 Unless you are extending the TAU driver, or enjoy kernel/hardware
243 debugging, leave this option off.
246 bool "Average high and low temp"
249 The TAU hardware can compare the temperature to an upper and lower
250 bound. The default behavior is to show both the upper and lower
251 bound in /proc/cpuinfo. If the range is large, the temperature is
252 either changing a lot, or the TAU hardware is broken (likely on some
253 G4's). If the range is small (around 4 degrees), the temperature is
254 relatively stable. If you say Y here, a single temperature value,
255 halfway between the upper and lower bounds, will be reported in
258 If in doubt, say N here.
261 bool "Freescale QUICC Engine (QE) Support"
262 depends on FSL_SOC && PPC32
266 The QUICC Engine (QE) is a new generation of communications
267 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
268 Selecting this option means that you wish to build a kernel
269 for a machine with a QE coprocessor.
272 bool "QE GPIO support"
273 depends on QUICC_ENGINE
274 select ARCH_REQUIRE_GPIOLIB
276 Say Y here if you're going to use hardware that connects to the
280 bool "Enable support for the CPM2 (Communications Processor Module)"
281 depends on (FSL_SOC_BOOKE && PPC32) || 8260
284 select PPC_PCI_CHOICE
285 select ARCH_REQUIRE_GPIOLIB
287 The CPM2 (Communications Processor Module) is a coprocessor on
288 embedded CPUs made by Freescale. Selecting this option means that
289 you wish to build a kernel for a machine with a CPM2 coprocessor
290 on it (826x, 827x, 8560).
293 tristate "Axon DDR2 memory device driver"
294 depends on PPC_IBM_CELL_BLADE && BLOCK
297 It registers one block device per Axon's DDR2 memory bank found
298 on a system. Block devices are called axonram?, their major and
299 minor numbers are available in /proc/devices, /proc/partitions or
300 in /sys/block/axonram?/dev.
305 select GENERIC_ISA_DMA
307 Supports for the ULI1575 PCIe south bridge that exists on some
308 Freescale reference boards. The boards all use the ULI in pretty
317 Uses information from the OF or flattened device tree to instantiate
318 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
321 bool "Support for simple, memory-mapped GPIO controllers"
323 select ARCH_REQUIRE_GPIOLIB
325 Say Y here to support simple, memory-mapped GPIO controllers.
326 These are usually BCSRs used to control board's switches, LEDs,
327 chip-selects, Ethernet/USB PHY's power and various other small
328 on-board peripherals.
330 config MCU_MPC8349EMITX
331 bool "MPC8349E-mITX MCU driver"
332 depends on I2C=y && PPC_83xx
333 select ARCH_REQUIRE_GPIOLIB
335 Say Y here to enable soft power-off functionality on the Freescale
336 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
337 also register MCU GPIOs with the generic GPIO API, so you'll able
338 to use MCU pins as GPIOs.
341 bool "Xilinx PCI host bridge support"
342 depends on PCI && XILINX_VIRTEX