4 select PPC_HAVE_PMU_SUPPORT
6 This option selects whether a 32-bit or a 64-bit kernel
9 menu "Processor support"
11 prompt "Processor Type"
14 There are five families of 32 bit PowerPC chips supported.
15 The most common ones are the desktop and server CPUs (601, 603,
16 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
17 embedded 512x/52xx/82xx/83xx/86xx counterparts.
18 The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
19 (85xx) each form a family of their own that is not compatible
22 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
25 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
46 bool "AMCC 44x, 46x or 47x"
59 prompt "Processor Type"
62 There are two families of 64 bit PowerPC chips supported.
63 The most common ones are the desktop and server CPUs
64 (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)
66 The other are the "embedded" processors compliant with the
67 "Book 3E" variant of the architecture
70 bool "Server processors"
74 bool "Embedded processors"
75 select PPC_FPU # Make it a choice ?
81 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
85 depends on PPC_BOOK3E_64
88 bool "Optimize for POWER4"
89 depends on PPC64 && PPC_BOOK3S
92 Cause the compiler to optimize for POWER4/POWER5/PPC970 processors.
93 The resulting binary will not work on POWER3 or RS64 processors
94 when compiled with binutils 2.15 or later.
98 depends on PPC32 && PPC_BOOK3S
99 select PPC_HAVE_PMU_SUPPORT
103 depends on PPC64 && PPC_BOOK3S
104 default y if !POWER4_ONLY
107 depends on PPC64 && PPC_BOOK3S
112 depends on PPC_BOOK3E_64
115 bool "Optimize for Cell Broadband Engine"
116 depends on PPC64 && PPC_BOOK3S
118 Cause the compiler to optimize for the PPE of the Cell Broadband
119 Engine. This will make the code run considerably faster on Cell
120 but somewhat slower on other machines. This option only changes
121 the scheduling of instructions, not the selection of instructions
122 itself, so the resulting kernel will keep running on all other
123 machines. When building a kernel that is supposed to run only
124 on Cell, you should also select the POWER4_ONLY option.
126 # this is temp to handle compat with arch=ppc
131 select FSL_EMB_PERFMON
132 select PPC_FSL_BOOK3E
136 bool "e500mc Support"
144 config FSL_EMB_PERFMON
145 bool "Freescale Embedded Perfmon"
146 depends on E500 || PPC_83xx
148 This is the Performance Monitor support found on the e500 core
149 and some e300 cores (c3 and c4). Select this only if your
150 core supports the Embedded Performance Monitor APU
152 config FSL_EMB_PERF_EVENT
154 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
157 config FSL_EMB_PERF_EVENT_E500
159 depends on FSL_EMB_PERF_EVENT && E500
164 depends on 40x || 44x
169 depends on E200 || E500 || 44x || PPC_BOOK3E
174 depends on (E200 || E500) && PPC32
177 # this is for common code between PPC32 & PPC64 FSL BOOKE
178 config PPC_FSL_BOOK3E
180 select FSL_EMB_PERFMON
181 default y if FSL_BOOKE
185 depends on 44x || E500 || PPC_86xx
186 default y if PHYS_64BIT
189 bool 'Large physical address support' if E500 || PPC_86xx
190 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
192 This option enables kernel support for larger than 32-bit physical
193 addresses. This feature may not be available on all cores.
195 If you have more than 3.5GB of RAM or so, you also need to enable
196 SWIOTLB under Kernel Options for this to work. The actual number
197 is platform-dependent.
199 If in doubt, say N here.
202 bool "AltiVec Support"
203 depends on 6xx || POWER4
205 This option enables kernel support for the Altivec extensions to the
206 PowerPC processor. The kernel currently supports saving and restoring
207 altivec registers, and turning on the 'altivec enable' bit so user
208 processes can execute altivec instructions.
210 This option is only usefully if you have a processor that supports
211 altivec (G4, otherwise known as 74xx series), but does not have
212 any affect on a non-altivec cpu (it does, however add code to the
215 If in doubt, say Y here.
219 depends on POWER4 && ALTIVEC && PPC_FPU
222 This option enables kernel support for the Vector Scaler extensions
223 to the PowerPC processor. The kernel currently supports saving and
224 restoring VSX registers, and turning on the 'VSX enable' bit so user
225 processes can execute VSX instructions.
227 This option is only useful if you have a processor that supports
228 VSX (P7 and above), but does not have any affect on a non-VSX
229 CPUs (it does, however add code to the kernel).
231 If in doubt, say Y here.
234 bool "Support for PowerPC icswx coprocessor instruction"
239 This option enables kernel support for the PowerPC Initiate
240 Coprocessor Store Word (icswx) coprocessor instruction on POWER7
243 This option is only useful if you have a processor that supports
244 the icswx coprocessor instruction. It does not have any effect
245 on processors without the icswx coprocessor instruction.
247 This option slightly increases kernel memory usage.
249 If in doubt, say N here.
253 depends on E200 || (E500 && !PPC_E500MC)
256 This option enables kernel support for the Signal Processing
257 Extensions (SPE) to the PowerPC processor. The kernel currently
258 supports saving and restoring SPE registers, and turning on the
259 'spe enable' bit so user processes can execute SPE instructions.
261 This option is only useful if you have a processor that supports
262 SPE (e500, otherwise known as 85xx series), but does not have any
263 effect on a non-spe cpu (it does, however add code to the kernel).
265 If in doubt, say Y here.
269 depends on PPC_BOOK3S
271 config PPC_STD_MMU_32
273 depends on PPC_STD_MMU && PPC32
275 config PPC_STD_MMU_64
277 depends on PPC_STD_MMU && PPC64
279 config PPC_MMU_NOHASH
281 depends on !PPC_STD_MMU
283 config PPC_MMU_NOHASH_32
285 depends on PPC_MMU_NOHASH && PPC32
287 config PPC_MMU_NOHASH_64
289 depends on PPC_MMU_NOHASH && PPC64
291 config PPC_BOOK3E_MMU
293 depends on FSL_BOOKE || PPC_BOOK3E
297 default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES)
300 config VIRT_CPU_ACCOUNTING
301 bool "Deterministic task and CPU time accounting"
305 Select this option to enable more accurate task and CPU time
306 accounting. This is done by reading a CPU counter on each
307 kernel entry and exit and on transitions within the kernel
308 between system, softirq and hardirq state, so there is a
309 small performance impact. This also enables accounting of
310 stolen time on logically-partitioned systems running on
311 IBM POWER5-based machines.
313 If in doubt, say Y here.
315 config PPC_HAVE_PMU_SUPPORT
320 depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
322 This enables the powerpc-specific perf_event back-end.
325 depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
326 bool "Symmetric multi-processing support"
328 This enables support for systems with more than one CPU. If you have
329 a system with only one CPU, say N. If you have a system with more
330 than one CPU, say Y. Note that the kernel does not currently
331 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
332 since they have inadequate hardware support for multiprocessor
335 If you say N here, the kernel will run on single and multiprocessor
336 machines, but will use only one CPU of a multiprocessor machine. If
337 you say Y here, the kernel will run on single-processor machines.
338 On a single-processor machine, the kernel will run faster if you say
341 If you don't know what to do here, say N.
344 int "Maximum number of CPUs (2-8192)"
347 default "32" if PPC64
350 config NOT_COHERENT_CACHE
352 depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
356 config CHECK_CACHE_COHERENCY