4 select HAVE_VIRT_CPU_ACCOUNTING
6 This option selects whether a 32-bit or a 64-bit kernel
9 menu "Processor support"
11 prompt "Processor Type"
14 There are five families of 32 bit PowerPC chips supported.
15 The most common ones are the desktop and server CPUs (601, 603,
16 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
17 embedded 512x/52xx/82xx/83xx/86xx counterparts.
18 The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
19 (85xx) each form a family of their own that is not compatible
22 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
25 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
46 bool "AMCC 44x, 46x or 47x"
59 prompt "Processor Type"
62 There are two families of 64 bit PowerPC chips supported.
63 The most common ones are the desktop and server CPUs
64 (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)
66 The other are the "embedded" processors compliant with the
67 "Book 3E" variant of the architecture
70 bool "Server processors"
72 select PPC_HAVE_PMU_SUPPORT
73 select SYS_SUPPORTS_HUGETLBFS
74 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if PPC_64K_PAGES
77 bool "Embedded processors"
78 select PPC_FPU # Make it a choice ?
79 select PPC_SMP_MUXED_IPI
85 prompt "CPU selection"
89 This will create a kernel which is optimised for a particular CPU.
90 The resulting kernel may not run on other CPUs, so use this with care.
92 If unsure, select Generic.
98 bool "Cell Broadband Engine"
99 depends on PPC_BOOK3S_64
103 depends on PPC_BOOK3S_64
107 depends on PPC_BOOK3S_64
111 depends on PPC_BOOK3S_64
115 depends on PPC_BOOK3S_64
118 bool "Freescale e5500"
122 bool "Freescale e6500"
129 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
133 depends on PPC_BOOK3E_64
137 depends on PPC32 && PPC_BOOK3S
138 select PPC_HAVE_PMU_SUPPORT
141 depends on PPC64 && PPC_BOOK3S
145 depends on PPC64 && PPC_BOOK3S
150 depends on PPC_BOOK3E_64
153 bool "Optimize for Cell Broadband Engine"
154 depends on PPC64 && PPC_BOOK3S
156 Cause the compiler to optimize for the PPE of the Cell Broadband
157 Engine. This will make the code run considerably faster on Cell
158 but somewhat slower on other machines. This option only changes
159 the scheduling of instructions, not the selection of instructions
160 itself, so the resulting kernel will keep running on all other
163 # this is temp to handle compat with arch=ppc
168 select FSL_EMB_PERFMON
169 select PPC_FSL_BOOK3E
173 bool "e500mc Support"
178 This must be enabled for running on e500mc (and derivatives
179 such as e5500/e6500), and must be disabled for running on
186 config FSL_EMB_PERFMON
187 bool "Freescale Embedded Perfmon"
188 depends on E500 || PPC_83xx
190 This is the Performance Monitor support found on the e500 core
191 and some e300 cores (c3 and c4). Select this only if your
192 core supports the Embedded Performance Monitor APU
194 config FSL_EMB_PERF_EVENT
196 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
199 config FSL_EMB_PERF_EVENT_E500
201 depends on FSL_EMB_PERF_EVENT && E500
206 depends on 40x || 44x
211 depends on E200 || E500 || 44x || PPC_BOOK3E
216 depends on (E200 || E500) && PPC32
219 # this is for common code between PPC32 & PPC64 FSL BOOKE
220 config PPC_FSL_BOOK3E
222 select FSL_EMB_PERFMON
223 select PPC_SMP_MUXED_IPI
224 select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
226 default y if FSL_BOOKE
230 depends on 44x || E500 || PPC_86xx
231 default y if PHYS_64BIT
234 bool 'Large physical address support' if E500 || PPC_86xx
235 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
237 This option enables kernel support for larger than 32-bit physical
238 addresses. This feature may not be available on all cores.
240 If you have more than 3.5GB of RAM or so, you also need to enable
241 SWIOTLB under Kernel Options for this to work. The actual number
242 is platform-dependent.
244 If in doubt, say N here.
247 bool "AltiVec Support"
248 depends on 6xx || POWER4 || (PPC_E500MC && PPC64)
250 This option enables kernel support for the Altivec extensions to the
251 PowerPC processor. The kernel currently supports saving and restoring
252 altivec registers, and turning on the 'altivec enable' bit so user
253 processes can execute altivec instructions.
255 This option is only usefully if you have a processor that supports
256 altivec (G4, otherwise known as 74xx series), but does not have
257 any affect on a non-altivec cpu (it does, however add code to the
260 If in doubt, say Y here.
264 depends on POWER4 && ALTIVEC && PPC_FPU
267 This option enables kernel support for the Vector Scaler extensions
268 to the PowerPC processor. The kernel currently supports saving and
269 restoring VSX registers, and turning on the 'VSX enable' bit so user
270 processes can execute VSX instructions.
272 This option is only useful if you have a processor that supports
273 VSX (P7 and above), but does not have any affect on a non-VSX
274 CPUs (it does, however add code to the kernel).
276 If in doubt, say Y here.
279 bool "Support for PowerPC icswx coprocessor instruction"
280 depends on POWER4 || PPC_A2
284 This option enables kernel support for the PowerPC Initiate
285 Coprocessor Store Word (icswx) coprocessor instruction on POWER7
288 This option is only useful if you have a processor that supports
289 the icswx coprocessor instruction. It does not have any effect
290 on processors without the icswx coprocessor instruction.
292 This option slightly increases kernel memory usage.
294 If in doubt, say N here.
297 bool "icswx requires direct PID management"
298 depends on PPC_ICSWX && POWER4
301 The PID register in server is used explicitly for ICSWX. In
302 embedded systems PID management is done by the system.
304 config PPC_ICSWX_USE_SIGILL
305 bool "Should a bad CT cause a SIGILL?"
309 Should a bad CT used for "non-record form ICSWX" cause an
310 illegal instruction signal or should it be silent as
313 If in doubt, say N here.
317 depends on E200 || (E500 && !PPC_E500MC)
320 This option enables kernel support for the Signal Processing
321 Extensions (SPE) to the PowerPC processor. The kernel currently
322 supports saving and restoring SPE registers, and turning on the
323 'spe enable' bit so user processes can execute SPE instructions.
325 This option is only useful if you have a processor that supports
326 SPE (e500, otherwise known as 85xx series), but does not have any
327 effect on a non-spe cpu (it does, however add code to the kernel).
329 If in doubt, say Y here.
333 depends on PPC_BOOK3S
335 config PPC_STD_MMU_32
337 depends on PPC_STD_MMU && PPC32
339 config PPC_STD_MMU_64
341 depends on PPC_STD_MMU && PPC64
343 config PPC_MMU_NOHASH
345 depends on !PPC_STD_MMU
347 config PPC_BOOK3E_MMU
349 depends on FSL_BOOKE || PPC_BOOK3E
353 default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES)
356 config PPC_HAVE_PMU_SUPPORT
361 depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
363 This enables the powerpc-specific perf_event back-end.
366 depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
367 bool "Symmetric multi-processing support"
369 This enables support for systems with more than one CPU. If you have
370 a system with only one CPU, say N. If you have a system with more
371 than one CPU, say Y. Note that the kernel does not currently
372 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
373 since they have inadequate hardware support for multiprocessor
376 If you say N here, the kernel will run on single and multiprocessor
377 machines, but will use only one CPU of a multiprocessor machine. If
378 you say Y here, the kernel will run on single-processor machines.
379 On a single-processor machine, the kernel will run faster if you say
382 If you don't know what to do here, say N.
385 int "Maximum number of CPUs (2-8192)"
388 default "32" if PPC64
391 config NOT_COHERENT_CACHE
393 depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
397 config CHECK_CACHE_COHERENCY