arch/powerpc/platforms/iseries/exception.S

   1 /*
   2  *  Low level routines for legacy iSeries support.
   3  *
   4  *  Extracted from head_64.S
   5  *
   6  *  PowerPC version
   7  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   8  *
   9  *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
  10  *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
  11  *  Adapted for Power Macintosh by Paul Mackerras.
  12  *  Low-level exception handlers and MMU support
  13  *  rewritten by Paul Mackerras.
  14  *    Copyright (C) 1996 Paul Mackerras.
  15  *
  16  *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
  17  *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
  18  *
  19  *  This file contains the low-level support and setup for the
  20  *  PowerPC-64 platform, including trap and interrupt dispatch.
  21  *
  22  *  This program is free software; you can redistribute it and/or
  23  *  modify it under the terms of the GNU General Public License
  24  *  as published by the Free Software Foundation; either version
  25  *  2 of the License, or (at your option) any later version.
  26  */
  27
  28 #include <asm/reg.h>
  29 #include <asm/ppc_asm.h>
  30 #include <asm/asm-offsets.h>
  31 #include <asm/thread_info.h>
  32 #include <asm/ptrace.h>
  33 #include <asm/exception.h>
  34 #include <asm/cputable.h>
  35
  36         .text
  37
  38         .globl system_reset_iSeries
  39 system_reset_iSeries:
  40         mfspr   r13,SPRN_SPRG3          /* Get paca address */
  41         mfmsr   r24
  42         ori     r24,r24,MSR_RI
  43         mtmsrd  r24                     /* RI on */
  44         lhz     r24,PACAPACAINDEX(r13)  /* Get processor # */
  45         cmpwi   0,r24,0                 /* Are we processor 0? */
  46         bne     1f
  47         b       .__start_initialization_iSeries /* Start up the first processor */
  48 1:      mfspr   r4,SPRN_CTRLF
  49         li      r5,CTRL_RUNLATCH        /* Turn off the run light */
  50         andc    r4,r4,r5
  51         mtspr   SPRN_CTRLT,r4
  52
  53 1:
  54         HMT_LOW
  55 #ifdef CONFIG_SMP
  56         lbz     r23,PACAPROCSTART(r13)  /* Test if this processor
  57                                          * should start */
  58         sync
  59         LOAD_REG_IMMEDIATE(r3,current_set)
  60         sldi    r28,r24,3               /* get current_set[cpu#] */
  61         ldx     r3,r3,r28
  62         addi    r1,r3,THREAD_SIZE
  63         subi    r1,r1,STACK_FRAME_OVERHEAD
  64
  65         cmpwi   0,r23,0
  66         beq     iSeries_secondary_smp_loop      /* Loop until told to go */
  67         b       __secondary_start               /* Loop until told to go */
  68 iSeries_secondary_smp_loop:
  69         /* Let the Hypervisor know we are alive */
  70         /* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
  71         lis     r3,0x8002
  72         rldicr  r3,r3,32,15             /* r0 = (r3 << 32) & 0xffff000000000000 */
  73 #else /* CONFIG_SMP */
  74         /* Yield the processor.  This is required for non-SMP kernels
  75                 which are running on multi-threaded machines. */
  76         lis     r3,0x8000
  77         rldicr  r3,r3,32,15             /* r3 = (r3 << 32) & 0xffff000000000000 */
  78         addi    r3,r3,18                /* r3 = 0x8000000000000012 which is "yield" */
  79         li      r4,0                    /* "yield timed" */
  80         li      r5,-1                   /* "yield forever" */
  81 #endif /* CONFIG_SMP */
  82         li      r0,-1                   /* r0=-1 indicates a Hypervisor call */
  83         sc                              /* Invoke the hypervisor via a system call */
  84         mfspr   r13,SPRN_SPRG3          /* Put r13 back ???? */
  85         b       1b                      /* If SMP not configured, secondaries
  86                                          * loop forever */
  87
  88 /***  ISeries-LPAR interrupt handlers ***/
  89
  90         STD_EXCEPTION_ISERIES(0x200, machine_check, PACA_EXMC)
  91
  92         .globl data_access_iSeries
  93 data_access_iSeries:
  94         mtspr   SPRN_SPRG1,r13
  95 BEGIN_FTR_SECTION
  96         mtspr   SPRN_SPRG2,r12
  97         mfspr   r13,SPRN_DAR
  98         mfspr   r12,SPRN_DSISR
  99         srdi    r13,r13,60
 100         rlwimi  r13,r12,16,0x20
 101         mfcr    r12
 102         cmpwi   r13,0x2c
 103         beq     .do_stab_bolted_iSeries
 104         mtcrf   0x80,r12
 105         mfspr   r12,SPRN_SPRG2
 106 END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
 107         EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN)
 108         EXCEPTION_PROLOG_ISERIES_2
 109         b       data_access_common
 110
 111 .do_stab_bolted_iSeries:
 112         mtcrf   0x80,r12
 113         mfspr   r12,SPRN_SPRG2
 114         EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
 115         EXCEPTION_PROLOG_ISERIES_2
 116         b       .do_stab_bolted
 117
 118         .globl  data_access_slb_iSeries
 119 data_access_slb_iSeries:
 120         mtspr   SPRN_SPRG1,r13          /* save r13 */
 121         mfspr   r13,SPRN_SPRG3          /* get paca address into r13 */
 122         std     r3,PACA_EXSLB+EX_R3(r13)
 123         mfspr   r3,SPRN_DAR
 124         std     r9,PACA_EXSLB+EX_R9(r13)
 125         mfcr    r9
 126 #ifdef __DISABLED__
 127         cmpdi   r3,0
 128         bge     slb_miss_user_iseries
 129 #endif
 130         std     r10,PACA_EXSLB+EX_R10(r13)
 131         std     r11,PACA_EXSLB+EX_R11(r13)
 132         std     r12,PACA_EXSLB+EX_R12(r13)
 133         mfspr   r10,SPRN_SPRG1
 134         std     r10,PACA_EXSLB+EX_R13(r13)
 135         ld      r12,PACALPPACAPTR(r13)
 136         ld      r12,LPPACASRR1(r12)
 137         b       .slb_miss_realmode
 138
 139         STD_EXCEPTION_ISERIES(0x400, instruction_access, PACA_EXGEN)
 140
 141         .globl  instruction_access_slb_iSeries
 142 instruction_access_slb_iSeries:
 143         mtspr   SPRN_SPRG1,r13          /* save r13 */
 144         mfspr   r13,SPRN_SPRG3          /* get paca address into r13 */
 145         std     r3,PACA_EXSLB+EX_R3(r13)
 146         ld      r3,PACALPPACAPTR(r13)
 147         ld      r3,LPPACASRR0(r3)       /* get SRR0 value */
 148         std     r9,PACA_EXSLB+EX_R9(r13)
 149         mfcr    r9
 150 #ifdef __DISABLED__
 151         cmpdi   r3,0
 152         bge     slb_miss_user_iseries
 153 #endif
 154         std     r10,PACA_EXSLB+EX_R10(r13)
 155         std     r11,PACA_EXSLB+EX_R11(r13)
 156         std     r12,PACA_EXSLB+EX_R12(r13)
 157         mfspr   r10,SPRN_SPRG1
 158         std     r10,PACA_EXSLB+EX_R13(r13)
 159         ld      r12,PACALPPACAPTR(r13)
 160         ld      r12,LPPACASRR1(r12)
 161         b       .slb_miss_realmode
 162
 163 #ifdef __DISABLED__
 164 slb_miss_user_iseries:
 165         std     r10,PACA_EXGEN+EX_R10(r13)
 166         std     r11,PACA_EXGEN+EX_R11(r13)
 167         std     r12,PACA_EXGEN+EX_R12(r13)
 168         mfspr   r10,SPRG1
 169         ld      r11,PACA_EXSLB+EX_R9(r13)
 170         ld      r12,PACA_EXSLB+EX_R3(r13)
 171         std     r10,PACA_EXGEN+EX_R13(r13)
 172         std     r11,PACA_EXGEN+EX_R9(r13)
 173         std     r12,PACA_EXGEN+EX_R3(r13)
 174         EXCEPTION_PROLOG_ISERIES_2
 175         b       slb_miss_user_common
 176 #endif
 177
 178         MASKABLE_EXCEPTION_ISERIES(0x500, hardware_interrupt)
 179         STD_EXCEPTION_ISERIES(0x600, alignment, PACA_EXGEN)
 180         STD_EXCEPTION_ISERIES(0x700, program_check, PACA_EXGEN)
 181         STD_EXCEPTION_ISERIES(0x800, fp_unavailable, PACA_EXGEN)
 182         MASKABLE_EXCEPTION_ISERIES(0x900, decrementer)
 183         STD_EXCEPTION_ISERIES(0xa00, trap_0a, PACA_EXGEN)
 184         STD_EXCEPTION_ISERIES(0xb00, trap_0b, PACA_EXGEN)
 185
 186         .globl  system_call_iSeries
 187 system_call_iSeries:
 188         mr      r9,r13
 189         mfspr   r13,SPRN_SPRG3
 190         EXCEPTION_PROLOG_ISERIES_2
 191         b       system_call_common
 192
 193         STD_EXCEPTION_ISERIES( 0xd00, single_step, PACA_EXGEN)
 194         STD_EXCEPTION_ISERIES( 0xe00, trap_0e, PACA_EXGEN)
 195         STD_EXCEPTION_ISERIES( 0xf00, performance_monitor, PACA_EXGEN)
 196
 197 decrementer_iSeries_masked:
 198         /* We may not have a valid TOC pointer in here. */
 199         li      r11,1
 200         ld      r12,PACALPPACAPTR(r13)
 201         stb     r11,LPPACADECRINT(r12)
 202         LOAD_REG_IMMEDIATE(r12, tb_ticks_per_jiffy)
 203         lwz     r12,0(r12)
 204         mtspr   SPRN_DEC,r12
 205         /* fall through */
 206
 207 hardware_interrupt_iSeries_masked:
 208         mtcrf   0x80,r9         /* Restore regs */
 209         ld      r12,PACALPPACAPTR(r13)
 210         ld      r11,LPPACASRR0(r12)
 211         ld      r12,LPPACASRR1(r12)
 212         mtspr   SPRN_SRR0,r11
 213         mtspr   SPRN_SRR1,r12
 214         ld      r9,PACA_EXGEN+EX_R9(r13)
 215         ld      r10,PACA_EXGEN+EX_R10(r13)
 216         ld      r11,PACA_EXGEN+EX_R11(r13)
 217         ld      r12,PACA_EXGEN+EX_R12(r13)
 218         ld      r13,PACA_EXGEN+EX_R13(r13)
 219         rfid
 220         b       .       /* prevent speculative execution */
 221
 222 _INIT_STATIC(__start_initialization_iSeries)
 223         /* Clear out the BSS */
 224         LOAD_REG_IMMEDIATE(r11,__bss_stop)
 225         LOAD_REG_IMMEDIATE(r8,__bss_start)
 226         sub     r11,r11,r8              /* bss size                     */
 227         addi    r11,r11,7               /* round up to an even double word */
 228         rldicl. r11,r11,61,3            /* shift right by 3             */
 229         beq     4f
 230         addi    r8,r8,-8
 231         li      r0,0
 232         mtctr   r11                     /* zero this many doublewords   */
 233 3:      stdu    r0,8(r8)
 234         bdnz    3b
 235 4:
 236         LOAD_REG_IMMEDIATE(r1,init_thread_union)
 237         addi    r1,r1,THREAD_SIZE
 238         li      r0,0
 239         stdu    r0,-STACK_FRAME_OVERHEAD(r1)
 240
 241         LOAD_REG_IMMEDIATE(r2,__toc_start)
 242         addi    r2,r2,0x4000
 243         addi    r2,r2,0x4000
 244
 245         bl      .iSeries_early_setup
 246         bl      .early_setup
 247
 248         /* relocation is on at this point */
 249
 250         b       .start_here_common