arch/powerpc/platforms/iseries/exception.S

   1 /*
   2  *  Low level routines for legacy iSeries support.
   3  *
   4  *  Extracted from head_64.S
   5  *
   6  *  PowerPC version
   7  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   8  *
   9  *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
  10  *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
  11  *  Adapted for Power Macintosh by Paul Mackerras.
  12  *  Low-level exception handlers and MMU support
  13  *  rewritten by Paul Mackerras.
  14  *    Copyright (C) 1996 Paul Mackerras.
  15  *
  16  *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
  17  *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
  18  *
  19  *  This file contains the low-level support and setup for the
  20  *  PowerPC-64 platform, including trap and interrupt dispatch.
  21  *
  22  *  This program is free software; you can redistribute it and/or
  23  *  modify it under the terms of the GNU General Public License
  24  *  as published by the Free Software Foundation; either version
  25  *  2 of the License, or (at your option) any later version.
  26  */
  27
  28 #include <asm/reg.h>
  29 #include <asm/ppc_asm.h>
  30 #include <asm/asm-offsets.h>
  31 #include <asm/thread_info.h>
  32 #include <asm/ptrace.h>
  33 #include <asm/cputable.h>
  34
  35 #include "exception.h"
  36
  37         .text
  38
  39         .globl system_reset_iSeries
  40 system_reset_iSeries:
  41         mfspr   r13,SPRN_SPRG3          /* Get alpaca address */
  42         LOAD_REG_IMMEDIATE(r23, alpaca)
  43         li      r0,ALPACA_SIZE
  44         sub     r23,r13,r23
  45         divdu   r23,r23,r0              /* r23 has cpu number */
  46         LOAD_REG_IMMEDIATE(r13, paca)
  47         mulli   r0,r23,PACA_SIZE
  48         add     r13,r13,r0
  49         mtspr   SPRN_SPRG3,r13          /* Save it away for the future */
  50         mfmsr   r24
  51         ori     r24,r24,MSR_RI
  52         mtmsrd  r24                     /* RI on */
  53         mr      r24,r23
  54         cmpwi   0,r24,0                 /* Are we processor 0? */
  55         bne     1f
  56         b       .__start_initialization_iSeries /* Start up the first processor */
  57 1:      mfspr   r4,SPRN_CTRLF
  58         li      r5,CTRL_RUNLATCH        /* Turn off the run light */
  59         andc    r4,r4,r5
  60         mtspr   SPRN_CTRLT,r4
  61
  62 1:
  63         HMT_LOW
  64 #ifdef CONFIG_SMP
  65         lbz     r23,PACAPROCSTART(r13)  /* Test if this processor
  66                                          * should start */
  67         sync
  68         LOAD_REG_IMMEDIATE(r3,current_set)
  69         sldi    r28,r24,3               /* get current_set[cpu#] */
  70         ldx     r3,r3,r28
  71         addi    r1,r3,THREAD_SIZE
  72         subi    r1,r1,STACK_FRAME_OVERHEAD
  73
  74         cmpwi   0,r23,0
  75         beq     iSeries_secondary_smp_loop      /* Loop until told to go */
  76         b       __secondary_start               /* Loop until told to go */
  77 iSeries_secondary_smp_loop:
  78         /* Let the Hypervisor know we are alive */
  79         /* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
  80         lis     r3,0x8002
  81         rldicr  r3,r3,32,15             /* r0 = (r3 << 32) & 0xffff000000000000 */
  82 #else /* CONFIG_SMP */
  83         /* Yield the processor.  This is required for non-SMP kernels
  84                 which are running on multi-threaded machines. */
  85         lis     r3,0x8000
  86         rldicr  r3,r3,32,15             /* r3 = (r3 << 32) & 0xffff000000000000 */
  87         addi    r3,r3,18                /* r3 = 0x8000000000000012 which is "yield" */
  88         li      r4,0                    /* "yield timed" */
  89         li      r5,-1                   /* "yield forever" */
  90 #endif /* CONFIG_SMP */
  91         li      r0,-1                   /* r0=-1 indicates a Hypervisor call */
  92         sc                              /* Invoke the hypervisor via a system call */
  93         mfspr   r13,SPRN_SPRG3          /* Put r13 back ???? */
  94         b       1b                      /* If SMP not configured, secondaries
  95                                          * loop forever */
  96
  97 /***  ISeries-LPAR interrupt handlers ***/
  98
  99         STD_EXCEPTION_ISERIES(machine_check, PACA_EXMC)
 100
 101         .globl data_access_iSeries
 102 data_access_iSeries:
 103         mtspr   SPRN_SPRG1,r13
 104 BEGIN_FTR_SECTION
 105         mtspr   SPRN_SPRG2,r12
 106         mfspr   r13,SPRN_DAR
 107         mfspr   r12,SPRN_DSISR
 108         srdi    r13,r13,60
 109         rlwimi  r13,r12,16,0x20
 110         mfcr    r12
 111         cmpwi   r13,0x2c
 112         beq     .do_stab_bolted_iSeries
 113         mtcrf   0x80,r12
 114         mfspr   r12,SPRN_SPRG2
 115 END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
 116         EXCEPTION_PROLOG_1(PACA_EXGEN)
 117         EXCEPTION_PROLOG_ISERIES_1
 118         b       data_access_common
 119
 120 .do_stab_bolted_iSeries:
 121         mtcrf   0x80,r12
 122         mfspr   r12,SPRN_SPRG2
 123         EXCEPTION_PROLOG_1(PACA_EXSLB)
 124         EXCEPTION_PROLOG_ISERIES_1
 125         b       .do_stab_bolted
 126
 127         .globl  data_access_slb_iSeries
 128 data_access_slb_iSeries:
 129         mtspr   SPRN_SPRG1,r13          /* save r13 */
 130         mfspr   r13,SPRN_SPRG3          /* get paca address into r13 */
 131         std     r3,PACA_EXSLB+EX_R3(r13)
 132         mfspr   r3,SPRN_DAR
 133         std     r9,PACA_EXSLB+EX_R9(r13)
 134         mfcr    r9
 135 #ifdef __DISABLED__
 136         cmpdi   r3,0
 137         bge     slb_miss_user_iseries
 138 #endif
 139         std     r10,PACA_EXSLB+EX_R10(r13)
 140         std     r11,PACA_EXSLB+EX_R11(r13)
 141         std     r12,PACA_EXSLB+EX_R12(r13)
 142         mfspr   r10,SPRN_SPRG1
 143         std     r10,PACA_EXSLB+EX_R13(r13)
 144         ld      r12,PACALPPACAPTR(r13)
 145         ld      r12,LPPACASRR1(r12)
 146         b       .slb_miss_realmode
 147
 148         STD_EXCEPTION_ISERIES(instruction_access, PACA_EXGEN)
 149
 150         .globl  instruction_access_slb_iSeries
 151 instruction_access_slb_iSeries:
 152         mtspr   SPRN_SPRG1,r13          /* save r13 */
 153         mfspr   r13,SPRN_SPRG3          /* get paca address into r13 */
 154         std     r3,PACA_EXSLB+EX_R3(r13)
 155         ld      r3,PACALPPACAPTR(r13)
 156         ld      r3,LPPACASRR0(r3)       /* get SRR0 value */
 157         std     r9,PACA_EXSLB+EX_R9(r13)
 158         mfcr    r9
 159 #ifdef __DISABLED__
 160         cmpdi   r3,0
 161         bge     slb_miss_user_iseries
 162 #endif
 163         std     r10,PACA_EXSLB+EX_R10(r13)
 164         std     r11,PACA_EXSLB+EX_R11(r13)
 165         std     r12,PACA_EXSLB+EX_R12(r13)
 166         mfspr   r10,SPRN_SPRG1
 167         std     r10,PACA_EXSLB+EX_R13(r13)
 168         ld      r12,PACALPPACAPTR(r13)
 169         ld      r12,LPPACASRR1(r12)
 170         b       .slb_miss_realmode
 171
 172 #ifdef __DISABLED__
 173 slb_miss_user_iseries:
 174         std     r10,PACA_EXGEN+EX_R10(r13)
 175         std     r11,PACA_EXGEN+EX_R11(r13)
 176         std     r12,PACA_EXGEN+EX_R12(r13)
 177         mfspr   r10,SPRG1
 178         ld      r11,PACA_EXSLB+EX_R9(r13)
 179         ld      r12,PACA_EXSLB+EX_R3(r13)
 180         std     r10,PACA_EXGEN+EX_R13(r13)
 181         std     r11,PACA_EXGEN+EX_R9(r13)
 182         std     r12,PACA_EXGEN+EX_R3(r13)
 183         EXCEPTION_PROLOG_ISERIES_1
 184         b       slb_miss_user_common
 185 #endif
 186
 187         MASKABLE_EXCEPTION_ISERIES(hardware_interrupt)
 188         STD_EXCEPTION_ISERIES(alignment, PACA_EXGEN)
 189         STD_EXCEPTION_ISERIES(program_check, PACA_EXGEN)
 190         STD_EXCEPTION_ISERIES(fp_unavailable, PACA_EXGEN)
 191         MASKABLE_EXCEPTION_ISERIES(decrementer)
 192         STD_EXCEPTION_ISERIES(trap_0a, PACA_EXGEN)
 193         STD_EXCEPTION_ISERIES(trap_0b, PACA_EXGEN)
 194
 195         .globl  system_call_iSeries
 196 system_call_iSeries:
 197         mr      r9,r13
 198         mfspr   r13,SPRN_SPRG3
 199         EXCEPTION_PROLOG_ISERIES_1
 200         b       system_call_common
 201
 202         STD_EXCEPTION_ISERIES(single_step, PACA_EXGEN)
 203         STD_EXCEPTION_ISERIES(trap_0e, PACA_EXGEN)
 204         STD_EXCEPTION_ISERIES(performance_monitor, PACA_EXGEN)
 205
 206 decrementer_iSeries_masked:
 207         /* We may not have a valid TOC pointer in here. */
 208         li      r11,1
 209         ld      r12,PACALPPACAPTR(r13)
 210         stb     r11,LPPACADECRINT(r12)
 211         LOAD_REG_IMMEDIATE(r12, tb_ticks_per_jiffy)
 212         lwz     r12,0(r12)
 213         mtspr   SPRN_DEC,r12
 214         /* fall through */
 215
 216 hardware_interrupt_iSeries_masked:
 217         mtcrf   0x80,r9         /* Restore regs */
 218         ld      r12,PACALPPACAPTR(r13)
 219         ld      r11,LPPACASRR0(r12)
 220         ld      r12,LPPACASRR1(r12)
 221         mtspr   SPRN_SRR0,r11
 222         mtspr   SPRN_SRR1,r12
 223         ld      r9,PACA_EXGEN+EX_R9(r13)
 224         ld      r10,PACA_EXGEN+EX_R10(r13)
 225         ld      r11,PACA_EXGEN+EX_R11(r13)
 226         ld      r12,PACA_EXGEN+EX_R12(r13)
 227         ld      r13,PACA_EXGEN+EX_R13(r13)
 228         rfid
 229         b       .       /* prevent speculative execution */
 230
 231 _INIT_STATIC(__start_initialization_iSeries)
 232         /* Clear out the BSS */
 233         LOAD_REG_IMMEDIATE(r11,__bss_stop)
 234         LOAD_REG_IMMEDIATE(r8,__bss_start)
 235         sub     r11,r11,r8              /* bss size                     */
 236         addi    r11,r11,7               /* round up to an even double word */
 237         rldicl. r11,r11,61,3            /* shift right by 3             */
 238         beq     4f
 239         addi    r8,r8,-8
 240         li      r0,0
 241         mtctr   r11                     /* zero this many doublewords   */
 242 3:      stdu    r0,8(r8)
 243         bdnz    3b
 244 4:
 245         LOAD_REG_IMMEDIATE(r1,init_thread_union)
 246         addi    r1,r1,THREAD_SIZE
 247         li      r0,0
 248         stdu    r0,-STACK_FRAME_OVERHEAD(r1)
 249
 250         LOAD_REG_IMMEDIATE(r2,__toc_start)
 251         addi    r2,r2,0x4000
 252         addi    r2,r2,0x4000
 253
 254         bl      .iSeries_early_setup
 255         bl      .early_setup
 256
 257         /* relocation is on at this point */
 258
 259         b       .start_here_common