2 * Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
3 * Ben. Herrenschmidt (benh@kernel.crashing.org)
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
12 * - Replace mdelay with some schedule loop if possible
13 * - Shorten some obfuscated delays on some routines (like modem
15 * - Refcount some clocks (see darwin)
16 * - Split split split...
19 #include <linux/types.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/kernel.h>
23 #include <linux/sched.h>
24 #include <linux/spinlock.h>
25 #include <linux/adb.h>
26 #include <linux/pmu.h>
27 #include <linux/ioport.h>
28 #include <linux/pci.h>
29 #include <asm/sections.h>
30 #include <asm/errno.h>
31 #include <asm/ohare.h>
32 #include <asm/heathrow.h>
33 #include <asm/keylargo.h>
34 #include <asm/uninorth.h>
37 #include <asm/machdep.h>
38 #include <asm/pmac_feature.h>
39 #include <asm/dbdma.h>
40 #include <asm/pci-bridge.h>
41 #include <asm/pmac_low_i2c.h>
46 #define DBG(fmt...) printk(KERN_DEBUG fmt)
52 extern int powersave_lowspeed;
55 extern int powersave_nap;
56 extern struct device_node *k2_skiplist[2];
59 * We use a single global lock to protect accesses. Each driver has
60 * to take care of its own locking
62 DEFINE_RAW_SPINLOCK(feature_lock);
64 #define LOCK(flags) raw_spin_lock_irqsave(&feature_lock, flags);
65 #define UNLOCK(flags) raw_spin_unlock_irqrestore(&feature_lock, flags);
69 * Instance of some macio stuffs
71 struct macio_chip macio_chips[MAX_MACIO_CHIPS];
73 struct macio_chip *macio_find(struct device_node *child, int type)
78 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
79 if (child == macio_chips[i].of_node &&
80 (!type || macio_chips[i].type == type))
81 return &macio_chips[i];
82 child = child->parent;
86 EXPORT_SYMBOL_GPL(macio_find);
88 static const char *macio_names[] =
105 struct device_node *uninorth_node;
106 u32 __iomem *uninorth_base;
108 static u32 uninorth_rev;
109 static int uninorth_maj;
110 static void __iomem *u3_ht_base;
113 * For each motherboard family, we have a table of functions pointers
114 * that handle the various features.
117 typedef long (*feature_call)(struct device_node *node, long param, long value);
119 struct feature_table_entry {
120 unsigned int selector;
121 feature_call function;
126 const char* model_string;
127 const char* model_name;
129 struct feature_table_entry* features;
130 unsigned long board_flags;
132 static struct pmac_mb_def pmac_mb;
135 * Here are the chip specific feature functions
138 static inline int simple_feature_tweak(struct device_node *node, int type,
139 int reg, u32 mask, int value)
141 struct macio_chip* macio;
144 macio = macio_find(node, type);
149 MACIO_BIS(reg, mask);
151 MACIO_BIC(reg, mask);
152 (void)MACIO_IN32(reg);
158 #ifndef CONFIG_POWER4
160 static long ohare_htw_scc_enable(struct device_node *node, long param,
163 struct macio_chip* macio;
164 unsigned long chan_mask;
170 macio = macio_find(node, 0);
173 if (!strcmp(node->name, "ch-a"))
174 chan_mask = MACIO_FLAG_SCCA_ON;
175 else if (!strcmp(node->name, "ch-b"))
176 chan_mask = MACIO_FLAG_SCCB_ON;
180 htw = (macio->type == macio_heathrow || macio->type == macio_paddington
181 || macio->type == macio_gatwick);
182 /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */
183 trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
184 pmac_mb.model_id != PMAC_TYPE_YIKES);
186 #ifdef CONFIG_ADB_PMU
187 if ((param & 0xfff) == PMAC_SCC_IRDA)
189 #endif /* CONFIG_ADB_PMU */
191 fcr = MACIO_IN32(OHARE_FCR);
192 /* Check if scc cell need enabling */
193 if (!(fcr & OH_SCC_ENABLE)) {
194 fcr |= OH_SCC_ENABLE;
196 /* Side effect: this will also power up the
197 * modem, but it's too messy to figure out on which
198 * ports this controls the tranceiver and on which
199 * it controls the modem
202 fcr &= ~HRW_SCC_TRANS_EN_N;
203 MACIO_OUT32(OHARE_FCR, fcr);
204 fcr |= (rmask = HRW_RESET_SCC);
205 MACIO_OUT32(OHARE_FCR, fcr);
207 fcr |= (rmask = OH_SCC_RESET);
208 MACIO_OUT32(OHARE_FCR, fcr);
211 (void)MACIO_IN32(OHARE_FCR);
215 MACIO_OUT32(OHARE_FCR, fcr);
217 if (chan_mask & MACIO_FLAG_SCCA_ON)
219 if (chan_mask & MACIO_FLAG_SCCB_ON)
221 MACIO_OUT32(OHARE_FCR, fcr);
222 macio->flags |= chan_mask;
224 if (param & PMAC_SCC_FLAG_XMON)
225 macio->flags |= MACIO_FLAG_SCC_LOCKED;
227 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
230 fcr = MACIO_IN32(OHARE_FCR);
231 if (chan_mask & MACIO_FLAG_SCCA_ON)
233 if (chan_mask & MACIO_FLAG_SCCB_ON)
235 MACIO_OUT32(OHARE_FCR, fcr);
236 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
237 fcr &= ~OH_SCC_ENABLE;
239 fcr |= HRW_SCC_TRANS_EN_N;
240 MACIO_OUT32(OHARE_FCR, fcr);
242 macio->flags &= ~(chan_mask);
245 #ifdef CONFIG_ADB_PMU
246 if ((param & 0xfff) == PMAC_SCC_IRDA)
248 #endif /* CONFIG_ADB_PMU */
253 static long ohare_floppy_enable(struct device_node *node, long param,
256 return simple_feature_tweak(node, macio_ohare,
257 OHARE_FCR, OH_FLOPPY_ENABLE, value);
260 static long ohare_mesh_enable(struct device_node *node, long param, long value)
262 return simple_feature_tweak(node, macio_ohare,
263 OHARE_FCR, OH_MESH_ENABLE, value);
266 static long ohare_ide_enable(struct device_node *node, long param, long value)
270 /* For some reason, setting the bit in set_initial_features()
271 * doesn't stick. I'm still investigating... --BenH.
274 simple_feature_tweak(node, macio_ohare,
275 OHARE_FCR, OH_IOBUS_ENABLE, 1);
276 return simple_feature_tweak(node, macio_ohare,
277 OHARE_FCR, OH_IDE0_ENABLE, value);
279 return simple_feature_tweak(node, macio_ohare,
280 OHARE_FCR, OH_BAY_IDE_ENABLE, value);
286 static long ohare_ide_reset(struct device_node *node, long param, long value)
290 return simple_feature_tweak(node, macio_ohare,
291 OHARE_FCR, OH_IDE0_RESET_N, !value);
293 return simple_feature_tweak(node, macio_ohare,
294 OHARE_FCR, OH_IDE1_RESET_N, !value);
300 static long ohare_sleep_state(struct device_node *node, long param, long value)
302 struct macio_chip* macio = &macio_chips[0];
304 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
307 MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE);
308 } else if (value == 0) {
309 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
315 static long heathrow_modem_enable(struct device_node *node, long param,
318 struct macio_chip* macio;
322 macio = macio_find(node, macio_unknown);
325 gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1;
328 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
330 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
333 if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
334 pmac_mb.model_id != PMAC_TYPE_YIKES) {
337 MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
339 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
341 (void)MACIO_IN32(HEATHROW_FCR);
346 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
347 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
348 UNLOCK(flags); mdelay(250); LOCK(flags);
349 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
350 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
351 UNLOCK(flags); mdelay(250); LOCK(flags);
352 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
353 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
354 UNLOCK(flags); mdelay(250);
359 static long heathrow_floppy_enable(struct device_node *node, long param,
362 return simple_feature_tweak(node, macio_unknown,
364 HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE,
368 static long heathrow_mesh_enable(struct device_node *node, long param,
371 struct macio_chip* macio;
374 macio = macio_find(node, macio_unknown);
378 /* Set clear mesh cell enable */
380 MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE);
382 MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE);
383 (void)MACIO_IN32(HEATHROW_FCR);
385 /* Set/Clear termination power */
387 MACIO_BIC(HEATHROW_MBCR, 0x04000000);
389 MACIO_BIS(HEATHROW_MBCR, 0x04000000);
390 (void)MACIO_IN32(HEATHROW_MBCR);
397 static long heathrow_ide_enable(struct device_node *node, long param,
402 return simple_feature_tweak(node, macio_unknown,
403 HEATHROW_FCR, HRW_IDE0_ENABLE, value);
405 return simple_feature_tweak(node, macio_unknown,
406 HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value);
412 static long heathrow_ide_reset(struct device_node *node, long param,
417 return simple_feature_tweak(node, macio_unknown,
418 HEATHROW_FCR, HRW_IDE0_RESET_N, !value);
420 return simple_feature_tweak(node, macio_unknown,
421 HEATHROW_FCR, HRW_IDE1_RESET_N, !value);
427 static long heathrow_bmac_enable(struct device_node *node, long param,
430 struct macio_chip* macio;
433 macio = macio_find(node, 0);
438 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
439 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET);
441 (void)MACIO_IN32(HEATHROW_FCR);
444 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET);
446 (void)MACIO_IN32(HEATHROW_FCR);
450 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
456 static long heathrow_sound_enable(struct device_node *node, long param,
459 struct macio_chip* macio;
462 /* B&W G3 and Yikes don't support that properly (the
463 * sound appear to never come back after beeing shut down).
465 if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE ||
466 pmac_mb.model_id == PMAC_TYPE_YIKES)
469 macio = macio_find(node, 0);
474 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
475 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
477 (void)MACIO_IN32(HEATHROW_FCR);
480 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
481 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
487 static u32 save_fcr[6];
488 static u32 save_mbcr;
489 static struct dbdma_regs save_dbdma[13];
490 static struct dbdma_regs save_alt_dbdma[13];
492 static void dbdma_save(struct macio_chip *macio, struct dbdma_regs *save)
496 /* Save state & config of DBDMA channels */
497 for (i = 0; i < 13; i++) {
498 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
499 (macio->base + ((0x8000+i*0x100)>>2));
500 save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi);
501 save[i].cmdptr = in_le32(&chan->cmdptr);
502 save[i].intr_sel = in_le32(&chan->intr_sel);
503 save[i].br_sel = in_le32(&chan->br_sel);
504 save[i].wait_sel = in_le32(&chan->wait_sel);
508 static void dbdma_restore(struct macio_chip *macio, struct dbdma_regs *save)
512 /* Save state & config of DBDMA channels */
513 for (i = 0; i < 13; i++) {
514 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
515 (macio->base + ((0x8000+i*0x100)>>2));
516 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
517 while (in_le32(&chan->status) & ACTIVE)
519 out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi);
520 out_le32(&chan->cmdptr, save[i].cmdptr);
521 out_le32(&chan->intr_sel, save[i].intr_sel);
522 out_le32(&chan->br_sel, save[i].br_sel);
523 out_le32(&chan->wait_sel, save[i].wait_sel);
527 static void heathrow_sleep(struct macio_chip *macio, int secondary)
530 dbdma_save(macio, save_alt_dbdma);
531 save_fcr[2] = MACIO_IN32(0x38);
532 save_fcr[3] = MACIO_IN32(0x3c);
534 dbdma_save(macio, save_dbdma);
535 save_fcr[0] = MACIO_IN32(0x38);
536 save_fcr[1] = MACIO_IN32(0x3c);
537 save_mbcr = MACIO_IN32(0x34);
538 /* Make sure sound is shut down */
539 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
540 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
541 /* This seems to be necessary as well or the fan
542 * keeps coming up and battery drains fast */
543 MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE);
544 MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N);
545 /* Make sure eth is down even if module or sleep
546 * won't work properly */
547 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET);
549 /* Make sure modem is shut down */
550 MACIO_OUT8(HRW_GPIO_MODEM_RESET,
551 MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1);
552 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
553 MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE);
555 /* Let things settle */
556 (void)MACIO_IN32(HEATHROW_FCR);
559 static void heathrow_wakeup(struct macio_chip *macio, int secondary)
562 MACIO_OUT32(0x38, save_fcr[2]);
563 (void)MACIO_IN32(0x38);
565 MACIO_OUT32(0x3c, save_fcr[3]);
566 (void)MACIO_IN32(0x38);
568 dbdma_restore(macio, save_alt_dbdma);
570 MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE);
571 (void)MACIO_IN32(0x38);
573 MACIO_OUT32(0x3c, save_fcr[1]);
574 (void)MACIO_IN32(0x38);
576 MACIO_OUT32(0x34, save_mbcr);
577 (void)MACIO_IN32(0x38);
579 dbdma_restore(macio, save_dbdma);
583 static long heathrow_sleep_state(struct device_node *node, long param,
586 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
589 if (macio_chips[1].type == macio_gatwick)
590 heathrow_sleep(&macio_chips[0], 1);
591 heathrow_sleep(&macio_chips[0], 0);
592 } else if (value == 0) {
593 heathrow_wakeup(&macio_chips[0], 0);
594 if (macio_chips[1].type == macio_gatwick)
595 heathrow_wakeup(&macio_chips[0], 1);
600 static long core99_scc_enable(struct device_node *node, long param, long value)
602 struct macio_chip* macio;
604 unsigned long chan_mask;
607 macio = macio_find(node, 0);
610 if (!strcmp(node->name, "ch-a"))
611 chan_mask = MACIO_FLAG_SCCA_ON;
612 else if (!strcmp(node->name, "ch-b"))
613 chan_mask = MACIO_FLAG_SCCB_ON;
618 int need_reset_scc = 0;
619 int need_reset_irda = 0;
622 fcr = MACIO_IN32(KEYLARGO_FCR0);
623 /* Check if scc cell need enabling */
624 if (!(fcr & KL0_SCC_CELL_ENABLE)) {
625 fcr |= KL0_SCC_CELL_ENABLE;
628 if (chan_mask & MACIO_FLAG_SCCA_ON) {
629 fcr |= KL0_SCCA_ENABLE;
630 /* Don't enable line drivers for I2S modem */
631 if ((param & 0xfff) == PMAC_SCC_I2S1)
632 fcr &= ~KL0_SCC_A_INTF_ENABLE;
634 fcr |= KL0_SCC_A_INTF_ENABLE;
636 if (chan_mask & MACIO_FLAG_SCCB_ON) {
637 fcr |= KL0_SCCB_ENABLE;
638 /* Perform irda specific inits */
639 if ((param & 0xfff) == PMAC_SCC_IRDA) {
640 fcr &= ~KL0_SCC_B_INTF_ENABLE;
641 fcr |= KL0_IRDA_ENABLE;
642 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
643 fcr |= KL0_IRDA_SOURCE1_SEL;
644 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
645 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
648 fcr |= KL0_SCC_B_INTF_ENABLE;
650 MACIO_OUT32(KEYLARGO_FCR0, fcr);
651 macio->flags |= chan_mask;
652 if (need_reset_scc) {
653 MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET);
654 (void)MACIO_IN32(KEYLARGO_FCR0);
658 MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET);
660 if (need_reset_irda) {
661 MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET);
662 (void)MACIO_IN32(KEYLARGO_FCR0);
666 MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET);
669 if (param & PMAC_SCC_FLAG_XMON)
670 macio->flags |= MACIO_FLAG_SCC_LOCKED;
672 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
675 fcr = MACIO_IN32(KEYLARGO_FCR0);
676 if (chan_mask & MACIO_FLAG_SCCA_ON)
677 fcr &= ~KL0_SCCA_ENABLE;
678 if (chan_mask & MACIO_FLAG_SCCB_ON) {
679 fcr &= ~KL0_SCCB_ENABLE;
680 /* Perform irda specific clears */
681 if ((param & 0xfff) == PMAC_SCC_IRDA) {
682 fcr &= ~KL0_IRDA_ENABLE;
683 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
684 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
685 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
688 MACIO_OUT32(KEYLARGO_FCR0, fcr);
689 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
690 fcr &= ~KL0_SCC_CELL_ENABLE;
691 MACIO_OUT32(KEYLARGO_FCR0, fcr);
693 macio->flags &= ~(chan_mask);
701 core99_modem_enable(struct device_node *node, long param, long value)
703 struct macio_chip* macio;
707 /* Hack for internal USB modem */
709 if (macio_chips[0].type != macio_keylargo)
711 node = macio_chips[0].of_node;
713 macio = macio_find(node, 0);
716 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
717 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
718 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
722 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
724 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
729 MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
731 (void)MACIO_IN32(KEYLARGO_FCR2);
734 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
739 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
740 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
741 UNLOCK(flags); mdelay(250); LOCK(flags);
742 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
743 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
744 UNLOCK(flags); mdelay(250); LOCK(flags);
745 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
746 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
747 UNLOCK(flags); mdelay(250);
753 pangea_modem_enable(struct device_node *node, long param, long value)
755 struct macio_chip* macio;
759 /* Hack for internal USB modem */
761 if (macio_chips[0].type != macio_pangea &&
762 macio_chips[0].type != macio_intrepid)
764 node = macio_chips[0].of_node;
766 macio = macio_find(node, 0);
769 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
770 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
771 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
775 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
777 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
782 MACIO_OUT8(KL_GPIO_MODEM_POWER,
783 KEYLARGO_GPIO_OUTPUT_ENABLE);
785 (void)MACIO_IN32(KEYLARGO_FCR2);
788 MACIO_OUT8(KL_GPIO_MODEM_POWER,
789 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
794 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
795 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
796 UNLOCK(flags); mdelay(250); LOCK(flags);
797 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
798 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
799 UNLOCK(flags); mdelay(250); LOCK(flags);
800 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
801 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
802 UNLOCK(flags); mdelay(250);
808 core99_ata100_enable(struct device_node *node, long value)
811 struct pci_dev *pdev = NULL;
815 if (uninorth_rev < 0x24)
820 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
822 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
823 (void)UN_IN(UNI_N_CLOCK_CNTL);
828 if (pci_device_from_OF_node(node, &pbus, &pid) == 0)
829 pdev = pci_get_bus_and_slot(pbus, pid);
832 rc = pci_enable_device(pdev);
834 pci_set_master(pdev);
843 core99_ide_enable(struct device_node *node, long param, long value)
845 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
850 return simple_feature_tweak(node, macio_unknown,
851 KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value);
853 return simple_feature_tweak(node, macio_unknown,
854 KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value);
856 return simple_feature_tweak(node, macio_unknown,
857 KEYLARGO_FCR1, KL1_UIDE_ENABLE, value);
859 return core99_ata100_enable(node, value);
866 core99_ide_reset(struct device_node *node, long param, long value)
870 return simple_feature_tweak(node, macio_unknown,
871 KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value);
873 return simple_feature_tweak(node, macio_unknown,
874 KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value);
876 return simple_feature_tweak(node, macio_unknown,
877 KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value);
884 core99_gmac_enable(struct device_node *node, long param, long value)
890 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
892 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
893 (void)UN_IN(UNI_N_CLOCK_CNTL);
901 core99_gmac_phy_reset(struct device_node *node, long param, long value)
904 struct macio_chip *macio;
906 macio = &macio_chips[0];
907 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
908 macio->type != macio_intrepid)
912 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
913 (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
917 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */
918 KEYLARGO_GPIO_OUTOUT_DATA);
926 core99_sound_chip_enable(struct device_node *node, long param, long value)
928 struct macio_chip* macio;
931 macio = macio_find(node, 0);
935 /* Do a better probe code, screamer G4 desktops &
936 * iMacs can do that too, add a recalibrate in
939 if (pmac_mb.model_id == PMAC_TYPE_PISMO ||
940 pmac_mb.model_id == PMAC_TYPE_TITANIUM) {
943 MACIO_OUT8(KL_GPIO_SOUND_POWER,
944 KEYLARGO_GPIO_OUTPUT_ENABLE |
945 KEYLARGO_GPIO_OUTOUT_DATA);
947 MACIO_OUT8(KL_GPIO_SOUND_POWER,
948 KEYLARGO_GPIO_OUTPUT_ENABLE);
949 (void)MACIO_IN8(KL_GPIO_SOUND_POWER);
956 core99_airport_enable(struct device_node *node, long param, long value)
958 struct macio_chip* macio;
962 macio = macio_find(node, 0);
966 /* Hint: we allow passing of macio itself for the sake of the
969 if (node != macio->of_node &&
970 (!node->parent || node->parent != macio->of_node))
972 state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0;
976 /* This code is a reproduction of OF enable-cardslot
977 * and init-wireless methods, slightly hacked until
981 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5);
982 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
986 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4);
987 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
993 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
994 (void)MACIO_IN32(KEYLARGO_FCR2);
996 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0);
997 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb);
999 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28);
1000 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa);
1002 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28);
1003 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd);
1005 MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28);
1006 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd);
1008 MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28);
1009 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe);
1012 MACIO_OUT32(0x1c000, 0);
1014 MACIO_OUT8(0x1a3e0, 0x41);
1015 (void)MACIO_IN8(0x1a3e0);
1018 MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16);
1019 (void)MACIO_IN32(KEYLARGO_FCR2);
1023 macio->flags |= MACIO_FLAG_AIRPORT_ON;
1026 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
1027 (void)MACIO_IN32(KEYLARGO_FCR2);
1028 MACIO_OUT8(KL_GPIO_AIRPORT_0, 0);
1029 MACIO_OUT8(KL_GPIO_AIRPORT_1, 0);
1030 MACIO_OUT8(KL_GPIO_AIRPORT_2, 0);
1031 MACIO_OUT8(KL_GPIO_AIRPORT_3, 0);
1032 MACIO_OUT8(KL_GPIO_AIRPORT_4, 0);
1033 (void)MACIO_IN8(KL_GPIO_AIRPORT_4);
1036 macio->flags &= ~MACIO_FLAG_AIRPORT_ON;
1043 core99_reset_cpu(struct device_node *node, long param, long value)
1045 unsigned int reset_io = 0;
1046 unsigned long flags;
1047 struct macio_chip *macio;
1048 struct device_node *np;
1049 struct device_node *cpus;
1050 const int dflt_reset_lines[] = { KL_GPIO_RESET_CPU0,
1053 KL_GPIO_RESET_CPU3 };
1055 macio = &macio_chips[0];
1056 if (macio->type != macio_keylargo)
1059 cpus = of_find_node_by_path("/cpus");
1062 for (np = cpus->child; np != NULL; np = np->sibling) {
1063 const u32 *num = of_get_property(np, "reg", NULL);
1064 const u32 *rst = of_get_property(np, "soft-reset", NULL);
1065 if (num == NULL || rst == NULL)
1067 if (param == *num) {
1073 if (np == NULL || reset_io == 0)
1074 reset_io = dflt_reset_lines[param];
1077 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1078 (void)MACIO_IN8(reset_io);
1080 MACIO_OUT8(reset_io, 0);
1081 (void)MACIO_IN8(reset_io);
1086 #endif /* CONFIG_SMP */
1089 core99_usb_enable(struct device_node *node, long param, long value)
1091 struct macio_chip *macio;
1092 unsigned long flags;
1097 macio = &macio_chips[0];
1098 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1099 macio->type != macio_intrepid)
1102 prop = of_get_property(node, "AAPL,clock-id", NULL);
1105 if (strncmp(prop, "usb0u048", 8) == 0)
1107 else if (strncmp(prop, "usb1u148", 8) == 0)
1109 else if (strncmp(prop, "usb2u248", 8) == 0)
1114 /* Sorry for the brute-force locking, but this is only used during
1115 * sleep and the timing seem to be critical
1121 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1122 (void)MACIO_IN32(KEYLARGO_FCR0);
1126 MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1127 } else if (number == 2) {
1128 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1130 (void)MACIO_IN32(KEYLARGO_FCR0);
1133 MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1134 } else if (number == 4) {
1135 MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1137 (void)MACIO_IN32(KEYLARGO_FCR1);
1140 MACIO_BIS(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE);
1143 reg = MACIO_IN32(KEYLARGO_FCR4);
1144 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1145 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number));
1146 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1147 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1));
1148 MACIO_OUT32(KEYLARGO_FCR4, reg);
1149 (void)MACIO_IN32(KEYLARGO_FCR4);
1152 reg = MACIO_IN32(KEYLARGO_FCR3);
1153 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1154 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0));
1155 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1156 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1));
1157 MACIO_OUT32(KEYLARGO_FCR3, reg);
1158 (void)MACIO_IN32(KEYLARGO_FCR3);
1161 if (macio->type == macio_intrepid) {
1162 /* wait for clock stopped bits to clear */
1163 u32 test0 = 0, test1 = 0;
1164 u32 status0, status1;
1170 test0 = UNI_N_CLOCK_STOPPED_USB0;
1171 test1 = UNI_N_CLOCK_STOPPED_USB0PCI;
1174 test0 = UNI_N_CLOCK_STOPPED_USB1;
1175 test1 = UNI_N_CLOCK_STOPPED_USB1PCI;
1178 test0 = UNI_N_CLOCK_STOPPED_USB2;
1179 test1 = UNI_N_CLOCK_STOPPED_USB2PCI;
1183 if (--timeout <= 0) {
1184 printk(KERN_ERR "core99_usb_enable: "
1185 "Timeout waiting for clocks\n");
1189 status0 = UN_IN(UNI_N_CLOCK_STOP_STATUS0);
1190 status1 = UN_IN(UNI_N_CLOCK_STOP_STATUS1);
1191 } while ((status0 & test0) | (status1 & test1));
1197 reg = MACIO_IN32(KEYLARGO_FCR4);
1198 reg |= KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1199 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number);
1200 reg |= KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1201 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1);
1202 MACIO_OUT32(KEYLARGO_FCR4, reg);
1203 (void)MACIO_IN32(KEYLARGO_FCR4);
1206 reg = MACIO_IN32(KEYLARGO_FCR3);
1207 reg |= KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1208 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0);
1209 reg |= KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1210 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1);
1211 MACIO_OUT32(KEYLARGO_FCR3, reg);
1212 (void)MACIO_IN32(KEYLARGO_FCR3);
1216 if (macio->type != macio_intrepid)
1217 MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1218 (void)MACIO_IN32(KEYLARGO_FCR0);
1220 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1221 (void)MACIO_IN32(KEYLARGO_FCR0);
1222 } else if (number == 2) {
1223 if (macio->type != macio_intrepid)
1224 MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1225 (void)MACIO_IN32(KEYLARGO_FCR0);
1227 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1228 (void)MACIO_IN32(KEYLARGO_FCR0);
1229 } else if (number == 4) {
1231 MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1232 (void)MACIO_IN32(KEYLARGO_FCR1);
1242 core99_firewire_enable(struct device_node *node, long param, long value)
1244 unsigned long flags;
1245 struct macio_chip *macio;
1247 macio = &macio_chips[0];
1248 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1249 macio->type != macio_intrepid)
1251 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1256 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1257 (void)UN_IN(UNI_N_CLOCK_CNTL);
1259 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1260 (void)UN_IN(UNI_N_CLOCK_CNTL);
1269 core99_firewire_cable_power(struct device_node *node, long param, long value)
1271 unsigned long flags;
1272 struct macio_chip *macio;
1274 /* Trick: we allow NULL node */
1275 if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0)
1277 macio = &macio_chips[0];
1278 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1279 macio->type != macio_intrepid)
1281 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1286 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0);
1287 MACIO_IN8(KL_GPIO_FW_CABLE_POWER);
1290 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4);
1291 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10);
1300 intrepid_aack_delay_enable(struct device_node *node, long param, long value)
1302 unsigned long flags;
1304 if (uninorth_rev < 0xd2)
1309 UN_BIS(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1311 UN_BIC(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1318 #endif /* CONFIG_POWER4 */
1321 core99_read_gpio(struct device_node *node, long param, long value)
1323 struct macio_chip *macio = &macio_chips[0];
1325 return MACIO_IN8(param);
1330 core99_write_gpio(struct device_node *node, long param, long value)
1332 struct macio_chip *macio = &macio_chips[0];
1334 MACIO_OUT8(param, (u8)(value & 0xff));
1338 #ifdef CONFIG_POWER4
1339 static long g5_gmac_enable(struct device_node *node, long param, long value)
1341 struct macio_chip *macio = &macio_chips[0];
1342 unsigned long flags;
1349 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1351 k2_skiplist[0] = NULL;
1353 k2_skiplist[0] = node;
1355 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1364 static long g5_fw_enable(struct device_node *node, long param, long value)
1366 struct macio_chip *macio = &macio_chips[0];
1367 unsigned long flags;
1374 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1376 k2_skiplist[1] = NULL;
1378 k2_skiplist[1] = node;
1380 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1389 static long g5_mpic_enable(struct device_node *node, long param, long value)
1391 unsigned long flags;
1392 struct device_node *parent = of_get_parent(node);
1397 is_u3 = strcmp(parent->name, "u3") == 0 ||
1398 strcmp(parent->name, "u4") == 0;
1399 of_node_put(parent);
1404 UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE);
1410 static long g5_eth_phy_reset(struct device_node *node, long param, long value)
1412 struct macio_chip *macio = &macio_chips[0];
1413 struct device_node *phy;
1417 * We must not reset the combo PHYs, only the BCM5221 found in
1420 phy = of_get_next_child(node, NULL);
1423 need_reset = of_device_is_compatible(phy, "B5221");
1428 /* PHY reset is GPIO 29, not in device-tree unfortunately */
1429 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29,
1430 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
1431 /* Thankfully, this is now always called at a time when we can
1432 * schedule by sungem.
1435 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 0);
1440 static long g5_i2s_enable(struct device_node *node, long param, long value)
1442 /* Very crude implementation for now */
1443 struct macio_chip *macio = &macio_chips[0];
1444 unsigned long flags;
1448 K2_FCR1_I2S0_CELL_ENABLE |
1449 K2_FCR1_I2S0_CLK_ENABLE_BIT | K2_FCR1_I2S0_ENABLE,
1450 KL3_I2S0_CLK18_ENABLE
1452 { KL0_SCC_A_INTF_ENABLE,
1453 K2_FCR1_I2S1_CELL_ENABLE |
1454 K2_FCR1_I2S1_CLK_ENABLE_BIT | K2_FCR1_I2S1_ENABLE,
1455 KL3_I2S1_CLK18_ENABLE
1457 { KL0_SCC_B_INTF_ENABLE,
1458 SH_FCR1_I2S2_CELL_ENABLE |
1459 SH_FCR1_I2S2_CLK_ENABLE_BIT | SH_FCR1_I2S2_ENABLE,
1460 SH_FCR3_I2S2_CLK18_ENABLE
1464 if (macio->type != macio_keylargo2 && macio->type != macio_shasta)
1466 if (strncmp(node->name, "i2s-", 4))
1468 cell = node->name[4] - 'a';
1474 if (macio->type == macio_shasta)
1482 MACIO_BIC(KEYLARGO_FCR0, fcrs[cell][0]);
1483 MACIO_BIS(KEYLARGO_FCR1, fcrs[cell][1]);
1484 MACIO_BIS(KEYLARGO_FCR3, fcrs[cell][2]);
1486 MACIO_BIC(KEYLARGO_FCR3, fcrs[cell][2]);
1487 MACIO_BIC(KEYLARGO_FCR1, fcrs[cell][1]);
1488 MACIO_BIS(KEYLARGO_FCR0, fcrs[cell][0]);
1498 static long g5_reset_cpu(struct device_node *node, long param, long value)
1500 unsigned int reset_io = 0;
1501 unsigned long flags;
1502 struct macio_chip *macio;
1503 struct device_node *np;
1504 struct device_node *cpus;
1506 macio = &macio_chips[0];
1507 if (macio->type != macio_keylargo2 && macio->type != macio_shasta)
1510 cpus = of_find_node_by_path("/cpus");
1513 for (np = cpus->child; np != NULL; np = np->sibling) {
1514 const u32 *num = of_get_property(np, "reg", NULL);
1515 const u32 *rst = of_get_property(np, "soft-reset", NULL);
1516 if (num == NULL || rst == NULL)
1518 if (param == *num) {
1524 if (np == NULL || reset_io == 0)
1528 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1529 (void)MACIO_IN8(reset_io);
1531 MACIO_OUT8(reset_io, 0);
1532 (void)MACIO_IN8(reset_io);
1537 #endif /* CONFIG_SMP */
1540 * This can be called from pmac_smp so isn't static
1542 * This takes the second CPU off the bus on dual CPU machines
1545 void g5_phy_disable_cpu1(void)
1547 if (uninorth_maj == 3)
1548 UN_OUT(U3_API_PHY_CONFIG_1, 0);
1550 #endif /* CONFIG_POWER4 */
1552 #ifndef CONFIG_POWER4
1556 static u32 save_gpio_levels[2];
1557 static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT];
1558 static u8 save_gpio_normal[KEYLARGO_GPIO_CNT];
1559 static u32 save_unin_clock_ctl;
1561 static void keylargo_shutdown(struct macio_chip *macio, int sleep_mode)
1567 MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND);
1568 (void)MACIO_IN32(KEYLARGO_FCR0);
1572 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1573 KL0_SCC_CELL_ENABLE |
1574 KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE |
1575 KL0_IRDA_CLK19_ENABLE);
1577 MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
1578 MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE);
1580 MACIO_BIC(KEYLARGO_FCR1,
1581 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1582 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1583 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1584 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1585 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1586 KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N |
1587 KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N |
1590 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1591 MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE);
1593 temp = MACIO_IN32(KEYLARGO_FCR3);
1594 if (macio->rev >= 2) {
1595 temp |= KL3_SHUTDOWN_PLL2X;
1597 temp |= KL3_SHUTDOWN_PLL_TOTAL;
1600 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1601 KL3_SHUTDOWN_PLLKW35;
1603 temp |= KL3_SHUTDOWN_PLLKW12;
1604 temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
1605 | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1607 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
1608 MACIO_OUT32(KEYLARGO_FCR3, temp);
1610 /* Flush posted writes & wait a bit */
1611 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1614 static void pangea_shutdown(struct macio_chip *macio, int sleep_mode)
1618 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1619 KL0_SCC_CELL_ENABLE |
1620 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);
1622 MACIO_BIC(KEYLARGO_FCR1,
1623 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1624 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1625 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1626 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1627 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1629 if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1630 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1632 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1634 temp = MACIO_IN32(KEYLARGO_FCR3);
1635 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1636 KL3_SHUTDOWN_PLLKW35;
1637 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE
1638 | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE);
1640 temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE);
1641 MACIO_OUT32(KEYLARGO_FCR3, temp);
1643 /* Flush posted writes & wait a bit */
1644 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1647 static void intrepid_shutdown(struct macio_chip *macio, int sleep_mode)
1651 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1652 KL0_SCC_CELL_ENABLE);
1654 MACIO_BIC(KEYLARGO_FCR1,
1655 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1656 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1657 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1659 if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1660 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1662 temp = MACIO_IN32(KEYLARGO_FCR3);
1663 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE |
1664 KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1666 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE);
1667 MACIO_OUT32(KEYLARGO_FCR3, temp);
1669 /* Flush posted writes & wait a bit */
1670 (void)MACIO_IN32(KEYLARGO_FCR0);
1678 struct macio_chip *macio;
1681 macio = &macio_chips[0];
1682 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1683 macio->type != macio_intrepid)
1686 /* We power off the wireless slot in case it was not done
1687 * by the driver. We don't power it on automatically however
1689 if (macio->flags & MACIO_FLAG_AIRPORT_ON)
1690 core99_airport_enable(macio->of_node, 0, 0);
1692 /* We power off the FW cable. Should be done by the driver... */
1693 if (macio->flags & MACIO_FLAG_FW_SUPPORTED) {
1694 core99_firewire_enable(NULL, 0, 0);
1695 core99_firewire_cable_power(NULL, 0, 0);
1698 /* We make sure int. modem is off (in case driver lost it) */
1699 if (macio->type == macio_keylargo)
1700 core99_modem_enable(macio->of_node, 0, 0);
1702 pangea_modem_enable(macio->of_node, 0, 0);
1704 /* We make sure the sound is off as well */
1705 core99_sound_chip_enable(macio->of_node, 0, 0);
1708 * Save various bits of KeyLargo
1711 /* Save the state of the various GPIOs */
1712 save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0);
1713 save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1);
1714 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1715 save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i);
1716 for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1717 save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i);
1720 if (macio->type == macio_keylargo)
1721 save_mbcr = MACIO_IN32(KEYLARGO_MBCR);
1722 save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0);
1723 save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1);
1724 save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2);
1725 save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3);
1726 save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4);
1727 if (macio->type == macio_pangea || macio->type == macio_intrepid)
1728 save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5);
1730 /* Save state & config of DBDMA channels */
1731 dbdma_save(macio, save_dbdma);
1734 * Turn off as much as we can
1736 if (macio->type == macio_pangea)
1737 pangea_shutdown(macio, 1);
1738 else if (macio->type == macio_intrepid)
1739 intrepid_shutdown(macio, 1);
1740 else if (macio->type == macio_keylargo)
1741 keylargo_shutdown(macio, 1);
1744 * Put the host bridge to sleep
1747 save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL);
1748 /* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it
1751 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl &
1752 ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/));
1754 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1755 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP);
1759 * FIXME: A bit of black magic with OpenPIC (don't ask me why)
1761 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1762 MACIO_BIS(0x506e0, 0x00400000);
1763 MACIO_BIS(0x506e0, 0x80000000);
1769 core99_wake_up(void)
1771 struct macio_chip *macio;
1774 macio = &macio_chips[0];
1775 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1776 macio->type != macio_intrepid)
1780 * Wakeup the host bridge
1782 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1784 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1791 if (macio->type == macio_keylargo) {
1792 MACIO_OUT32(KEYLARGO_MBCR, save_mbcr);
1793 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);
1795 MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]);
1796 (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
1797 MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]);
1798 (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);
1799 MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]);
1800 (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10);
1801 MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]);
1802 (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
1803 MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]);
1804 (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10);
1805 if (macio->type == macio_pangea || macio->type == macio_intrepid) {
1806 MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]);
1807 (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10);
1810 dbdma_restore(macio, save_dbdma);
1812 MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]);
1813 MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]);
1814 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1815 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]);
1816 for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1817 MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]);
1819 /* FIXME more black magic with OpenPIC ... */
1820 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1821 MACIO_BIC(0x506e0, 0x00400000);
1822 MACIO_BIC(0x506e0, 0x80000000);
1825 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl);
1831 #endif /* CONFIG_PM */
1834 core99_sleep_state(struct device_node *node, long param, long value)
1836 /* Param == 1 means to enter the "fake sleep" mode that is
1837 * used for CPU speed switch
1841 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1842 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2);
1844 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1846 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1851 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
1856 return core99_sleep();
1857 else if (value == 0)
1858 return core99_wake_up();
1860 #endif /* CONFIG_PM */
1864 #endif /* CONFIG_POWER4 */
1867 generic_dev_can_wake(struct device_node *node, long param, long value)
1869 /* Todo: eventually check we are really dealing with on-board
1873 if (pmac_mb.board_flags & PMAC_MB_MAY_SLEEP)
1874 pmac_mb.board_flags |= PMAC_MB_CAN_SLEEP;
1878 static long generic_get_mb_info(struct device_node *node, long param, long value)
1881 case PMAC_MB_INFO_MODEL:
1882 return pmac_mb.model_id;
1883 case PMAC_MB_INFO_FLAGS:
1884 return pmac_mb.board_flags;
1885 case PMAC_MB_INFO_NAME:
1886 /* hack hack hack... but should work */
1887 *((const char **)value) = pmac_mb.model_name;
1898 /* Used on any machine
1900 static struct feature_table_entry any_features[] = {
1901 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
1902 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake },
1906 #ifndef CONFIG_POWER4
1908 /* OHare based motherboards. Currently, we only use these on the
1909 * 2400,3400 and 3500 series powerbooks. Some older desktops seem
1910 * to have issues with turning on/off those asic cells
1912 static struct feature_table_entry ohare_features[] = {
1913 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1914 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable },
1915 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable },
1916 { PMAC_FTR_IDE_ENABLE, ohare_ide_enable},
1917 { PMAC_FTR_IDE_RESET, ohare_ide_reset},
1918 { PMAC_FTR_SLEEP_STATE, ohare_sleep_state },
1922 /* Heathrow desktop machines (Beige G3).
1923 * Separated as some features couldn't be properly tested
1924 * and the serial port control bits appear to confuse it.
1926 static struct feature_table_entry heathrow_desktop_features[] = {
1927 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1928 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1929 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1930 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1931 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1935 /* Heathrow based laptop, that is the Wallstreet and mainstreet
1938 static struct feature_table_entry heathrow_laptop_features[] = {
1939 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1940 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1941 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1942 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1943 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1944 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1945 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1946 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable },
1947 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state },
1951 /* Paddington based machines
1952 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
1954 static struct feature_table_entry paddington_features[] = {
1955 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1956 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1957 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1958 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1959 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1960 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1961 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1962 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable },
1963 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state },
1967 /* Core99 & MacRISC 2 machines (all machines released since the
1968 * iBook (included), that is all AGP machines, except pangea
1969 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
1970 * used on iBook2 & iMac "flow power".
1972 static struct feature_table_entry core99_features[] = {
1973 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1974 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable },
1975 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
1976 { PMAC_FTR_IDE_RESET, core99_ide_reset },
1977 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
1978 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
1979 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
1980 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
1981 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
1982 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
1983 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
1985 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
1988 { PMAC_FTR_RESET_CPU, core99_reset_cpu },
1989 #endif /* CONFIG_SMP */
1990 { PMAC_FTR_READ_GPIO, core99_read_gpio },
1991 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
1997 static struct feature_table_entry rackmac_features[] = {
1998 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1999 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2000 { PMAC_FTR_IDE_RESET, core99_ide_reset },
2001 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
2002 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
2003 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
2004 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
2005 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
2006 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
2008 { PMAC_FTR_RESET_CPU, core99_reset_cpu },
2009 #endif /* CONFIG_SMP */
2010 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2011 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2017 static struct feature_table_entry pangea_features[] = {
2018 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2019 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2020 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2021 { PMAC_FTR_IDE_RESET, core99_ide_reset },
2022 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
2023 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
2024 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
2025 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
2026 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
2027 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
2028 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
2029 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
2030 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2031 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2035 /* Intrepid features
2037 static struct feature_table_entry intrepid_features[] = {
2038 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2039 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2040 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2041 { PMAC_FTR_IDE_RESET, core99_ide_reset },
2042 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
2043 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
2044 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
2045 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
2046 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
2047 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
2048 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
2049 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
2050 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2051 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2052 { PMAC_FTR_AACK_DELAY_ENABLE, intrepid_aack_delay_enable },
2056 #else /* CONFIG_POWER4 */
2060 static struct feature_table_entry g5_features[] = {
2061 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable },
2062 { PMAC_FTR_1394_ENABLE, g5_fw_enable },
2063 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable },
2064 { PMAC_FTR_GMAC_PHY_RESET, g5_eth_phy_reset },
2065 { PMAC_FTR_SOUND_CHIP_ENABLE, g5_i2s_enable },
2067 { PMAC_FTR_RESET_CPU, g5_reset_cpu },
2068 #endif /* CONFIG_SMP */
2069 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2070 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2074 #endif /* CONFIG_POWER4 */
2076 static struct pmac_mb_def pmac_mb_defs[] = {
2077 #ifndef CONFIG_POWER4
2082 { "AAPL,8500", "PowerMac 8500/8600",
2083 PMAC_TYPE_PSURGE, NULL,
2086 { "AAPL,9500", "PowerMac 9500/9600",
2087 PMAC_TYPE_PSURGE, NULL,
2090 { "AAPL,7200", "PowerMac 7200",
2091 PMAC_TYPE_PSURGE, NULL,
2094 { "AAPL,7300", "PowerMac 7200/7300",
2095 PMAC_TYPE_PSURGE, NULL,
2098 { "AAPL,7500", "PowerMac 7500",
2099 PMAC_TYPE_PSURGE, NULL,
2102 { "AAPL,ShinerESB", "Apple Network Server",
2103 PMAC_TYPE_ANS, NULL,
2106 { "AAPL,e407", "Alchemy",
2107 PMAC_TYPE_ALCHEMY, NULL,
2110 { "AAPL,e411", "Gazelle",
2111 PMAC_TYPE_GAZELLE, NULL,
2114 { "AAPL,Gossamer", "PowerMac G3 (Gossamer)",
2115 PMAC_TYPE_GOSSAMER, heathrow_desktop_features,
2118 { "AAPL,PowerMac G3", "PowerMac G3 (Silk)",
2119 PMAC_TYPE_SILK, heathrow_desktop_features,
2122 { "PowerMac1,1", "Blue&White G3",
2123 PMAC_TYPE_YOSEMITE, paddington_features,
2126 { "PowerMac1,2", "PowerMac G4 PCI Graphics",
2127 PMAC_TYPE_YIKES, paddington_features,
2130 { "PowerMac2,1", "iMac FireWire",
2131 PMAC_TYPE_FW_IMAC, core99_features,
2132 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2134 { "PowerMac2,2", "iMac FireWire",
2135 PMAC_TYPE_FW_IMAC, core99_features,
2136 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2138 { "PowerMac3,1", "PowerMac G4 AGP Graphics",
2139 PMAC_TYPE_SAWTOOTH, core99_features,
2142 { "PowerMac3,2", "PowerMac G4 AGP Graphics",
2143 PMAC_TYPE_SAWTOOTH, core99_features,
2144 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2146 { "PowerMac3,3", "PowerMac G4 AGP Graphics",
2147 PMAC_TYPE_SAWTOOTH, core99_features,
2148 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2150 { "PowerMac3,4", "PowerMac G4 Silver",
2151 PMAC_TYPE_QUICKSILVER, core99_features,
2154 { "PowerMac3,5", "PowerMac G4 Silver",
2155 PMAC_TYPE_QUICKSILVER, core99_features,
2158 { "PowerMac3,6", "PowerMac G4 Windtunnel",
2159 PMAC_TYPE_WINDTUNNEL, core99_features,
2162 { "PowerMac4,1", "iMac \"Flower Power\"",
2163 PMAC_TYPE_PANGEA_IMAC, pangea_features,
2166 { "PowerMac4,2", "Flat panel iMac",
2167 PMAC_TYPE_FLAT_PANEL_IMAC, pangea_features,
2170 { "PowerMac4,4", "eMac",
2171 PMAC_TYPE_EMAC, core99_features,
2174 { "PowerMac5,1", "PowerMac G4 Cube",
2175 PMAC_TYPE_CUBE, core99_features,
2176 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2178 { "PowerMac6,1", "Flat panel iMac",
2179 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2182 { "PowerMac6,3", "Flat panel iMac",
2183 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2186 { "PowerMac6,4", "eMac",
2187 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2190 { "PowerMac10,1", "Mac mini",
2191 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2194 { "PowerMac10,2", "Mac mini (Late 2005)",
2195 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2198 { "iMac,1", "iMac (first generation)",
2199 PMAC_TYPE_ORIG_IMAC, paddington_features,
2207 { "RackMac1,1", "XServe",
2208 PMAC_TYPE_RACKMAC, rackmac_features,
2211 { "RackMac1,2", "XServe rev. 2",
2212 PMAC_TYPE_RACKMAC, rackmac_features,
2220 { "AAPL,3400/2400", "PowerBook 3400",
2221 PMAC_TYPE_HOOPER, ohare_features,
2222 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2224 { "AAPL,3500", "PowerBook 3500",
2225 PMAC_TYPE_KANGA, ohare_features,
2226 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2228 { "AAPL,PowerBook1998", "PowerBook Wallstreet",
2229 PMAC_TYPE_WALLSTREET, heathrow_laptop_features,
2230 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2232 { "PowerBook1,1", "PowerBook 101 (Lombard)",
2233 PMAC_TYPE_101_PBOOK, paddington_features,
2234 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2236 { "PowerBook2,1", "iBook (first generation)",
2237 PMAC_TYPE_ORIG_IBOOK, core99_features,
2238 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2240 { "PowerBook2,2", "iBook FireWire",
2241 PMAC_TYPE_FW_IBOOK, core99_features,
2242 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2243 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2245 { "PowerBook3,1", "PowerBook Pismo",
2246 PMAC_TYPE_PISMO, core99_features,
2247 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2248 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2250 { "PowerBook3,2", "PowerBook Titanium",
2251 PMAC_TYPE_TITANIUM, core99_features,
2252 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2254 { "PowerBook3,3", "PowerBook Titanium II",
2255 PMAC_TYPE_TITANIUM2, core99_features,
2256 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2258 { "PowerBook3,4", "PowerBook Titanium III",
2259 PMAC_TYPE_TITANIUM3, core99_features,
2260 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2262 { "PowerBook3,5", "PowerBook Titanium IV",
2263 PMAC_TYPE_TITANIUM4, core99_features,
2264 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2266 { "PowerBook4,1", "iBook 2",
2267 PMAC_TYPE_IBOOK2, pangea_features,
2268 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2270 { "PowerBook4,2", "iBook 2",
2271 PMAC_TYPE_IBOOK2, pangea_features,
2272 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2274 { "PowerBook4,3", "iBook 2 rev. 2",
2275 PMAC_TYPE_IBOOK2, pangea_features,
2276 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2278 { "PowerBook5,1", "PowerBook G4 17\"",
2279 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2280 PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2282 { "PowerBook5,2", "PowerBook G4 15\"",
2283 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2284 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2286 { "PowerBook5,3", "PowerBook G4 17\"",
2287 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2288 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2290 { "PowerBook5,4", "PowerBook G4 15\"",
2291 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2292 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2294 { "PowerBook5,5", "PowerBook G4 17\"",
2295 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2296 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2298 { "PowerBook5,6", "PowerBook G4 15\"",
2299 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2300 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2302 { "PowerBook5,7", "PowerBook G4 17\"",
2303 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2304 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2306 { "PowerBook5,8", "PowerBook G4 15\"",
2307 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2308 PMAC_MB_MAY_SLEEP | PMAC_MB_MOBILE,
2310 { "PowerBook5,9", "PowerBook G4 17\"",
2311 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2312 PMAC_MB_MAY_SLEEP | PMAC_MB_MOBILE,
2314 { "PowerBook6,1", "PowerBook G4 12\"",
2315 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2316 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2318 { "PowerBook6,2", "PowerBook G4",
2319 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2320 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2322 { "PowerBook6,3", "iBook G4",
2323 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2324 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2326 { "PowerBook6,4", "PowerBook G4 12\"",
2327 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2328 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2330 { "PowerBook6,5", "iBook G4",
2331 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2332 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2334 { "PowerBook6,7", "iBook G4",
2335 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2336 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2338 { "PowerBook6,8", "PowerBook G4 12\"",
2339 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2340 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2342 #else /* CONFIG_POWER4 */
2343 { "PowerMac7,2", "PowerMac G5",
2344 PMAC_TYPE_POWERMAC_G5, g5_features,
2348 { "PowerMac7,3", "PowerMac G5",
2349 PMAC_TYPE_POWERMAC_G5, g5_features,
2352 { "PowerMac8,1", "iMac G5",
2353 PMAC_TYPE_IMAC_G5, g5_features,
2356 { "PowerMac9,1", "PowerMac G5",
2357 PMAC_TYPE_POWERMAC_G5_U3L, g5_features,
2360 { "PowerMac11,2", "PowerMac G5 Dual Core",
2361 PMAC_TYPE_POWERMAC_G5_U3L, g5_features,
2364 { "PowerMac12,1", "iMac G5 (iSight)",
2365 PMAC_TYPE_POWERMAC_G5_U3L, g5_features,
2368 { "RackMac3,1", "XServe G5",
2369 PMAC_TYPE_XSERVE_G5, g5_features,
2372 #endif /* CONFIG_PPC64 */
2373 #endif /* CONFIG_POWER4 */
2377 * The toplevel feature_call callback
2379 long pmac_do_feature_call(unsigned int selector, ...)
2381 struct device_node *node;
2384 feature_call func = NULL;
2387 if (pmac_mb.features)
2388 for (i=0; pmac_mb.features[i].function; i++)
2389 if (pmac_mb.features[i].selector == selector) {
2390 func = pmac_mb.features[i].function;
2394 for (i=0; any_features[i].function; i++)
2395 if (any_features[i].selector == selector) {
2396 func = any_features[i].function;
2402 va_start(args, selector);
2403 node = (struct device_node*)va_arg(args, void*);
2404 param = va_arg(args, long);
2405 value = va_arg(args, long);
2408 return func(node, param, value);
2411 static int __init probe_motherboard(void)
2414 struct macio_chip *macio = &macio_chips[0];
2415 const char *model = NULL;
2416 struct device_node *dt;
2419 /* Lookup known motherboard type in device-tree. First try an
2420 * exact match on the "model" property, then try a "compatible"
2421 * match is none is found.
2423 dt = of_find_node_by_name(NULL, "device-tree");
2425 model = of_get_property(dt, "model", NULL);
2426 for(i=0; model && i<ARRAY_SIZE(pmac_mb_defs); i++) {
2427 if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
2428 pmac_mb = pmac_mb_defs[i];
2432 for(i=0; i<ARRAY_SIZE(pmac_mb_defs); i++) {
2433 if (of_machine_is_compatible(pmac_mb_defs[i].model_string)) {
2434 pmac_mb = pmac_mb_defs[i];
2439 /* Fallback to selection depending on mac-io chip type */
2440 switch(macio->type) {
2441 #ifndef CONFIG_POWER4
2442 case macio_grand_central:
2443 pmac_mb.model_id = PMAC_TYPE_PSURGE;
2444 pmac_mb.model_name = "Unknown PowerSurge";
2447 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE;
2448 pmac_mb.model_name = "Unknown OHare-based";
2450 case macio_heathrow:
2451 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW;
2452 pmac_mb.model_name = "Unknown Heathrow-based";
2453 pmac_mb.features = heathrow_desktop_features;
2455 case macio_paddington:
2456 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON;
2457 pmac_mb.model_name = "Unknown Paddington-based";
2458 pmac_mb.features = paddington_features;
2460 case macio_keylargo:
2461 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99;
2462 pmac_mb.model_name = "Unknown Keylargo-based";
2463 pmac_mb.features = core99_features;
2466 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA;
2467 pmac_mb.model_name = "Unknown Pangea-based";
2468 pmac_mb.features = pangea_features;
2470 case macio_intrepid:
2471 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID;
2472 pmac_mb.model_name = "Unknown Intrepid-based";
2473 pmac_mb.features = intrepid_features;
2475 #else /* CONFIG_POWER4 */
2476 case macio_keylargo2:
2477 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2;
2478 pmac_mb.model_name = "Unknown K2-based";
2479 pmac_mb.features = g5_features;
2482 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_SHASTA;
2483 pmac_mb.model_name = "Unknown Shasta-based";
2484 pmac_mb.features = g5_features;
2486 #endif /* CONFIG_POWER4 */
2492 #ifndef CONFIG_POWER4
2493 /* Fixup Hooper vs. Comet */
2494 if (pmac_mb.model_id == PMAC_TYPE_HOOPER) {
2495 u32 __iomem * mach_id_ptr = ioremap(0xf3000034, 4);
2500 /* Here, I used to disable the media-bay on comet. It
2501 * appears this is wrong, the floppy connector is actually
2502 * a kind of media-bay and works with the current driver.
2504 if (__raw_readl(mach_id_ptr) & 0x20000000UL)
2505 pmac_mb.model_id = PMAC_TYPE_COMET;
2506 iounmap(mach_id_ptr);
2509 /* Set default value of powersave_nap on machines that support it.
2510 * It appears that uninorth rev 3 has a problem with it, we don't
2511 * enable it on those. In theory, the flush-on-lock property is
2512 * supposed to be set when not supported, but I'm not very confident
2513 * that all Apple OF revs did it properly, I do it the paranoid way.
2515 while (uninorth_base && uninorth_rev > 3) {
2516 struct device_node *cpus = of_find_node_by_path("/cpus");
2517 struct device_node *np;
2519 if (!cpus || !cpus->child) {
2520 printk(KERN_WARNING "Can't find CPU(s) in device tree !\n");
2525 /* Nap mode not supported on SMP */
2530 /* Nap mode not supported if flush-on-lock property is present */
2531 if (of_get_property(np, "flush-on-lock", NULL)) {
2537 printk(KERN_DEBUG "Processor NAP mode on idle enabled.\n");
2541 /* On CPUs that support it (750FX), lowspeed by default during
2544 powersave_lowspeed = 1;
2546 #else /* CONFIG_POWER4 */
2548 #endif /* CONFIG_POWER4 */
2550 /* Check for "mobile" machine */
2551 if (model && (strncmp(model, "PowerBook", 9) == 0
2552 || strncmp(model, "iBook", 5) == 0))
2553 pmac_mb.board_flags |= PMAC_MB_MOBILE;
2556 printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
2562 /* Initialize the Core99 UniNorth host bridge and memory controller
2564 static void __init probe_uninorth(void)
2567 phys_addr_t address;
2568 unsigned long actrl;
2570 /* Locate core99 Uni-N */
2571 uninorth_node = of_find_node_by_name(NULL, "uni-n");
2575 if (uninorth_node == NULL) {
2576 uninorth_node = of_find_node_by_name(NULL, "u3");
2580 if (uninorth_node == NULL) {
2581 uninorth_node = of_find_node_by_name(NULL, "u4");
2584 if (uninorth_node == NULL) {
2589 addrp = of_get_property(uninorth_node, "reg", NULL);
2592 address = of_translate_address(uninorth_node, addrp);
2595 uninorth_base = ioremap(address, 0x40000);
2596 if (uninorth_base == NULL)
2598 uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
2599 if (uninorth_maj == 3 || uninorth_maj == 4) {
2600 u3_ht_base = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);
2601 if (u3_ht_base == NULL) {
2602 iounmap(uninorth_base);
2607 printk(KERN_INFO "Found %s memory controller & host bridge"
2608 " @ 0x%08x revision: 0x%02x\n", uninorth_maj == 3 ? "U3" :
2609 uninorth_maj == 4 ? "U4" : "UniNorth",
2610 (unsigned int)address, uninorth_rev);
2611 printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
2613 /* Set the arbitrer QAck delay according to what Apple does
2615 if (uninorth_rev < 0x11) {
2616 actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK;
2617 actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 :
2618 UNI_N_ARB_CTRL_QACK_DELAY) <<
2619 UNI_N_ARB_CTRL_QACK_DELAY_SHIFT;
2620 UN_OUT(UNI_N_ARB_CTRL, actrl);
2623 /* Some more magic as done by them in recent MacOS X on UniNorth
2624 * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI
2627 if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) ||
2628 uninorth_rev == 0xc0)
2629 UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff);
2632 static void __init probe_one_macio(const char *name, const char *compat, int type)
2634 struct device_node* node;
2636 volatile u32 __iomem *base;
2637 const u32 *addrp, *revp;
2641 for (node = NULL; (node = of_find_node_by_name(node, name)) != NULL;) {
2644 if (of_device_is_compatible(node, compat))
2649 for(i=0; i<MAX_MACIO_CHIPS; i++) {
2650 if (!macio_chips[i].of_node)
2652 if (macio_chips[i].of_node == node)
2656 if (i >= MAX_MACIO_CHIPS) {
2657 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
2658 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
2661 addrp = of_get_pci_address(node, 0, &size, NULL);
2662 if (addrp == NULL) {
2663 printk(KERN_ERR "pmac_feature: %s: can't find base !\n",
2667 addr = of_translate_address(node, addrp);
2669 printk(KERN_ERR "pmac_feature: %s, can't translate base !\n",
2673 base = ioremap(addr, (unsigned long)size);
2675 printk(KERN_ERR "pmac_feature: %s, can't map mac-io chip !\n",
2679 if (type == macio_keylargo || type == macio_keylargo2) {
2680 const u32 *did = of_get_property(node, "device-id", NULL);
2681 if (*did == 0x00000025)
2682 type = macio_pangea;
2683 if (*did == 0x0000003e)
2684 type = macio_intrepid;
2685 if (*did == 0x0000004f)
2686 type = macio_shasta;
2688 macio_chips[i].of_node = node;
2689 macio_chips[i].type = type;
2690 macio_chips[i].base = base;
2691 macio_chips[i].flags = MACIO_FLAG_SCCA_ON | MACIO_FLAG_SCCB_ON;
2692 macio_chips[i].name = macio_names[type];
2693 revp = of_get_property(node, "revision-id", NULL);
2695 macio_chips[i].rev = *revp;
2696 printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
2697 macio_names[type], macio_chips[i].rev, macio_chips[i].base);
2703 /* Warning, ordering is important */
2704 probe_one_macio("gc", NULL, macio_grand_central);
2705 probe_one_macio("ohare", NULL, macio_ohare);
2706 probe_one_macio("pci106b,7", NULL, macio_ohareII);
2707 probe_one_macio("mac-io", "keylargo", macio_keylargo);
2708 probe_one_macio("mac-io", "paddington", macio_paddington);
2709 probe_one_macio("mac-io", "gatwick", macio_gatwick);
2710 probe_one_macio("mac-io", "heathrow", macio_heathrow);
2711 probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2);
2713 /* Make sure the "main" macio chip appear first */
2714 if (macio_chips[0].type == macio_gatwick
2715 && macio_chips[1].type == macio_heathrow) {
2716 struct macio_chip temp = macio_chips[0];
2717 macio_chips[0] = macio_chips[1];
2718 macio_chips[1] = temp;
2720 if (macio_chips[0].type == macio_ohareII
2721 && macio_chips[1].type == macio_ohare) {
2722 struct macio_chip temp = macio_chips[0];
2723 macio_chips[0] = macio_chips[1];
2724 macio_chips[1] = temp;
2726 macio_chips[0].lbus.index = 0;
2727 macio_chips[1].lbus.index = 1;
2729 return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
2733 initial_serial_shutdown(struct device_node *np)
2736 const struct slot_names_prop {
2741 int port_type = PMAC_SCC_ASYNC;
2744 slots = of_get_property(np, "slot-names", &len);
2745 conn = of_get_property(np, "AAPL,connector", &len);
2746 if (conn && (strcmp(conn, "infrared") == 0))
2747 port_type = PMAC_SCC_IRDA;
2748 else if (of_device_is_compatible(np, "cobalt"))
2750 else if (slots && slots->count > 0) {
2751 if (strcmp(slots->name, "IrDA") == 0)
2752 port_type = PMAC_SCC_IRDA;
2753 else if (strcmp(slots->name, "Modem") == 0)
2757 pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0);
2758 pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0);
2762 set_initial_features(void)
2764 struct device_node *np;
2766 /* That hack appears to be necessary for some StarMax motherboards
2767 * but I'm not too sure it was audited for side-effects on other
2768 * ohare based machines...
2769 * Since I still have difficulties figuring the right way to
2770 * differenciate them all and since that hack was there for a long
2771 * time, I'll keep it around
2773 if (macio_chips[0].type == macio_ohare) {
2774 struct macio_chip *macio = &macio_chips[0];
2775 np = of_find_node_by_name(NULL, "via-pmu");
2777 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2779 MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES);
2781 } else if (macio_chips[1].type == macio_ohare) {
2782 struct macio_chip *macio = &macio_chips[1];
2783 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2786 #ifdef CONFIG_POWER4
2787 if (macio_chips[0].type == macio_keylargo2 ||
2788 macio_chips[0].type == macio_shasta) {
2790 /* On SMP machines running UP, we have the second CPU eating
2791 * bus cycles. We need to take it off the bus. This is done
2792 * from pmac_smp for SMP kernels running on one CPU
2794 np = of_find_node_by_type(NULL, "cpu");
2796 np = of_find_node_by_type(np, "cpu");
2798 g5_phy_disable_cpu1();
2801 #endif /* CONFIG_SMP */
2802 /* Enable GMAC for now for PCI probing. It will be disabled
2803 * later on after PCI probe
2805 np = of_find_node_by_name(NULL, "ethernet");
2807 if (of_device_is_compatible(np, "K2-GMAC"))
2808 g5_gmac_enable(np, 0, 1);
2809 np = of_find_node_by_name(np, "ethernet");
2812 /* Enable FW before PCI probe. Will be disabled later on
2813 * Note: We should have a batter way to check that we are
2814 * dealing with uninorth internal cell and not a PCI cell
2815 * on the external PCI. The code below works though.
2817 np = of_find_node_by_name(NULL, "firewire");
2819 if (of_device_is_compatible(np, "pci106b,5811")) {
2820 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2821 g5_fw_enable(np, 0, 1);
2823 np = of_find_node_by_name(np, "firewire");
2826 #else /* CONFIG_POWER4 */
2828 if (macio_chips[0].type == macio_keylargo ||
2829 macio_chips[0].type == macio_pangea ||
2830 macio_chips[0].type == macio_intrepid) {
2831 /* Enable GMAC for now for PCI probing. It will be disabled
2832 * later on after PCI probe
2834 np = of_find_node_by_name(NULL, "ethernet");
2837 && of_device_is_compatible(np->parent, "uni-north")
2838 && of_device_is_compatible(np, "gmac"))
2839 core99_gmac_enable(np, 0, 1);
2840 np = of_find_node_by_name(np, "ethernet");
2843 /* Enable FW before PCI probe. Will be disabled later on
2844 * Note: We should have a batter way to check that we are
2845 * dealing with uninorth internal cell and not a PCI cell
2846 * on the external PCI. The code below works though.
2848 np = of_find_node_by_name(NULL, "firewire");
2851 && of_device_is_compatible(np->parent, "uni-north")
2852 && (of_device_is_compatible(np, "pci106b,18") ||
2853 of_device_is_compatible(np, "pci106b,30") ||
2854 of_device_is_compatible(np, "pci11c1,5811"))) {
2855 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2856 core99_firewire_enable(np, 0, 1);
2858 np = of_find_node_by_name(np, "firewire");
2861 /* Enable ATA-100 before PCI probe. */
2862 np = of_find_node_by_name(NULL, "ata-6");
2865 && of_device_is_compatible(np->parent, "uni-north")
2866 && of_device_is_compatible(np, "kauai-ata")) {
2867 core99_ata100_enable(np, 1);
2869 np = of_find_node_by_name(np, "ata-6");
2872 /* Switch airport off */
2873 for_each_node_by_name(np, "radio") {
2874 if (np && np->parent == macio_chips[0].of_node) {
2875 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON;
2876 core99_airport_enable(np, 0, 0);
2882 /* On all machines that support sound PM, switch sound off */
2883 if (macio_chips[0].of_node)
2884 pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE,
2885 macio_chips[0].of_node, 0, 0);
2887 /* While on some desktop G3s, we turn it back on */
2888 if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow
2889 && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER ||
2890 pmac_mb.model_id == PMAC_TYPE_SILK)) {
2891 struct macio_chip *macio = &macio_chips[0];
2892 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
2893 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
2896 #endif /* CONFIG_POWER4 */
2898 /* On all machines, switch modem & serial ports off */
2899 for_each_node_by_name(np, "ch-a")
2900 initial_serial_shutdown(np);
2902 for_each_node_by_name(np, "ch-b")
2903 initial_serial_shutdown(np);
2908 pmac_feature_init(void)
2910 /* Detect the UniNorth memory controller */
2913 /* Probe mac-io controllers */
2914 if (probe_macios()) {
2915 printk(KERN_WARNING "No mac-io chip found\n");
2919 /* Probe machine type */
2920 if (probe_motherboard())
2921 printk(KERN_WARNING "Unknown PowerMac !\n");
2923 /* Set some initial features (turn off some chips that will
2924 * be later turned on)
2926 set_initial_features();
2930 static void dump_HT_speeds(char *name, u32 cfg, u32 frq)
2932 int freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 };
2933 int bits[8] = { 8,16,0,32,2,4,0,0 };
2934 int freq = (frq >> 8) & 0xf;
2936 if (freqs[freq] == 0)
2937 printk("%s: Unknown HT link frequency %x\n", name, freq);
2939 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n",
2941 bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
2944 void __init pmac_check_ht_link(void)
2946 u32 ufreq, freq, ucfg, cfg;
2947 struct device_node *pcix_node;
2948 u8 px_bus, px_devfn;
2949 struct pci_controller *px_hose;
2951 (void)in_be32(u3_ht_base + U3_HT_LINK_COMMAND);
2952 ucfg = cfg = in_be32(u3_ht_base + U3_HT_LINK_CONFIG);
2953 ufreq = freq = in_be32(u3_ht_base + U3_HT_LINK_FREQ);
2954 dump_HT_speeds("U3 HyperTransport", cfg, freq);
2956 pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");
2957 if (pcix_node == NULL) {
2958 printk("No PCI-X bridge found\n");
2961 if (pci_device_from_OF_node(pcix_node, &px_bus, &px_devfn) != 0) {
2962 printk("PCI-X bridge found but not matched to pci\n");
2965 px_hose = pci_find_hose_for_OF_device(pcix_node);
2966 if (px_hose == NULL) {
2967 printk("PCI-X bridge found but not matched to host\n");
2970 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg);
2971 early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq);
2972 dump_HT_speeds("PCI-X HT Uplink", cfg, freq);
2973 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg);
2974 early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq);
2975 dump_HT_speeds("PCI-X HT Downlink", cfg, freq);
2980 * Early video resume hook
2983 static void (*pmac_early_vresume_proc)(void *data);
2984 static void *pmac_early_vresume_data;
2986 void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2988 if (!machine_is(powermac))
2991 pmac_early_vresume_proc = proc;
2992 pmac_early_vresume_data = data;
2995 EXPORT_SYMBOL(pmac_set_early_video_resume);
2997 void pmac_call_early_video_resume(void)
2999 if (pmac_early_vresume_proc)
3000 pmac_early_vresume_proc(pmac_early_vresume_data);
3004 * AGP related suspend/resume code
3007 static struct pci_dev *pmac_agp_bridge;
3008 static int (*pmac_agp_suspend)(struct pci_dev *bridge);
3009 static int (*pmac_agp_resume)(struct pci_dev *bridge);
3011 void pmac_register_agp_pm(struct pci_dev *bridge,
3012 int (*suspend)(struct pci_dev *bridge),
3013 int (*resume)(struct pci_dev *bridge))
3015 if (suspend || resume) {
3016 pmac_agp_bridge = bridge;
3017 pmac_agp_suspend = suspend;
3018 pmac_agp_resume = resume;
3021 if (bridge != pmac_agp_bridge)
3023 pmac_agp_suspend = pmac_agp_resume = NULL;
3026 EXPORT_SYMBOL(pmac_register_agp_pm);
3028 void pmac_suspend_agp_for_card(struct pci_dev *dev)
3030 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
3032 if (pmac_agp_bridge->bus != dev->bus)
3034 pmac_agp_suspend(pmac_agp_bridge);
3036 EXPORT_SYMBOL(pmac_suspend_agp_for_card);
3038 void pmac_resume_agp_for_card(struct pci_dev *dev)
3040 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
3042 if (pmac_agp_bridge->bus != dev->bus)
3044 pmac_agp_resume(pmac_agp_bridge);
3046 EXPORT_SYMBOL(pmac_resume_agp_for_card);
3048 int pmac_get_uninorth_variant(void)
3050 return uninorth_maj;