2 * PowerNV LPC bus handling.
4 * Copyright 2013 IBM Corp.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 #include <linux/kernel.h>
14 #include <linux/bug.h>
15 #include <linux/debugfs.h>
17 #include <linux/slab.h>
19 #include <asm/machdep.h>
20 #include <asm/firmware.h>
24 #include <linux/uaccess.h>
25 #include <asm/debug.h>
26 #include <asm/isa-bridge.h>
28 static int opal_lpc_chip_id = -1;
30 static u8 opal_lpc_inb(unsigned long port)
35 if (opal_lpc_chip_id < 0 || port > 0xffff)
37 rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 1);
38 return rc ? 0xff : be32_to_cpu(data);
41 static __le16 __opal_lpc_inw(unsigned long port)
46 if (opal_lpc_chip_id < 0 || port > 0xfffe)
49 return (__le16)opal_lpc_inb(port) << 8 | opal_lpc_inb(port + 1);
50 rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 2);
51 return rc ? 0xffff : be32_to_cpu(data);
53 static u16 opal_lpc_inw(unsigned long port)
55 return le16_to_cpu(__opal_lpc_inw(port));
58 static __le32 __opal_lpc_inl(unsigned long port)
63 if (opal_lpc_chip_id < 0 || port > 0xfffc)
66 return (__le32)opal_lpc_inb(port ) << 24 |
67 (__le32)opal_lpc_inb(port + 1) << 16 |
68 (__le32)opal_lpc_inb(port + 2) << 8 |
69 opal_lpc_inb(port + 3);
70 rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 4);
71 return rc ? 0xffffffff : be32_to_cpu(data);
74 static u32 opal_lpc_inl(unsigned long port)
76 return le32_to_cpu(__opal_lpc_inl(port));
79 static void opal_lpc_outb(u8 val, unsigned long port)
81 if (opal_lpc_chip_id < 0 || port > 0xffff)
83 opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 1);
86 static void __opal_lpc_outw(__le16 val, unsigned long port)
88 if (opal_lpc_chip_id < 0 || port > 0xfffe)
91 opal_lpc_outb(val >> 8, port);
92 opal_lpc_outb(val , port + 1);
95 opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 2);
98 static void opal_lpc_outw(u16 val, unsigned long port)
100 __opal_lpc_outw(cpu_to_le16(val), port);
103 static void __opal_lpc_outl(__le32 val, unsigned long port)
105 if (opal_lpc_chip_id < 0 || port > 0xfffc)
108 opal_lpc_outb(val >> 24, port);
109 opal_lpc_outb(val >> 16, port + 1);
110 opal_lpc_outb(val >> 8, port + 2);
111 opal_lpc_outb(val , port + 3);
114 opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 4);
117 static void opal_lpc_outl(u32 val, unsigned long port)
119 __opal_lpc_outl(cpu_to_le32(val), port);
122 static void opal_lpc_insb(unsigned long p, void *b, unsigned long c)
127 *(ptr++) = opal_lpc_inb(p);
130 static void opal_lpc_insw(unsigned long p, void *b, unsigned long c)
135 *(ptr++) = __opal_lpc_inw(p);
138 static void opal_lpc_insl(unsigned long p, void *b, unsigned long c)
143 *(ptr++) = __opal_lpc_inl(p);
146 static void opal_lpc_outsb(unsigned long p, const void *b, unsigned long c)
151 opal_lpc_outb(*(ptr++), p);
154 static void opal_lpc_outsw(unsigned long p, const void *b, unsigned long c)
156 const __le16 *ptr = b;
159 __opal_lpc_outw(*(ptr++), p);
162 static void opal_lpc_outsl(unsigned long p, const void *b, unsigned long c)
164 const __le32 *ptr = b;
167 __opal_lpc_outl(*(ptr++), p);
170 static const struct ppc_pci_io opal_lpc_io = {
174 .outb = opal_lpc_outb,
175 .outw = opal_lpc_outw,
176 .outl = opal_lpc_outl,
177 .insb = opal_lpc_insb,
178 .insw = opal_lpc_insw,
179 .insl = opal_lpc_insl,
180 .outsb = opal_lpc_outsb,
181 .outsw = opal_lpc_outsw,
182 .outsl = opal_lpc_outsl,
185 #ifdef CONFIG_DEBUG_FS
186 struct lpc_debugfs_entry {
187 enum OpalLPCAddressType lpc_type;
190 static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf,
191 size_t count, loff_t *ppos)
193 struct lpc_debugfs_entry *lpc = filp->private_data;
194 u32 data, pos, len, todo;
197 if (!access_ok(VERIFY_WRITE, ubuf, count))
205 * Select access size based on count and alignment and
206 * access type. IO and MEM only support byte acceses,
210 if (lpc->lpc_type == OPAL_LPC_FW) {
211 if (todo > 3 && (pos & 3) == 0)
213 else if (todo > 1 && (pos & 1) == 0)
216 rc = opal_lpc_read(opal_lpc_chip_id, lpc->lpc_type, pos,
222 * Now there is some trickery with the data returned by OPAL
223 * as it's the desired data right justified in a 32-bit BE
226 * This is a very bad interface and I'm to blame for it :-(
228 * So we can't just apply a 32-bit swap to what comes from OPAL,
229 * because user space expects the *bytes* to be in their proper
230 * respective positions (ie, LPC position).
232 * So what we really want to do here is to shift data right
233 * appropriately on a LE kernel.
235 * IE. If the LPC transaction has bytes B0, B1, B2 and B3 in that
236 * order, we have in memory written to by OPAL at the "data"
239 * Bytes: OPAL "data" LE "data"
240 * 32-bit: B0 B1 B2 B3 B0B1B2B3 B3B2B1B0
241 * 16-bit: B0 B1 0000B0B1 B1B00000
242 * 8-bit: B0 000000B0 B0000000
244 * So a BE kernel will have the leftmost of the above in the MSB
245 * and rightmost in the LSB and can just then "cast" the u32 "data"
246 * down to the appropriate quantity and write it.
248 * However, an LE kernel can't. It doesn't need to swap because a
249 * load from data followed by a store to user are going to preserve
250 * the byte ordering which is the wire byte order which is what the
251 * user wants, but in order to "crop" to the right size, we need to
256 rc = __put_user((u32)data, (u32 __user *)ubuf);
259 #ifdef __LITTLE_ENDIAN__
262 rc = __put_user((u16)data, (u16 __user *)ubuf);
265 #ifdef __LITTLE_ENDIAN__
268 rc = __put_user((u8)data, (u8 __user *)ubuf);
281 static ssize_t lpc_debug_write(struct file *filp, const char __user *ubuf,
282 size_t count, loff_t *ppos)
284 struct lpc_debugfs_entry *lpc = filp->private_data;
285 u32 data, pos, len, todo;
288 if (!access_ok(VERIFY_READ, ubuf, count))
296 * Select access size based on count and alignment and
297 * access type. IO and MEM only support byte acceses,
301 if (lpc->lpc_type == OPAL_LPC_FW) {
302 if (todo > 3 && (pos & 3) == 0)
304 else if (todo > 1 && (pos & 1) == 0)
309 * Similarly to the read case, we have some trickery here but
310 * it's different to handle. We need to pass the value to OPAL in
311 * a register whose layout depends on the access size. We want
312 * to reproduce the memory layout of the user, however we aren't
313 * doing a load from user and a store to another memory location
314 * which would achieve that. Here we pass the value to OPAL via
315 * a register which is expected to contain the "BE" interpretation
316 * of the byte sequence. IE: for a 32-bit access, byte 0 should be
317 * in the MSB. So here we *do* need to byteswap on LE.
319 * User bytes: LE "data" OPAL "data"
320 * 32-bit: B0 B1 B2 B3 B3B2B1B0 B0B1B2B3
321 * 16-bit: B0 B1 0000B1B0 0000B0B1
322 * 8-bit: B0 000000B0 000000B0
326 rc = __get_user(data, (u32 __user *)ubuf);
327 data = cpu_to_be32(data);
330 rc = __get_user(data, (u16 __user *)ubuf);
331 data = cpu_to_be16(data);
334 rc = __get_user(data, (u8 __user *)ubuf);
340 rc = opal_lpc_write(opal_lpc_chip_id, lpc->lpc_type, pos,
352 static const struct file_operations lpc_fops = {
353 .read = lpc_debug_read,
354 .write = lpc_debug_write,
356 .llseek = default_llseek,
359 static int opal_lpc_debugfs_create_type(struct dentry *folder,
361 enum OpalLPCAddressType type)
363 struct lpc_debugfs_entry *entry;
364 entry = kzalloc(sizeof(*entry), GFP_KERNEL);
367 entry->lpc_type = type;
368 debugfs_create_file(fname, 0600, folder, entry, &lpc_fops);
372 static int opal_lpc_init_debugfs(void)
377 if (opal_lpc_chip_id < 0)
380 root = debugfs_create_dir("lpc", powerpc_debugfs_root);
382 rc |= opal_lpc_debugfs_create_type(root, "io", OPAL_LPC_IO);
383 rc |= opal_lpc_debugfs_create_type(root, "mem", OPAL_LPC_MEM);
384 rc |= opal_lpc_debugfs_create_type(root, "fw", OPAL_LPC_FW);
387 machine_device_initcall(powernv, opal_lpc_init_debugfs);
388 #endif /* CONFIG_DEBUG_FS */
390 void opal_lpc_init(void)
392 struct device_node *np;
395 * Look for a Power8 LPC bus tagged as "primary",
396 * we currently support only one though the OPAL APIs
397 * support any number.
399 for_each_compatible_node(np, NULL, "ibm,power8-lpc") {
400 if (!of_device_is_available(np))
402 if (!of_get_property(np, "primary", NULL))
404 opal_lpc_chip_id = of_get_ibm_chip_id(np);
407 if (opal_lpc_chip_id < 0)
410 /* Setup special IO ops */
411 ppc_pci_io = opal_lpc_io;
412 isa_io_special = true;
414 pr_info("OPAL: Power8 LPC bus found, chip ID %d\n", opal_lpc_chip_id);