3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/proc_fs.h>
25 #include <linux/rbtree.h>
26 #include <linux/seq_file.h>
27 #include <linux/spinlock.h>
28 #include <asm/atomic.h>
30 #include <asm/eeh_event.h>
32 #include <asm/machdep.h>
33 #include <asm/ppc-pci.h>
39 * EEH, or "Extended Error Handling" is a PCI bridge technology for
40 * dealing with PCI bus errors that can't be dealt with within the
41 * usual PCI framework, except by check-stopping the CPU. Systems
42 * that are designed for high-availability/reliability cannot afford
43 * to crash due to a "mere" PCI error, thus the need for EEH.
44 * An EEH-capable bridge operates by converting a detected error
45 * into a "slot freeze", taking the PCI adapter off-line, making
46 * the slot behave, from the OS'es point of view, as if the slot
47 * were "empty": all reads return 0xff's and all writes are silently
48 * ignored. EEH slot isolation events can be triggered by parity
49 * errors on the address or data busses (e.g. during posted writes),
50 * which in turn might be caused by low voltage on the bus, dust,
51 * vibration, humidity, radioactivity or plain-old failed hardware.
53 * Note, however, that one of the leading causes of EEH slot
54 * freeze events are buggy device drivers, buggy device microcode,
55 * or buggy device hardware. This is because any attempt by the
56 * device to bus-master data to a memory address that is not
57 * assigned to the device will trigger a slot freeze. (The idea
58 * is to prevent devices-gone-wild from corrupting system memory).
59 * Buggy hardware/drivers will have a miserable time co-existing
62 * Ideally, a PCI device driver, when suspecting that an isolation
63 * event has occured (e.g. by reading 0xff's), will then ask EEH
64 * whether this is the case, and then take appropriate steps to
65 * reset the PCI slot, the PCI device, and then resume operations.
66 * However, until that day, the checking is done here, with the
67 * eeh_check_failure() routine embedded in the MMIO macros. If
68 * the slot is found to be isolated, an "EEH Event" is synthesized
69 * and sent out for processing.
72 /* If a device driver keeps reading an MMIO register in an interrupt
73 * handler after a slot isolation event has occurred, we assume it
74 * is broken and panic. This sets the threshold for how many read
75 * attempts we allow before panicking.
77 #define EEH_MAX_FAILS 100000
80 static int ibm_set_eeh_option;
81 static int ibm_set_slot_reset;
82 static int ibm_read_slot_reset_state;
83 static int ibm_read_slot_reset_state2;
84 static int ibm_slot_error_detail;
85 static int ibm_get_config_addr_info;
86 static int ibm_configure_bridge;
88 int eeh_subsystem_enabled;
89 EXPORT_SYMBOL(eeh_subsystem_enabled);
91 /* Lock to avoid races due to multiple reports of an error */
92 static DEFINE_SPINLOCK(confirm_error_lock);
94 /* Buffer for reporting slot-error-detail rtas calls */
95 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
96 static DEFINE_SPINLOCK(slot_errbuf_lock);
97 static int eeh_error_buf_size;
99 /* System monitoring statistics */
100 static unsigned long no_device;
101 static unsigned long no_dn;
102 static unsigned long no_cfg_addr;
103 static unsigned long ignored_check;
104 static unsigned long total_mmio_ffs;
105 static unsigned long false_positives;
106 static unsigned long ignored_failures;
107 static unsigned long slot_resets;
109 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
111 /* --------------------------------------------------------------- */
112 /* Below lies the EEH event infrastructure */
114 void eeh_slot_error_detail (struct pci_dn *pdn, int severity)
120 /* Log the error with the rtas logger */
121 spin_lock_irqsave(&slot_errbuf_lock, flags);
122 memset(slot_errbuf, 0, eeh_error_buf_size);
124 /* Use PE configuration address, if present */
125 config_addr = pdn->eeh_config_addr;
126 if (pdn->eeh_pe_config_addr)
127 config_addr = pdn->eeh_pe_config_addr;
129 rc = rtas_call(ibm_slot_error_detail,
130 8, 1, NULL, config_addr,
131 BUID_HI(pdn->phb->buid),
132 BUID_LO(pdn->phb->buid), NULL, 0,
133 virt_to_phys(slot_errbuf),
138 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
139 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
143 * read_slot_reset_state - Read the reset state of a device node's slot
144 * @dn: device node to read
145 * @rets: array to return results in
147 static int read_slot_reset_state(struct pci_dn *pdn, int rets[])
152 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
153 token = ibm_read_slot_reset_state2;
156 token = ibm_read_slot_reset_state;
157 rets[2] = 0; /* fake PE Unavailable info */
161 /* Use PE configuration address, if present */
162 config_addr = pdn->eeh_config_addr;
163 if (pdn->eeh_pe_config_addr)
164 config_addr = pdn->eeh_pe_config_addr;
166 return rtas_call(token, 3, outputs, rets, config_addr,
167 BUID_HI(pdn->phb->buid), BUID_LO(pdn->phb->buid));
171 * eeh_token_to_phys - convert EEH address token to phys address
172 * @token i/o token, should be address in the form 0xA....
174 static inline unsigned long eeh_token_to_phys(unsigned long token)
179 ptep = find_linux_pte(init_mm.pgd, token);
182 pa = pte_pfn(*ptep) << PAGE_SHIFT;
184 return pa | (token & (PAGE_SIZE-1));
188 * Return the "partitionable endpoint" (pe) under which this device lies
190 struct device_node * find_device_pe(struct device_node *dn)
192 while ((dn->parent) && PCI_DN(dn->parent) &&
193 (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
199 /** Mark all devices that are peers of this device as failed.
200 * Mark the device driver too, so that it can see the failure
201 * immediately; this is critical, since some drivers poll
202 * status registers in interrupts ... If a driver is polling,
203 * and the slot is frozen, then the driver can deadlock in
204 * an interrupt context, which is bad.
207 static void __eeh_mark_slot (struct device_node *dn, int mode_flag)
211 /* Mark the pci device driver too */
212 struct pci_dev *dev = PCI_DN(dn)->pcidev;
214 PCI_DN(dn)->eeh_mode |= mode_flag;
216 if (dev && dev->driver)
217 dev->error_state = pci_channel_io_frozen;
220 __eeh_mark_slot (dn->child, mode_flag);
226 void eeh_mark_slot (struct device_node *dn, int mode_flag)
228 dn = find_device_pe (dn);
230 /* Back up one, since config addrs might be shared */
231 if (PCI_DN(dn) && PCI_DN(dn)->eeh_pe_config_addr)
234 PCI_DN(dn)->eeh_mode |= mode_flag;
235 __eeh_mark_slot (dn->child, mode_flag);
238 static void __eeh_clear_slot (struct device_node *dn, int mode_flag)
242 PCI_DN(dn)->eeh_mode &= ~mode_flag;
243 PCI_DN(dn)->eeh_check_count = 0;
245 __eeh_clear_slot (dn->child, mode_flag);
251 void eeh_clear_slot (struct device_node *dn, int mode_flag)
254 spin_lock_irqsave(&confirm_error_lock, flags);
256 dn = find_device_pe (dn);
258 /* Back up one, since config addrs might be shared */
259 if (PCI_DN(dn) && PCI_DN(dn)->eeh_pe_config_addr)
262 PCI_DN(dn)->eeh_mode &= ~mode_flag;
263 PCI_DN(dn)->eeh_check_count = 0;
264 __eeh_clear_slot (dn->child, mode_flag);
265 spin_unlock_irqrestore(&confirm_error_lock, flags);
269 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
271 * @dev pci device, if known
273 * Check for an EEH failure for the given device node. Call this
274 * routine if the result of a read was all 0xff's and you want to
275 * find out if this is due to an EEH slot freeze. This routine
276 * will query firmware for the EEH status.
278 * Returns 0 if there has not been an EEH error; otherwise returns
279 * a non-zero value and queues up a slot isolation event notification.
281 * It is safe to call this routine in an interrupt context.
283 int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
289 enum pci_channel_state state;
294 if (!eeh_subsystem_enabled)
303 /* Access to IO BARs might get this far and still not want checking. */
304 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
305 pdn->eeh_mode & EEH_MODE_NOCHECK) {
308 printk ("EEH:ignored check (%x) for %s %s\n",
309 pdn->eeh_mode, pci_name (dev), dn->full_name);
314 if (!pdn->eeh_config_addr && !pdn->eeh_pe_config_addr) {
319 /* If we already have a pending isolation event for this
320 * slot, we know it's bad already, we don't need to check.
321 * Do this checking under a lock; as multiple PCI devices
322 * in one slot might report errors simultaneously, and we
323 * only want one error recovery routine running.
325 spin_lock_irqsave(&confirm_error_lock, flags);
327 if (pdn->eeh_mode & EEH_MODE_ISOLATED) {
328 pdn->eeh_check_count ++;
329 if (pdn->eeh_check_count >= EEH_MAX_FAILS) {
330 printk (KERN_ERR "EEH: Device driver ignored %d bad reads, panicing\n",
331 pdn->eeh_check_count);
334 /* re-read the slot reset state */
335 if (read_slot_reset_state(pdn, rets) != 0)
336 rets[0] = -1; /* reset state unknown */
338 /* If we are here, then we hit an infinite loop. Stop. */
339 panic("EEH: MMIO halt (%d) on device:%s\n", rets[0], pci_name(dev));
345 * Now test for an EEH failure. This is VERY expensive.
346 * Note that the eeh_config_addr may be a parent device
347 * in the case of a device behind a bridge, or it may be
348 * function zero of a multi-function device.
349 * In any case they must share a common PHB.
351 ret = read_slot_reset_state(pdn, rets);
353 /* If the call to firmware failed, punt */
355 printk(KERN_WARNING "EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
362 /* If EEH is not supported on this device, punt. */
364 printk(KERN_WARNING "EEH: event on unsupported device, rc=%d dn=%s\n",
371 /* If not the kind of error we know about, punt. */
372 if (rets[0] != 2 && rets[0] != 4 && rets[0] != 5) {
378 /* Note that config-io to empty slots may fail;
379 * we recognize empty because they don't have children. */
380 if ((rets[0] == 5) && (dn->child == NULL)) {
388 /* Avoid repeated reports of this failure, including problems
389 * with other functions on this device, and functions under
391 eeh_mark_slot (dn, EEH_MODE_ISOLATED);
392 spin_unlock_irqrestore(&confirm_error_lock, flags);
394 state = pci_channel_io_normal;
395 if ((rets[0] == 2) || (rets[0] == 4))
396 state = pci_channel_io_frozen;
398 state = pci_channel_io_perm_failure;
399 eeh_send_failure_event (dn, dev, state, rets[2]);
401 /* Most EEH events are due to device driver bugs. Having
402 * a stack trace will help the device-driver authors figure
403 * out what happened. So print that out. */
404 if (rets[0] != 5) dump_stack();
408 spin_unlock_irqrestore(&confirm_error_lock, flags);
412 EXPORT_SYMBOL_GPL(eeh_dn_check_failure);
415 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
416 * @token i/o token, should be address in the form 0xA....
417 * @val value, should be all 1's (XXX why do we need this arg??)
419 * Check for an EEH failure at the given token address. Call this
420 * routine if the result of a read was all 0xff's and you want to
421 * find out if this is due to an EEH slot freeze event. This routine
422 * will query firmware for the EEH status.
424 * Note this routine is safe to call in an interrupt context.
426 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
430 struct device_node *dn;
432 /* Finding the phys addr + pci device; this is pretty quick. */
433 addr = eeh_token_to_phys((unsigned long __force) token);
434 dev = pci_get_device_by_addr(addr);
440 dn = pci_device_to_OF_node(dev);
441 eeh_dn_check_failure (dn, dev);
447 EXPORT_SYMBOL(eeh_check_failure);
449 /* ------------------------------------------------------------- */
450 /* The code below deals with error recovery */
453 * eeh_slot_availability - returns error status of slot
454 * @pdn pci device node
456 * Return negative value if a permanent error, else return
457 * a number of milliseconds to wait until the PCI slot is
461 eeh_slot_availability(struct pci_dn *pdn)
466 rc = read_slot_reset_state(pdn, rets);
470 if (rets[1] == 0) return -1; /* EEH is not supported */
471 if (rets[0] == 0) return 0; /* Oll Korrect */
473 if (rets[2] == 0) return -1; /* permanently unavailable */
474 return rets[2]; /* number of millisecs to wait */
479 printk (KERN_ERR "EEH: Slot unavailable: rc=%d, rets=%d %d %d\n",
480 rc, rets[0], rets[1], rets[2]);
485 * rtas_pci_enable - enable MMIO or DMA transfers for this slot
486 * @pdn pci device node
490 rtas_pci_enable(struct pci_dn *pdn, int function)
495 /* Use PE configuration address, if present */
496 config_addr = pdn->eeh_config_addr;
497 if (pdn->eeh_pe_config_addr)
498 config_addr = pdn->eeh_pe_config_addr;
500 rc = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
502 BUID_HI(pdn->phb->buid),
503 BUID_LO(pdn->phb->buid),
507 printk(KERN_WARNING "EEH: Cannot enable function %d, err=%d dn=%s\n",
508 function, rc, pdn->node->full_name);
514 * rtas_pci_slot_reset - raises/lowers the pci #RST line
515 * @pdn pci device node
516 * @state: 1/0 to raise/lower the #RST
518 * Clear the EEH-frozen condition on a slot. This routine
519 * asserts the PCI #RST line if the 'state' argument is '1',
520 * and drops the #RST line if 'state is '0'. This routine is
521 * safe to call in an interrupt context.
526 rtas_pci_slot_reset(struct pci_dn *pdn, int state)
534 printk (KERN_WARNING "EEH: in slot reset, device node %s has no phb\n",
535 pdn->node->full_name);
539 /* Use PE configuration address, if present */
540 config_addr = pdn->eeh_config_addr;
541 if (pdn->eeh_pe_config_addr)
542 config_addr = pdn->eeh_pe_config_addr;
544 rc = rtas_call(ibm_set_slot_reset,4,1, NULL,
546 BUID_HI(pdn->phb->buid),
547 BUID_LO(pdn->phb->buid),
550 printk (KERN_WARNING "EEH: Unable to reset the failed slot, (%d) #RST=%d dn=%s\n",
551 rc, state, pdn->node->full_name);
557 * rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
558 * @pdn: pci device node to be reset.
560 * Return 0 if success, else a non-zero value.
564 rtas_set_slot_reset(struct pci_dn *pdn)
568 rtas_pci_slot_reset (pdn, 1);
570 /* The PCI bus requires that the reset be held high for at least
571 * a 100 milliseconds. We wait a bit longer 'just in case'. */
573 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
574 msleep (PCI_BUS_RST_HOLD_TIME_MSEC);
576 /* We might get hit with another EEH freeze as soon as the
577 * pci slot reset line is dropped. Make sure we don't miss
578 * these, and clear the flag now. */
579 eeh_clear_slot (pdn->node, EEH_MODE_ISOLATED);
581 rtas_pci_slot_reset (pdn, 0);
583 /* After a PCI slot has been reset, the PCI Express spec requires
584 * a 1.5 second idle time for the bus to stabilize, before starting
586 #define PCI_BUS_SETTLE_TIME_MSEC 1800
587 msleep (PCI_BUS_SETTLE_TIME_MSEC);
589 /* Now double check with the firmware to make sure the device is
590 * ready to be used; if not, wait for recovery. */
591 for (i=0; i<10; i++) {
592 rc = eeh_slot_availability (pdn);
594 printk (KERN_ERR "EEH: failed (%d) to reset slot %s\n", rc, pdn->node->full_name);
603 rc = eeh_slot_availability (pdn);
605 printk (KERN_ERR "EEH: timeout resetting slot %s\n", pdn->node->full_name);
610 /* ------------------------------------------------------- */
611 /** Save and restore of PCI BARs
613 * Although firmware will set up BARs during boot, it doesn't
614 * set up device BAR's after a device reset, although it will,
615 * if requested, set up bridge configuration. Thus, we need to
616 * configure the PCI devices ourselves.
620 * __restore_bars - Restore the Base Address Registers
621 * @pdn: pci device node
623 * Loads the PCI configuration space base address registers,
624 * the expansion ROM base address, the latency timer, and etc.
625 * from the saved values in the device node.
627 static inline void __restore_bars (struct pci_dn *pdn)
631 if (NULL==pdn->phb) return;
632 for (i=4; i<10; i++) {
633 rtas_write_config(pdn, i*4, 4, pdn->config_space[i]);
636 /* 12 == Expansion ROM Address */
637 rtas_write_config(pdn, 12*4, 4, pdn->config_space[12]);
639 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
640 #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
642 rtas_write_config (pdn, PCI_CACHE_LINE_SIZE, 1,
643 SAVED_BYTE(PCI_CACHE_LINE_SIZE));
645 rtas_write_config (pdn, PCI_LATENCY_TIMER, 1,
646 SAVED_BYTE(PCI_LATENCY_TIMER));
648 /* max latency, min grant, interrupt pin and line */
649 rtas_write_config(pdn, 15*4, 4, pdn->config_space[15]);
653 * eeh_restore_bars - restore the PCI config space info
655 * This routine performs a recursive walk to the children
656 * of this device as well.
658 void eeh_restore_bars(struct pci_dn *pdn)
660 struct device_node *dn;
664 if ((pdn->eeh_mode & EEH_MODE_SUPPORTED) && !IS_BRIDGE(pdn->class_code))
665 __restore_bars (pdn);
667 dn = pdn->node->child;
669 eeh_restore_bars (PCI_DN(dn));
675 * eeh_save_bars - save device bars
677 * Save the values of the device bars. Unlike the restore
678 * routine, this routine is *not* recursive. This is because
679 * PCI devices are added individuallly; but, for the restore,
680 * an entire slot is reset at a time.
682 static void eeh_save_bars(struct pci_dn *pdn)
689 for (i = 0; i < 16; i++)
690 rtas_read_config(pdn, i * 4, 4, &pdn->config_space[i]);
694 rtas_configure_bridge(struct pci_dn *pdn)
699 /* Use PE configuration address, if present */
700 config_addr = pdn->eeh_config_addr;
701 if (pdn->eeh_pe_config_addr)
702 config_addr = pdn->eeh_pe_config_addr;
704 rc = rtas_call(ibm_configure_bridge,3,1, NULL,
706 BUID_HI(pdn->phb->buid),
707 BUID_LO(pdn->phb->buid));
709 printk (KERN_WARNING "EEH: Unable to configure device bridge (%d) for %s\n",
710 rc, pdn->node->full_name);
714 /* ------------------------------------------------------------- */
715 /* The code below deals with enabling EEH for devices during the
716 * early boot sequence. EEH must be enabled before any PCI probing
722 struct eeh_early_enable_info {
723 unsigned int buid_hi;
724 unsigned int buid_lo;
727 /* Enable eeh for the given device node. */
728 static void *early_enable_eeh(struct device_node *dn, void *data)
730 struct eeh_early_enable_info *info = data;
732 const char *status = get_property(dn, "status", NULL);
733 const u32 *class_code = get_property(dn, "class-code", NULL);
734 const u32 *vendor_id = get_property(dn, "vendor-id", NULL);
735 const u32 *device_id = get_property(dn, "device-id", NULL);
738 struct pci_dn *pdn = PCI_DN(dn);
742 pdn->eeh_check_count = 0;
743 pdn->eeh_freeze_count = 0;
745 if (status && strcmp(status, "ok") != 0)
746 return NULL; /* ignore devices with bad status */
748 /* Ignore bad nodes. */
749 if (!class_code || !vendor_id || !device_id)
752 /* There is nothing to check on PCI to ISA bridges */
753 if (dn->type && !strcmp(dn->type, "isa")) {
754 pdn->eeh_mode |= EEH_MODE_NOCHECK;
757 pdn->class_code = *class_code;
760 * Now decide if we are going to "Disable" EEH checking
761 * for this device. We still run with the EEH hardware active,
762 * but we won't be checking for ff's. This means a driver
763 * could return bad data (very bad!), an interrupt handler could
764 * hang waiting on status bits that won't change, etc.
765 * But there are a few cases like display devices that make sense.
767 enable = 1; /* i.e. we will do checking */
769 if ((*class_code >> 16) == PCI_BASE_CLASS_DISPLAY)
774 pdn->eeh_mode |= EEH_MODE_NOCHECK;
776 /* Ok... see if this device supports EEH. Some do, some don't,
777 * and the only way to find out is to check each and every one. */
778 regs = get_property(dn, "reg", NULL);
780 /* First register entry is addr (00BBSS00) */
781 /* Try to enable eeh */
782 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
783 regs[0], info->buid_hi, info->buid_lo,
787 eeh_subsystem_enabled = 1;
788 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
789 pdn->eeh_config_addr = regs[0];
791 /* If the newer, better, ibm,get-config-addr-info is supported,
792 * then use that instead. */
793 pdn->eeh_pe_config_addr = 0;
794 if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
795 unsigned int rets[2];
796 ret = rtas_call (ibm_get_config_addr_info, 4, 2, rets,
797 pdn->eeh_config_addr,
798 info->buid_hi, info->buid_lo,
801 pdn->eeh_pe_config_addr = rets[0];
804 printk(KERN_DEBUG "EEH: %s: eeh enabled, config=%x pe_config=%x\n",
805 dn->full_name, pdn->eeh_config_addr, pdn->eeh_pe_config_addr);
809 /* This device doesn't support EEH, but it may have an
810 * EEH parent, in which case we mark it as supported. */
811 if (dn->parent && PCI_DN(dn->parent)
812 && (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
813 /* Parent supports EEH. */
814 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
815 pdn->eeh_config_addr = PCI_DN(dn->parent)->eeh_config_addr;
820 printk(KERN_WARNING "EEH: %s: unable to get reg property.\n",
829 * Initialize EEH by trying to enable it for all of the adapters in the system.
830 * As a side effect we can determine here if eeh is supported at all.
831 * Note that we leave EEH on so failed config cycles won't cause a machine
832 * check. If a user turns off EEH for a particular adapter they are really
833 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
834 * grant access to a slot if EEH isn't enabled, and so we always enable
835 * EEH for all slots/all devices.
837 * The eeh-force-off option disables EEH checking globally, for all slots.
838 * Even if force-off is set, the EEH hardware is still enabled, so that
839 * newer systems can boot.
841 void __init eeh_init(void)
843 struct device_node *phb, *np;
844 struct eeh_early_enable_info info;
846 spin_lock_init(&confirm_error_lock);
847 spin_lock_init(&slot_errbuf_lock);
849 np = of_find_node_by_path("/rtas");
853 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
854 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
855 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
856 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
857 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
858 ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
859 ibm_configure_bridge = rtas_token ("ibm,configure-bridge");
861 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE)
864 eeh_error_buf_size = rtas_token("rtas-error-log-max");
865 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
866 eeh_error_buf_size = 1024;
868 if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
869 printk(KERN_WARNING "EEH: rtas-error-log-max is bigger than allocated "
870 "buffer ! (%d vs %d)", eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
871 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
874 /* Enable EEH for all adapters. Note that eeh requires buid's */
875 for (phb = of_find_node_by_name(NULL, "pci"); phb;
876 phb = of_find_node_by_name(phb, "pci")) {
879 buid = get_phb_buid(phb);
880 if (buid == 0 || PCI_DN(phb) == NULL)
883 info.buid_lo = BUID_LO(buid);
884 info.buid_hi = BUID_HI(buid);
885 traverse_pci_devices(phb, early_enable_eeh, &info);
888 if (eeh_subsystem_enabled)
889 printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n");
891 printk(KERN_WARNING "EEH: No capable adapters found\n");
895 * eeh_add_device_early - enable EEH for the indicated device_node
896 * @dn: device node for which to set up EEH
898 * This routine must be used to perform EEH initialization for PCI
899 * devices that were added after system boot (e.g. hotplug, dlpar).
900 * This routine must be called before any i/o is performed to the
901 * adapter (inluding any config-space i/o).
902 * Whether this actually enables EEH or not for this device depends
903 * on the CEC architecture, type of the device, on earlier boot
904 * command-line arguments & etc.
906 static void eeh_add_device_early(struct device_node *dn)
908 struct pci_controller *phb;
909 struct eeh_early_enable_info info;
911 if (!dn || !PCI_DN(dn))
913 phb = PCI_DN(dn)->phb;
915 /* USB Bus children of PCI devices will not have BUID's */
916 if (NULL == phb || 0 == phb->buid)
919 info.buid_hi = BUID_HI(phb->buid);
920 info.buid_lo = BUID_LO(phb->buid);
921 early_enable_eeh(dn, &info);
924 void eeh_add_device_tree_early(struct device_node *dn)
926 struct device_node *sib;
927 for (sib = dn->child; sib; sib = sib->sibling)
928 eeh_add_device_tree_early(sib);
929 eeh_add_device_early(dn);
931 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
934 * eeh_add_device_late - perform EEH initialization for the indicated pci device
935 * @dev: pci device for which to set up EEH
937 * This routine must be used to complete EEH initialization for PCI
938 * devices that were added after system boot (e.g. hotplug, dlpar).
940 static void eeh_add_device_late(struct pci_dev *dev)
942 struct device_node *dn;
945 if (!dev || !eeh_subsystem_enabled)
949 printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev));
953 dn = pci_device_to_OF_node(dev);
957 pci_addr_cache_insert_device (dev);
960 void eeh_add_device_tree_late(struct pci_bus *bus)
964 list_for_each_entry(dev, &bus->devices, bus_list) {
965 eeh_add_device_late(dev);
966 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
967 struct pci_bus *subbus = dev->subordinate;
969 eeh_add_device_tree_late(subbus);
973 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
976 * eeh_remove_device - undo EEH setup for the indicated pci device
977 * @dev: pci device to be removed
979 * This routine should be called when a device is removed from
980 * a running system (e.g. by hotplug or dlpar). It unregisters
981 * the PCI device from the EEH subsystem. I/O errors affecting
982 * this device will no longer be detected after this call; thus,
983 * i/o errors affecting this slot may leave this device unusable.
985 static void eeh_remove_device(struct pci_dev *dev)
987 struct device_node *dn;
988 if (!dev || !eeh_subsystem_enabled)
991 /* Unregister the device with the EEH/PCI address search system */
993 printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev));
995 pci_addr_cache_remove_device(dev);
997 dn = pci_device_to_OF_node(dev);
998 if (PCI_DN(dn)->pcidev) {
999 PCI_DN(dn)->pcidev = NULL;
1004 void eeh_remove_bus_device(struct pci_dev *dev)
1006 struct pci_bus *bus = dev->subordinate;
1007 struct pci_dev *child, *tmp;
1009 eeh_remove_device(dev);
1011 if (bus && dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1012 list_for_each_entry_safe(child, tmp, &bus->devices, bus_list)
1013 eeh_remove_bus_device(child);
1016 EXPORT_SYMBOL_GPL(eeh_remove_bus_device);
1018 static int proc_eeh_show(struct seq_file *m, void *v)
1020 if (0 == eeh_subsystem_enabled) {
1021 seq_printf(m, "EEH Subsystem is globally disabled\n");
1022 seq_printf(m, "eeh_total_mmio_ffs=%ld\n", total_mmio_ffs);
1024 seq_printf(m, "EEH Subsystem is enabled\n");
1027 "no device node=%ld\n"
1028 "no config address=%ld\n"
1029 "check not wanted=%ld\n"
1030 "eeh_total_mmio_ffs=%ld\n"
1031 "eeh_false_positives=%ld\n"
1032 "eeh_ignored_failures=%ld\n"
1033 "eeh_slot_resets=%ld\n",
1034 no_device, no_dn, no_cfg_addr,
1035 ignored_check, total_mmio_ffs,
1036 false_positives, ignored_failures,
1043 static int proc_eeh_open(struct inode *inode, struct file *file)
1045 return single_open(file, proc_eeh_show, NULL);
1048 static struct file_operations proc_eeh_operations = {
1049 .open = proc_eeh_open,
1051 .llseek = seq_lseek,
1052 .release = single_release,
1055 static int __init eeh_init_proc(void)
1057 struct proc_dir_entry *e;
1059 if (machine_is(pseries)) {
1060 e = create_proc_entry("ppc64/eeh", 0, NULL);
1062 e->proc_fops = &proc_eeh_operations;
1067 __initcall(eeh_init_proc);