2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
6 * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
7 * Copyright (C) 2006 Olof Johansson <olof@lixom.net>
9 * Dynamic DMA mapping support, pSeries-specific parts, both SMP and LPAR.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <linux/init.h>
28 #include <linux/types.h>
29 #include <linux/slab.h>
31 #include <linux/spinlock.h>
32 #include <linux/string.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
38 #include <asm/iommu.h>
39 #include <asm/pci-bridge.h>
40 #include <asm/machdep.h>
41 #include <asm/abs_addr.h>
42 #include <asm/pSeries_reconfig.h>
43 #include <asm/firmware.h>
45 #include <asm/ppc-pci.h>
48 #include "plpar_wrappers.h"
51 static void tce_build_pSeries(struct iommu_table *tbl, long index,
52 long npages, unsigned long uaddr,
53 enum dma_data_direction direction)
59 proto_tce = TCE_PCI_READ; // Read allowed
61 if (direction != DMA_TO_DEVICE)
62 proto_tce |= TCE_PCI_WRITE;
64 tcep = ((u64 *)tbl->it_base) + index;
67 /* can't move this out since we might cross LMB boundary */
68 rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT;
69 *tcep = proto_tce | (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT;
71 uaddr += TCE_PAGE_SIZE;
77 static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages)
81 tcep = ((u64 *)tbl->it_base) + index;
87 static unsigned long tce_get_pseries(struct iommu_table *tbl, long index)
91 tcep = ((u64 *)tbl->it_base) + index;
96 static void tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum,
97 long npages, unsigned long uaddr,
98 enum dma_data_direction direction)
104 rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT;
105 proto_tce = TCE_PCI_READ;
106 if (direction != DMA_TO_DEVICE)
107 proto_tce |= TCE_PCI_WRITE;
110 tce = proto_tce | (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT;
111 rc = plpar_tce_put((u64)tbl->it_index, (u64)tcenum << 12, tce);
113 if (rc && printk_ratelimit()) {
114 printk("tce_build_pSeriesLP: plpar_tce_put failed. rc=%ld\n", rc);
115 printk("\tindex = 0x%lx\n", (u64)tbl->it_index);
116 printk("\ttcenum = 0x%lx\n", (u64)tcenum);
117 printk("\ttce val = 0x%lx\n", tce );
118 show_stack(current, (unsigned long *)__get_SP());
126 static DEFINE_PER_CPU(u64 *, tce_page) = NULL;
128 static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
129 long npages, unsigned long uaddr,
130 enum dma_data_direction direction)
139 tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, direction);
143 tcep = __get_cpu_var(tce_page);
145 /* This is safe to do since interrupts are off when we're called
146 * from iommu_alloc{,_sg}()
149 tcep = (u64 *)__get_free_page(GFP_ATOMIC);
150 /* If allocation fails, fall back to the loop implementation */
152 tce_build_pSeriesLP(tbl, tcenum, npages, uaddr,
156 __get_cpu_var(tce_page) = tcep;
159 rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT;
160 proto_tce = TCE_PCI_READ;
161 if (direction != DMA_TO_DEVICE)
162 proto_tce |= TCE_PCI_WRITE;
164 /* We can map max one pageful of TCEs at a time */
167 * Set up the page with TCE data, looping through and setting
170 limit = min_t(long, npages, 4096/TCE_ENTRY_SIZE);
172 for (l = 0; l < limit; l++) {
173 tcep[l] = proto_tce | (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT;
177 rc = plpar_tce_put_indirect((u64)tbl->it_index,
179 (u64)virt_to_abs(tcep),
184 } while (npages > 0 && !rc);
186 if (rc && printk_ratelimit()) {
187 printk("tce_buildmulti_pSeriesLP: plpar_tce_put failed. rc=%ld\n", rc);
188 printk("\tindex = 0x%lx\n", (u64)tbl->it_index);
189 printk("\tnpages = 0x%lx\n", (u64)npages);
190 printk("\ttce[0] val = 0x%lx\n", tcep[0]);
191 show_stack(current, (unsigned long *)__get_SP());
195 static void tce_free_pSeriesLP(struct iommu_table *tbl, long tcenum, long npages)
200 rc = plpar_tce_put((u64)tbl->it_index, (u64)tcenum << 12, 0);
202 if (rc && printk_ratelimit()) {
203 printk("tce_free_pSeriesLP: plpar_tce_put failed. rc=%ld\n", rc);
204 printk("\tindex = 0x%lx\n", (u64)tbl->it_index);
205 printk("\ttcenum = 0x%lx\n", (u64)tcenum);
206 show_stack(current, (unsigned long *)__get_SP());
214 static void tce_freemulti_pSeriesLP(struct iommu_table *tbl, long tcenum, long npages)
218 rc = plpar_tce_stuff((u64)tbl->it_index, (u64)tcenum << 12, 0, npages);
220 if (rc && printk_ratelimit()) {
221 printk("tce_freemulti_pSeriesLP: plpar_tce_stuff failed\n");
222 printk("\trc = %ld\n", rc);
223 printk("\tindex = 0x%lx\n", (u64)tbl->it_index);
224 printk("\tnpages = 0x%lx\n", (u64)npages);
225 show_stack(current, (unsigned long *)__get_SP());
229 static unsigned long tce_get_pSeriesLP(struct iommu_table *tbl, long tcenum)
232 unsigned long tce_ret;
234 rc = plpar_tce_get((u64)tbl->it_index, (u64)tcenum << 12, &tce_ret);
236 if (rc && printk_ratelimit()) {
237 printk("tce_get_pSeriesLP: plpar_tce_get failed. rc=%ld\n",
239 printk("\tindex = 0x%lx\n", (u64)tbl->it_index);
240 printk("\ttcenum = 0x%lx\n", (u64)tcenum);
241 show_stack(current, (unsigned long *)__get_SP());
248 static void iommu_table_setparms(struct pci_controller *phb,
249 struct device_node *dn,
250 struct iommu_table *tbl)
252 struct device_node *node;
253 const unsigned long *basep;
258 basep = of_get_property(node, "linux,tce-base", NULL);
259 sizep = of_get_property(node, "linux,tce-size", NULL);
260 if (basep == NULL || sizep == NULL) {
261 printk(KERN_ERR "PCI_DMA: iommu_table_setparms: %s has "
262 "missing tce entries !\n", dn->full_name);
266 tbl->it_base = (unsigned long)__va(*basep);
268 #ifndef CONFIG_CRASH_DUMP
269 memset((void *)tbl->it_base, 0, *sizep);
272 tbl->it_busno = phb->bus->number;
274 /* Units of tce entries */
275 tbl->it_offset = phb->dma_window_base_cur >> IOMMU_PAGE_SHIFT;
277 /* Test if we are going over 2GB of DMA space */
278 if (phb->dma_window_base_cur + phb->dma_window_size > 0x80000000ul) {
279 udbg_printf("PCI_DMA: Unexpected number of IOAs under this PHB.\n");
280 panic("PCI_DMA: Unexpected number of IOAs under this PHB.\n");
283 phb->dma_window_base_cur += phb->dma_window_size;
285 /* Set the tce table size - measured in entries */
286 tbl->it_size = phb->dma_window_size >> IOMMU_PAGE_SHIFT;
289 tbl->it_blocksize = 16;
290 tbl->it_type = TCE_PCI;
294 * iommu_table_setparms_lpar
296 * Function: On pSeries LPAR systems, return TCE table info, given a pci bus.
298 static void iommu_table_setparms_lpar(struct pci_controller *phb,
299 struct device_node *dn,
300 struct iommu_table *tbl,
301 const void *dma_window,
304 unsigned long offset, size;
306 tbl->it_busno = bussubno;
307 of_parse_dma_window(dn, dma_window, &tbl->it_index, &offset, &size);
310 tbl->it_blocksize = 16;
311 tbl->it_type = TCE_PCI;
312 tbl->it_offset = offset >> IOMMU_PAGE_SHIFT;
313 tbl->it_size = size >> IOMMU_PAGE_SHIFT;
316 static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)
318 struct device_node *dn;
319 struct iommu_table *tbl;
320 struct device_node *isa_dn, *isa_dn_orig;
321 struct device_node *tmp;
325 dn = pci_bus_to_OF_node(bus);
327 pr_debug("pci_dma_bus_setup_pSeries: setting up bus %s\n", dn->full_name);
330 /* This is not a root bus, any setup will be done for the
331 * device-side of the bridge in iommu_dev_setup_pSeries().
337 /* Check if the ISA bus on the system is under
340 isa_dn = isa_dn_orig = of_find_node_by_type(NULL, "isa");
342 while (isa_dn && isa_dn != dn)
343 isa_dn = isa_dn->parent;
346 of_node_put(isa_dn_orig);
348 /* Count number of direct PCI children of the PHB. */
349 for (children = 0, tmp = dn->child; tmp; tmp = tmp->sibling)
352 pr_debug("Children: %d\n", children);
354 /* Calculate amount of DMA window per slot. Each window must be
355 * a power of two (due to pci_alloc_consistent requirements).
357 * Keep 256MB aside for PHBs with ISA.
361 /* No ISA/IDE - just set window size and return */
362 pci->phb->dma_window_size = 0x80000000ul; /* To be divided */
364 while (pci->phb->dma_window_size * children > 0x80000000ul)
365 pci->phb->dma_window_size >>= 1;
366 pr_debug("No ISA/IDE, window size is 0x%lx\n",
367 pci->phb->dma_window_size);
368 pci->phb->dma_window_base_cur = 0;
373 /* If we have ISA, then we probably have an IDE
374 * controller too. Allocate a 128MB table but
375 * skip the first 128MB to avoid stepping on ISA
378 pci->phb->dma_window_size = 0x8000000ul;
379 pci->phb->dma_window_base_cur = 0x8000000ul;
381 tbl = kmalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
384 iommu_table_setparms(pci->phb, dn, tbl);
385 pci->iommu_table = iommu_init_table(tbl, pci->phb->node);
387 /* Divide the rest (1.75GB) among the children */
388 pci->phb->dma_window_size = 0x80000000ul;
389 while (pci->phb->dma_window_size * children > 0x70000000ul)
390 pci->phb->dma_window_size >>= 1;
392 pr_debug("ISA/IDE, window size is 0x%lx\n", pci->phb->dma_window_size);
396 static void pci_dma_bus_setup_pSeriesLP(struct pci_bus *bus)
398 struct iommu_table *tbl;
399 struct device_node *dn, *pdn;
401 const void *dma_window = NULL;
403 dn = pci_bus_to_OF_node(bus);
405 pr_debug("pci_dma_bus_setup_pSeriesLP: setting up bus %s\n",
408 /* Find nearest ibm,dma-window, walking up the device tree */
409 for (pdn = dn; pdn != NULL; pdn = pdn->parent) {
410 dma_window = of_get_property(pdn, "ibm,dma-window", NULL);
411 if (dma_window != NULL)
415 if (dma_window == NULL) {
416 pr_debug(" no ibm,dma-window property !\n");
422 pr_debug(" parent is %s, iommu_table: 0x%p\n",
423 pdn->full_name, ppci->iommu_table);
425 if (!ppci->iommu_table) {
426 tbl = kmalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
428 iommu_table_setparms_lpar(ppci->phb, pdn, tbl, dma_window,
430 ppci->iommu_table = iommu_init_table(tbl, ppci->phb->node);
431 pr_debug(" created table: %p\n", ppci->iommu_table);
435 PCI_DN(dn)->iommu_table = ppci->iommu_table;
439 static void pci_dma_dev_setup_pSeries(struct pci_dev *dev)
441 struct device_node *dn;
442 struct iommu_table *tbl;
444 pr_debug("pci_dma_dev_setup_pSeries: %s\n", pci_name(dev));
446 dn = dev->dev.archdata.of_node;
448 /* If we're the direct child of a root bus, then we need to allocate
449 * an iommu table ourselves. The bus setup code should have setup
450 * the window sizes already.
452 if (!dev->bus->self) {
453 struct pci_controller *phb = PCI_DN(dn)->phb;
455 pr_debug(" --> first child, no bridge. Allocating iommu table.\n");
456 tbl = kmalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
458 iommu_table_setparms(phb, dn, tbl);
459 PCI_DN(dn)->iommu_table = iommu_init_table(tbl, phb->node);
460 dev->dev.archdata.dma_data = PCI_DN(dn)->iommu_table;
464 /* If this device is further down the bus tree, search upwards until
465 * an already allocated iommu table is found and use that.
468 while (dn && PCI_DN(dn) && PCI_DN(dn)->iommu_table == NULL)
471 if (dn && PCI_DN(dn))
472 dev->dev.archdata.dma_data = PCI_DN(dn)->iommu_table;
474 printk(KERN_WARNING "iommu: Device %s has no iommu table\n",
478 static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
480 struct device_node *pdn, *dn;
481 struct iommu_table *tbl;
482 const void *dma_window = NULL;
485 pr_debug("pci_dma_dev_setup_pSeriesLP: %s\n", pci_name(dev));
487 /* dev setup for LPAR is a little tricky, since the device tree might
488 * contain the dma-window properties per-device and not neccesarily
489 * for the bus. So we need to search upwards in the tree until we
490 * either hit a dma-window property, OR find a parent with a table
493 dn = pci_device_to_OF_node(dev);
494 pr_debug(" node is %s\n", dn->full_name);
496 for (pdn = dn; pdn && PCI_DN(pdn) && !PCI_DN(pdn)->iommu_table;
498 dma_window = of_get_property(pdn, "ibm,dma-window", NULL);
503 if (!pdn || !PCI_DN(pdn)) {
504 printk(KERN_WARNING "pci_dma_dev_setup_pSeriesLP: "
505 "no DMA window found for pci dev=%s dn=%s\n",
506 pci_name(dev), dn? dn->full_name : "<null>");
509 pr_debug(" parent is %s\n", pdn->full_name);
511 /* Check for parent == NULL so we don't try to setup the empty EADS
512 * slots on POWER4 machines.
514 if (dma_window == NULL || pdn->parent == NULL) {
515 pr_debug(" no dma window for device, linking to parent\n");
516 dev->dev.archdata.dma_data = PCI_DN(pdn)->iommu_table;
521 if (!pci->iommu_table) {
522 tbl = kmalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
524 iommu_table_setparms_lpar(pci->phb, pdn, tbl, dma_window,
525 pci->phb->bus->number);
526 pci->iommu_table = iommu_init_table(tbl, pci->phb->node);
527 pr_debug(" created table: %p\n", pci->iommu_table);
529 pr_debug(" found DMA window, table: %p\n", pci->iommu_table);
532 dev->dev.archdata.dma_data = pci->iommu_table;
534 #else /* CONFIG_PCI */
535 #define pci_dma_bus_setup_pSeries NULL
536 #define pci_dma_dev_setup_pSeries NULL
537 #define pci_dma_bus_setup_pSeriesLP NULL
538 #define pci_dma_dev_setup_pSeriesLP NULL
539 #endif /* !CONFIG_PCI */
541 static int iommu_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *node)
544 struct device_node *np = node;
545 struct pci_dn *pci = PCI_DN(np);
548 case PSERIES_RECONFIG_REMOVE:
549 if (pci && pci->iommu_table &&
550 of_get_property(np, "ibm,dma-window", NULL))
551 iommu_free_table(pci->iommu_table, np->full_name);
560 static struct notifier_block iommu_reconfig_nb = {
561 .notifier_call = iommu_reconfig_notifier,
564 /* These are called very early. */
565 void iommu_init_early_pSeries(void)
567 if (of_chosen && of_get_property(of_chosen, "linux,iommu-off", NULL)) {
568 /* Direct I/O, IOMMU off */
569 ppc_md.pci_dma_dev_setup = NULL;
570 ppc_md.pci_dma_bus_setup = NULL;
571 set_pci_dma_ops(&dma_direct_ops);
575 if (firmware_has_feature(FW_FEATURE_LPAR)) {
576 if (firmware_has_feature(FW_FEATURE_MULTITCE)) {
577 ppc_md.tce_build = tce_buildmulti_pSeriesLP;
578 ppc_md.tce_free = tce_freemulti_pSeriesLP;
580 ppc_md.tce_build = tce_build_pSeriesLP;
581 ppc_md.tce_free = tce_free_pSeriesLP;
583 ppc_md.tce_get = tce_get_pSeriesLP;
584 ppc_md.pci_dma_bus_setup = pci_dma_bus_setup_pSeriesLP;
585 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_pSeriesLP;
587 ppc_md.tce_build = tce_build_pSeries;
588 ppc_md.tce_free = tce_free_pSeries;
589 ppc_md.tce_get = tce_get_pseries;
590 ppc_md.pci_dma_bus_setup = pci_dma_bus_setup_pSeries;
591 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_pSeries;
595 pSeries_reconfig_notifier_register(&iommu_reconfig_nb);
597 set_pci_dma_ops(&dma_iommu_ops);