2 * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved.
4 * Author: Tony Li <tony.li@freescale.com>
5 * Jason Jin <Jason.jin@freescale.com>
7 * The hwirq alloc and free code reuse from sysdev/mpic_msi.c
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2 of the
15 #include <linux/irq.h>
16 #include <linux/bootmem.h>
17 #include <linux/bitmap.h>
18 #include <linux/msi.h>
19 #include <linux/pci.h>
20 #include <linux/of_platform.h>
21 #include <sysdev/fsl_soc.h>
23 #include <asm/hw_irq.h>
24 #include <asm/ppc-pci.h>
27 struct fsl_msi_feature {
32 static struct fsl_msi *fsl_msi;
34 static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
36 return in_be32(base + (reg >> 2));
39 static inline void fsl_msi_write(u32 __iomem *base,
40 unsigned int reg, u32 value)
42 out_be32(base + (reg >> 2), value);
46 * We do not need this actually. The MSIR register has been read once
47 * in the cascade interrupt. So, this MSI interrupt has been acked
49 static void fsl_msi_end_irq(unsigned int virq)
53 static struct irq_chip fsl_msi_chip = {
55 .unmask = unmask_msi_irq,
56 .ack = fsl_msi_end_irq,
57 .typename = " FSL-MSI ",
60 static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
63 struct irq_chip *chip = &fsl_msi_chip;
65 get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING;
67 set_irq_chip_and_handler(virq, chip, handle_edge_irq);
72 static struct irq_host_ops fsl_msi_host_ops = {
73 .map = fsl_msi_host_map,
76 irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num)
79 int offset, order = get_count_order(num);
81 spin_lock_irqsave(&msi->bitmap_lock, flags);
83 offset = bitmap_find_free_region(msi->fsl_msi_bitmap,
86 spin_unlock_irqrestore(&msi->bitmap_lock, flags);
88 pr_debug("%s: allocated 0x%x (2^%d) at offset 0x%x\n",
89 __func__, num, order, offset);
94 void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num)
97 int order = get_count_order(num);
99 pr_debug("%s: freeing 0x%x (2^%d) at offset 0x%x\n",
100 __func__, num, order, offset);
102 spin_lock_irqsave(&msi->bitmap_lock, flags);
103 bitmap_release_region(msi->fsl_msi_bitmap, offset, order);
104 spin_unlock_irqrestore(&msi->bitmap_lock, flags);
107 static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi)
112 bitmap_allocate_region(msi->fsl_msi_bitmap, 0,
113 get_count_order(NR_MSI_IRQS));
115 p = of_get_property(msi->of_node, "msi-available-ranges", &len);
118 /* No msi-available-ranges property,
119 * All the 256 MSI interrupts can be used
121 fsl_msi_free_hwirqs(msi, 0, 0x100);
125 if ((len % (2 * sizeof(u32))) != 0) {
126 printk(KERN_WARNING "fsl_msi: Malformed msi-available-ranges "
127 "property on %s\n", msi->of_node->full_name);
131 /* Format is: (<u32 start> <u32 count>)+ */
132 len /= 2 * sizeof(u32);
133 for (i = 0; i < len; i++, p += 2)
134 fsl_msi_free_hwirqs(msi, *p, *(p + 1));
139 static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
143 size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32);
145 msi_data->fsl_msi_bitmap = kzalloc(size, GFP_KERNEL);
147 if (msi_data->fsl_msi_bitmap == NULL) {
148 pr_debug("%s: ENOMEM allocating allocator bitmap!\n",
153 rc = fsl_msi_free_dt_hwirqs(msi_data);
159 kfree(msi_data->fsl_msi_bitmap);
161 msi_data->fsl_msi_bitmap = NULL;
166 static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type)
168 if (type == PCI_CAP_ID_MSIX)
169 pr_debug("fslmsi: MSI-X untested, trying anyway.\n");
174 static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
176 struct msi_desc *entry;
177 struct fsl_msi *msi_data = fsl_msi;
179 list_for_each_entry(entry, &pdev->msi_list, list) {
180 if (entry->irq == NO_IRQ)
182 set_irq_msi(entry->irq, NULL);
183 fsl_msi_free_hwirqs(msi_data, virq_to_hw(entry->irq), 1);
184 irq_dispose_mapping(entry->irq);
190 static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
193 struct fsl_msi *msi_data = fsl_msi;
195 msg->address_lo = msi_data->msi_addr_lo;
196 msg->address_hi = msi_data->msi_addr_hi;
199 pr_debug("%s: allocated srs: %d, ibs: %d\n",
200 __func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG);
203 static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
205 irq_hw_number_t hwirq;
208 struct msi_desc *entry;
210 struct fsl_msi *msi_data = fsl_msi;
212 list_for_each_entry(entry, &pdev->msi_list, list) {
213 hwirq = fsl_msi_alloc_hwirqs(msi_data, 1);
216 pr_debug("%s: fail allocating msi interrupt\n",
221 virq = irq_create_mapping(msi_data->irqhost, hwirq);
223 if (virq == NO_IRQ) {
224 pr_debug("%s: fail mapping hwirq 0x%lx\n",
226 fsl_msi_free_hwirqs(msi_data, hwirq, 1);
230 set_irq_msi(virq, entry);
232 fsl_compose_msi_msg(pdev, hwirq, &msg);
233 write_msi_msg(virq, &msg);
241 void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
243 unsigned int cascade_irq;
244 struct fsl_msi *msi_data = fsl_msi;
250 spin_lock(&desc->lock);
251 if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
252 if (desc->chip->mask_ack)
253 desc->chip->mask_ack(irq);
255 desc->chip->mask(irq);
256 desc->chip->ack(irq);
260 if (unlikely(desc->status & IRQ_INPROGRESS))
263 msir_index = (int)(desc->handler_data);
265 if (msir_index >= NR_MSI_REG)
266 cascade_irq = NO_IRQ;
268 desc->status |= IRQ_INPROGRESS;
269 switch (fsl_msi->feature & FSL_PIC_IP_MASK) {
270 case FSL_PIC_IP_MPIC:
271 msir_value = fsl_msi_read(msi_data->msi_regs,
274 case FSL_PIC_IP_IPIC:
275 msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4);
280 intr_index = ffs(msir_value) - 1;
282 cascade_irq = irq_linear_revmap(msi_data->irqhost,
283 (msir_index * IRQS_PER_MSI_REG +
284 intr_index + have_shift));
285 if (cascade_irq != NO_IRQ)
286 generic_handle_irq(cascade_irq);
287 have_shift += (intr_index + 1);
288 msir_value = (msir_value >> (intr_index + 1));
290 desc->status &= ~IRQ_INPROGRESS;
292 switch (msi_data->feature & FSL_PIC_IP_MASK) {
293 case FSL_PIC_IP_MPIC:
294 desc->chip->eoi(irq);
296 case FSL_PIC_IP_IPIC:
297 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
298 desc->chip->unmask(irq);
302 spin_unlock(&desc->lock);
305 static int __devinit fsl_of_msi_probe(struct of_device *dev,
306 const struct of_device_id *match)
314 struct fsl_msi_feature *tmp_data;
316 printk(KERN_DEBUG "Setting up Freescale MSI support\n");
318 msi = kzalloc(sizeof(struct fsl_msi), GFP_KERNEL);
320 dev_err(&dev->dev, "No memory for MSI structure\n");
325 msi->of_node = of_node_get(dev->node);
327 msi->irqhost = irq_alloc_host(of_node_get(dev->node),
329 NR_MSI_IRQS, &fsl_msi_host_ops, 0);
330 if (msi->irqhost == NULL) {
331 dev_err(&dev->dev, "No memory for MSI irqhost\n");
332 of_node_put(dev->node);
337 /* Get the MSI reg base */
338 err = of_address_to_resource(dev->node, 0, &res);
340 dev_err(&dev->dev, "%s resource error!\n",
341 dev->node->full_name);
345 msi->msi_regs = ioremap(res.start, res.end - res.start + 1);
346 if (!msi->msi_regs) {
347 dev_err(&dev->dev, "ioremap problem failed\n");
351 tmp_data = (struct fsl_msi_feature *)match->data;
353 msi->feature = tmp_data->fsl_pic_ip;
355 msi->irqhost->host_data = msi;
357 msi->msi_addr_hi = 0x0;
358 msi->msi_addr_lo = res.start + tmp_data->msiir_offset;
360 rc = fsl_msi_init_allocator(msi);
362 dev_err(&dev->dev, "Error allocating MSI bitmap\n");
366 p = of_get_property(dev->node, "interrupts", &count);
368 dev_err(&dev->dev, "no interrupts property found on %s\n",
369 dev->node->full_name);
373 if (count % 8 != 0) {
374 dev_err(&dev->dev, "Malformed interrupts property on %s\n",
375 dev->node->full_name);
380 count /= sizeof(u32);
381 for (i = 0; i < count / 2; i++) {
384 virt_msir = irq_of_parse_and_map(dev->node, i);
385 if (virt_msir != NO_IRQ) {
386 set_irq_data(virt_msir, (void *)i);
387 set_irq_chained_handler(virt_msir, fsl_msi_cascade);
393 WARN_ON(ppc_md.setup_msi_irqs);
394 ppc_md.setup_msi_irqs = fsl_setup_msi_irqs;
395 ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs;
396 ppc_md.msi_check_device = fsl_msi_check_device;
403 static const struct fsl_msi_feature mpic_msi_feature = {
404 .fsl_pic_ip = FSL_PIC_IP_MPIC,
405 .msiir_offset = 0x140,
408 static const struct fsl_msi_feature ipic_msi_feature = {
409 .fsl_pic_ip = FSL_PIC_IP_IPIC,
410 .msiir_offset = 0x38,
413 static const struct of_device_id fsl_of_msi_ids[] = {
415 .compatible = "fsl,mpic-msi",
416 .data = (void *)&mpic_msi_feature,
419 .compatible = "fsl,ipic-msi",
420 .data = (void *)&ipic_msi_feature,
425 static struct of_platform_driver fsl_of_msi_driver = {
427 .match_table = fsl_of_msi_ids,
428 .probe = fsl_of_msi_probe,
431 static __init int fsl_of_msi_init(void)
433 return of_register_platform_driver(&fsl_of_msi_driver);
436 subsys_initcall(fsl_of_msi_init);