2 * Copyright (C) 2007-2011 Freescale Semiconductor, Inc.
4 * Author: Tony Li <tony.li@freescale.com>
5 * Jason Jin <Jason.jin@freescale.com>
7 * The hwirq alloc and free code reuse from sysdev/mpic_msi.c
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2 of the
15 #include <linux/irq.h>
16 #include <linux/bootmem.h>
17 #include <linux/msi.h>
18 #include <linux/pci.h>
19 #include <linux/slab.h>
20 #include <linux/of_platform.h>
21 #include <sysdev/fsl_soc.h>
23 #include <asm/hw_irq.h>
24 #include <asm/ppc-pci.h>
26 #include <asm/fsl_hcalls.h>
33 struct fsl_msi_feature {
35 u32 msiir_offset; /* Offset of MSIIR, relative to start of MSIR bank */
38 struct fsl_msi_cascade_data {
39 struct fsl_msi *msi_data;
43 static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
45 return in_be32(base + (reg >> 2));
49 * We do not need this actually. The MSIR register has been read once
50 * in the cascade interrupt. So, this MSI interrupt has been acked
52 static void fsl_msi_end_irq(struct irq_data *d)
56 static struct irq_chip fsl_msi_chip = {
57 .irq_mask = mask_msi_irq,
58 .irq_unmask = unmask_msi_irq,
59 .irq_ack = fsl_msi_end_irq,
63 static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
66 struct fsl_msi *msi_data = h->host_data;
67 struct irq_chip *chip = &fsl_msi_chip;
69 irq_set_status_flags(virq, IRQ_TYPE_EDGE_FALLING);
71 irq_set_chip_data(virq, msi_data);
72 irq_set_chip_and_handler(virq, chip, handle_edge_irq);
77 static struct irq_host_ops fsl_msi_host_ops = {
78 .map = fsl_msi_host_map,
81 static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
85 rc = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS,
86 msi_data->irqhost->of_node);
90 rc = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap);
92 msi_bitmap_free(&msi_data->bitmap);
99 static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type)
101 if (type == PCI_CAP_ID_MSIX)
102 pr_debug("fslmsi: MSI-X untested, trying anyway.\n");
107 static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
109 struct msi_desc *entry;
110 struct fsl_msi *msi_data;
112 list_for_each_entry(entry, &pdev->msi_list, list) {
113 if (entry->irq == NO_IRQ)
115 msi_data = irq_get_chip_data(entry->irq);
116 irq_set_msi_desc(entry->irq, NULL);
117 msi_bitmap_free_hwirqs(&msi_data->bitmap,
118 virq_to_hw(entry->irq), 1);
119 irq_dispose_mapping(entry->irq);
125 static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
127 struct fsl_msi *fsl_msi_data)
129 struct fsl_msi *msi_data = fsl_msi_data;
130 struct pci_controller *hose = pci_bus_to_host(pdev->bus);
131 u64 address; /* Physical address of the MSIIR */
135 /* If the msi-address-64 property exists, then use it */
136 reg = of_get_property(hose->dn, "msi-address-64", &len);
137 if (reg && (len == sizeof(u64)))
138 address = be64_to_cpup(reg);
140 address = fsl_pci_immrbar_base(hose) + msi_data->msiir_offset;
142 msg->address_lo = lower_32_bits(address);
143 msg->address_hi = upper_32_bits(address);
147 pr_debug("%s: allocated srs: %d, ibs: %d\n",
148 __func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG);
151 static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
153 struct pci_controller *hose = pci_bus_to_host(pdev->bus);
154 struct device_node *np;
156 int rc, hwirq = -ENOMEM;
158 struct msi_desc *entry;
160 struct fsl_msi *msi_data;
163 * If the PCI node has an fsl,msi property, then we need to use it
164 * to find the specific MSI.
166 np = of_parse_phandle(hose->dn, "fsl,msi", 0);
168 if (of_device_is_compatible(np, "fsl,mpic-msi") ||
169 of_device_is_compatible(np, "fsl,vmpic-msi"))
170 phandle = np->phandle;
173 "node %s has an invalid fsl,msi phandle %u\n",
174 hose->dn->full_name, np->phandle);
179 list_for_each_entry(entry, &pdev->msi_list, list) {
181 * Loop over all the MSI devices until we find one that has an
182 * available interrupt.
184 list_for_each_entry(msi_data, &msi_head, list) {
186 * If the PCI node has an fsl,msi property, then we
187 * restrict our search to the corresponding MSI node.
188 * The simplest way is to skip over MSI nodes with the
189 * wrong phandle. Under the Freescale hypervisor, this
190 * has the additional benefit of skipping over MSI
191 * nodes that are not mapped in the PAMU.
193 if (phandle && (phandle != msi_data->phandle))
196 hwirq = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
203 dev_err(&pdev->dev, "could not allocate MSI interrupt\n");
207 virq = irq_create_mapping(msi_data->irqhost, hwirq);
209 if (virq == NO_IRQ) {
210 dev_err(&pdev->dev, "fail mapping hwirq %i\n", hwirq);
211 msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1);
215 /* chip_data is msi_data via host->hostdata in host->map() */
216 irq_set_msi_desc(virq, entry);
218 fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data);
219 write_msi_msg(virq, &msg);
224 /* free by the caller of this function */
228 static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
230 struct irq_chip *chip = irq_desc_get_chip(desc);
231 struct irq_data *idata = irq_desc_get_irq_data(desc);
232 unsigned int cascade_irq;
233 struct fsl_msi *msi_data;
238 struct fsl_msi_cascade_data *cascade_data;
241 cascade_data = irq_get_handler_data(irq);
242 msi_data = cascade_data->msi_data;
244 raw_spin_lock(&desc->lock);
245 if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
246 if (chip->irq_mask_ack)
247 chip->irq_mask_ack(idata);
249 chip->irq_mask(idata);
250 chip->irq_ack(idata);
254 if (unlikely(irqd_irq_inprogress(idata)))
257 msir_index = cascade_data->index;
259 if (msir_index >= NR_MSI_REG)
260 cascade_irq = NO_IRQ;
262 irqd_set_chained_irq_inprogress(idata);
263 switch (msi_data->feature & FSL_PIC_IP_MASK) {
264 case FSL_PIC_IP_MPIC:
265 msir_value = fsl_msi_read(msi_data->msi_regs,
268 case FSL_PIC_IP_IPIC:
269 msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4);
271 case FSL_PIC_IP_VMPIC:
272 ret = fh_vmpic_get_msir(virq_to_hw(irq), &msir_value);
274 pr_err("fsl-msi: fh_vmpic_get_msir() failed for "
275 "irq %u (ret=%u)\n", irq, ret);
282 intr_index = ffs(msir_value) - 1;
284 cascade_irq = irq_linear_revmap(msi_data->irqhost,
285 msir_index * IRQS_PER_MSI_REG +
286 intr_index + have_shift);
287 if (cascade_irq != NO_IRQ)
288 generic_handle_irq(cascade_irq);
289 have_shift += intr_index + 1;
290 msir_value = msir_value >> (intr_index + 1);
292 irqd_clr_chained_irq_inprogress(idata);
294 switch (msi_data->feature & FSL_PIC_IP_MASK) {
295 case FSL_PIC_IP_MPIC:
296 case FSL_PIC_IP_VMPIC:
297 chip->irq_eoi(idata);
299 case FSL_PIC_IP_IPIC:
300 if (!irqd_irq_disabled(idata) && chip->irq_unmask)
301 chip->irq_unmask(idata);
305 raw_spin_unlock(&desc->lock);
308 static int fsl_of_msi_remove(struct platform_device *ofdev)
310 struct fsl_msi *msi = platform_get_drvdata(ofdev);
312 struct fsl_msi_cascade_data *cascade_data;
314 if (msi->list.prev != NULL)
315 list_del(&msi->list);
316 for (i = 0; i < NR_MSI_REG; i++) {
317 virq = msi->msi_virqs[i];
318 if (virq != NO_IRQ) {
319 cascade_data = irq_get_handler_data(virq);
321 irq_dispose_mapping(virq);
324 if (msi->bitmap.bitmap)
325 msi_bitmap_free(&msi->bitmap);
326 if ((msi->feature & FSL_PIC_IP_MASK) != FSL_PIC_IP_VMPIC)
327 iounmap(msi->msi_regs);
333 static int __devinit fsl_msi_setup_hwirq(struct fsl_msi *msi,
334 struct platform_device *dev,
335 int offset, int irq_index)
337 struct fsl_msi_cascade_data *cascade_data = NULL;
340 virt_msir = irq_of_parse_and_map(dev->dev.of_node, irq_index);
341 if (virt_msir == NO_IRQ) {
342 dev_err(&dev->dev, "%s: Cannot translate IRQ index %d\n",
343 __func__, irq_index);
347 cascade_data = kzalloc(sizeof(struct fsl_msi_cascade_data), GFP_KERNEL);
349 dev_err(&dev->dev, "No memory for MSI cascade data\n");
353 msi->msi_virqs[irq_index] = virt_msir;
354 cascade_data->index = offset;
355 cascade_data->msi_data = msi;
356 irq_set_handler_data(virt_msir, cascade_data);
357 irq_set_chained_handler(virt_msir, fsl_msi_cascade);
362 static const struct of_device_id fsl_of_msi_ids[];
363 static int __devinit fsl_of_msi_probe(struct platform_device *dev)
365 const struct of_device_id *match;
368 int err, i, j, irq_index, count;
371 struct fsl_msi_feature *features;
374 static const u32 all_avail[] = { 0, NR_MSI_IRQS };
376 match = of_match_device(fsl_of_msi_ids, &dev->dev);
379 features = match->data;
381 printk(KERN_DEBUG "Setting up Freescale MSI support\n");
383 msi = kzalloc(sizeof(struct fsl_msi), GFP_KERNEL);
385 dev_err(&dev->dev, "No memory for MSI structure\n");
388 platform_set_drvdata(dev, msi);
390 msi->irqhost = irq_alloc_host(dev->dev.of_node, IRQ_HOST_MAP_LINEAR,
391 NR_MSI_IRQS, &fsl_msi_host_ops, 0);
393 if (msi->irqhost == NULL) {
394 dev_err(&dev->dev, "No memory for MSI irqhost\n");
400 * Under the Freescale hypervisor, the msi nodes don't have a 'reg'
401 * property. Instead, we use hypercalls to access the MSI.
403 if ((features->fsl_pic_ip & FSL_PIC_IP_MASK) != FSL_PIC_IP_VMPIC) {
404 err = of_address_to_resource(dev->dev.of_node, 0, &res);
406 dev_err(&dev->dev, "invalid resource for node %s\n",
407 dev->dev.of_node->full_name);
411 msi->msi_regs = ioremap(res.start, resource_size(&res));
412 if (!msi->msi_regs) {
414 dev_err(&dev->dev, "could not map node %s\n",
415 dev->dev.of_node->full_name);
419 features->msiir_offset + (res.start & 0xfffff);
422 msi->feature = features->fsl_pic_ip;
424 msi->irqhost->host_data = msi;
427 * Remember the phandle, so that we can match with any PCI nodes
428 * that have an "fsl,msi" property.
430 msi->phandle = dev->dev.of_node->phandle;
432 rc = fsl_msi_init_allocator(msi);
434 dev_err(&dev->dev, "Error allocating MSI bitmap\n");
438 p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len);
439 if (p && len % (2 * sizeof(u32)) != 0) {
440 dev_err(&dev->dev, "%s: Malformed msi-available-ranges property\n",
448 len = sizeof(all_avail);
451 for (irq_index = 0, i = 0; i < len / (2 * sizeof(u32)); i++) {
452 if (p[i * 2] % IRQS_PER_MSI_REG ||
453 p[i * 2 + 1] % IRQS_PER_MSI_REG) {
454 printk(KERN_WARNING "%s: %s: msi available range of %u at %u is not IRQ-aligned\n",
455 __func__, dev->dev.of_node->full_name,
456 p[i * 2 + 1], p[i * 2]);
461 offset = p[i * 2] / IRQS_PER_MSI_REG;
462 count = p[i * 2 + 1] / IRQS_PER_MSI_REG;
464 for (j = 0; j < count; j++, irq_index++) {
465 err = fsl_msi_setup_hwirq(msi, dev, offset + j, irq_index);
471 list_add_tail(&msi->list, &msi_head);
473 /* The multiple setting ppc_md.setup_msi_irqs will not harm things */
474 if (!ppc_md.setup_msi_irqs) {
475 ppc_md.setup_msi_irqs = fsl_setup_msi_irqs;
476 ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs;
477 ppc_md.msi_check_device = fsl_msi_check_device;
478 } else if (ppc_md.setup_msi_irqs != fsl_setup_msi_irqs) {
479 dev_err(&dev->dev, "Different MSI driver already installed!\n");
485 fsl_of_msi_remove(dev);
489 static const struct fsl_msi_feature mpic_msi_feature = {
490 .fsl_pic_ip = FSL_PIC_IP_MPIC,
491 .msiir_offset = 0x140,
494 static const struct fsl_msi_feature ipic_msi_feature = {
495 .fsl_pic_ip = FSL_PIC_IP_IPIC,
496 .msiir_offset = 0x38,
499 static const struct fsl_msi_feature vmpic_msi_feature = {
500 .fsl_pic_ip = FSL_PIC_IP_VMPIC,
504 static const struct of_device_id fsl_of_msi_ids[] = {
506 .compatible = "fsl,mpic-msi",
507 .data = (void *)&mpic_msi_feature,
510 .compatible = "fsl,ipic-msi",
511 .data = (void *)&ipic_msi_feature,
514 .compatible = "fsl,vmpic-msi",
515 .data = (void *)&vmpic_msi_feature,
520 static struct platform_driver fsl_of_msi_driver = {
523 .owner = THIS_MODULE,
524 .of_match_table = fsl_of_msi_ids,
526 .probe = fsl_of_msi_probe,
527 .remove = fsl_of_msi_remove,
530 static __init int fsl_of_msi_init(void)
532 return platform_driver_register(&fsl_of_msi_driver);
535 subsys_initcall(fsl_of_msi_init);