4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
6 * 2006 (c) MontaVista Software, Inc.
7 * Vitaly Bordug <vbordug@ru.mvista.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/stddef.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/errno.h>
19 #include <linux/major.h>
20 #include <linux/delay.h>
21 #include <linux/irq.h>
22 #include <linux/module.h>
23 #include <linux/device.h>
24 #include <linux/platform_device.h>
26 #include <linux/of_platform.h>
27 #include <linux/phy.h>
28 #include <linux/phy_fixed.h>
29 #include <linux/spi/spi.h>
30 #include <linux/fsl_devices.h>
31 #include <linux/fs_enet_pd.h>
32 #include <linux/fs_uart_pd.h>
34 #include <asm/system.h>
35 #include <asm/atomic.h>
40 #include <sysdev/fsl_soc.h>
41 #include <mm/mmu_decl.h>
44 extern void init_fcc_ioports(struct fs_platform_info*);
45 extern void init_fec_ioports(struct fs_platform_info*);
46 extern void init_smc_ioports(struct fs_uart_platform_info*);
47 static phys_addr_t immrbase = -1;
49 phys_addr_t get_immrbase(void)
51 struct device_node *soc;
56 soc = of_find_node_by_type(NULL, "soc");
60 const u32 *prop = of_get_property(soc, "#address-cells", &size);
62 if (prop && size == 4)
67 prop = of_get_property(soc, "ranges", &size);
69 immrbase = of_translate_address(soc, prop + naddr);
77 EXPORT_SYMBOL(get_immrbase);
79 static u32 sysfreq = -1;
81 u32 fsl_get_sys_freq(void)
83 struct device_node *soc;
90 soc = of_find_node_by_type(NULL, "soc");
94 prop = of_get_property(soc, "clock-frequency", &size);
95 if (!prop || size != sizeof(*prop) || *prop == 0)
96 prop = of_get_property(soc, "bus-frequency", &size);
98 if (prop && size == sizeof(*prop))
104 EXPORT_SYMBOL(fsl_get_sys_freq);
106 #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
108 static u32 brgfreq = -1;
110 u32 get_brgfreq(void)
112 struct device_node *node;
113 const unsigned int *prop;
119 node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
121 prop = of_get_property(node, "clock-frequency", &size);
122 if (prop && size == 4)
129 /* Legacy device binding -- will go away when no users are left. */
130 node = of_find_node_by_type(NULL, "cpm");
132 node = of_find_compatible_node(NULL, NULL, "fsl,qe");
134 node = of_find_node_by_type(NULL, "qe");
137 prop = of_get_property(node, "brg-frequency", &size);
138 if (prop && size == 4)
141 if (brgfreq == -1 || brgfreq == 0) {
142 prop = of_get_property(node, "bus-frequency", &size);
143 if (prop && size == 4)
152 EXPORT_SYMBOL(get_brgfreq);
154 static u32 fs_baudrate = -1;
156 u32 get_baudrate(void)
158 struct device_node *node;
160 if (fs_baudrate != -1)
163 node = of_find_node_by_type(NULL, "serial");
166 const unsigned int *prop = of_get_property(node,
167 "current-speed", &size);
177 EXPORT_SYMBOL(get_baudrate);
178 #endif /* CONFIG_CPM2 */
180 #ifdef CONFIG_FIXED_PHY
181 static int __init of_add_fixed_phys(void)
184 struct device_node *np;
186 struct fixed_phy_status status = {};
188 for_each_node_by_name(np, "ethernet") {
189 fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
194 status.duplex = fixed_link[1];
195 status.speed = fixed_link[2];
196 status.pause = fixed_link[3];
197 status.asym_pause = fixed_link[4];
199 ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
208 arch_initcall(of_add_fixed_phys);
209 #endif /* CONFIG_FIXED_PHY */
211 #ifdef CONFIG_PPC_83xx
212 static int __init mpc83xx_wdt_init(void)
215 struct device_node *np;
216 struct platform_device *dev;
217 u32 freq = fsl_get_sys_freq();
220 np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
227 memset(&r, 0, sizeof(r));
229 ret = of_address_to_resource(np, 0, &r);
233 dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
239 ret = platform_device_add_data(dev, &freq, sizeof(freq));
247 platform_device_unregister(dev);
254 arch_initcall(mpc83xx_wdt_init);
257 static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
260 return FSL_USB2_PHY_NONE;
261 if (!strcasecmp(phy_type, "ulpi"))
262 return FSL_USB2_PHY_ULPI;
263 if (!strcasecmp(phy_type, "utmi"))
264 return FSL_USB2_PHY_UTMI;
265 if (!strcasecmp(phy_type, "utmi_wide"))
266 return FSL_USB2_PHY_UTMI_WIDE;
267 if (!strcasecmp(phy_type, "serial"))
268 return FSL_USB2_PHY_SERIAL;
270 return FSL_USB2_PHY_NONE;
273 static int __init fsl_usb_of_init(void)
275 struct device_node *np;
277 struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
278 *usb_dev_dr_client = NULL;
281 for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
282 struct resource r[2];
283 struct fsl_usb2_platform_data usb_data;
284 const unsigned char *prop = NULL;
286 memset(&r, 0, sizeof(r));
287 memset(&usb_data, 0, sizeof(usb_data));
289 ret = of_address_to_resource(np, 0, &r[0]);
293 of_irq_to_resource(np, 0, &r[1]);
296 platform_device_register_simple("fsl-ehci", i, r, 2);
297 if (IS_ERR(usb_dev_mph)) {
298 ret = PTR_ERR(usb_dev_mph);
302 usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
303 usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
305 usb_data.operating_mode = FSL_USB2_MPH_HOST;
307 prop = of_get_property(np, "port0", NULL);
309 usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
311 prop = of_get_property(np, "port1", NULL);
313 usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
315 prop = of_get_property(np, "phy_type", NULL);
316 usb_data.phy_mode = determine_usb_phy(prop);
319 platform_device_add_data(usb_dev_mph, &usb_data,
321 fsl_usb2_platform_data));
327 for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
328 struct resource r[2];
329 struct fsl_usb2_platform_data usb_data;
330 const unsigned char *prop = NULL;
332 if (!of_device_is_available(np))
335 memset(&r, 0, sizeof(r));
336 memset(&usb_data, 0, sizeof(usb_data));
338 ret = of_address_to_resource(np, 0, &r[0]);
342 of_irq_to_resource(np, 0, &r[1]);
344 prop = of_get_property(np, "dr_mode", NULL);
346 if (!prop || !strcmp(prop, "host")) {
347 usb_data.operating_mode = FSL_USB2_DR_HOST;
348 usb_dev_dr_host = platform_device_register_simple(
349 "fsl-ehci", i, r, 2);
350 if (IS_ERR(usb_dev_dr_host)) {
351 ret = PTR_ERR(usb_dev_dr_host);
354 } else if (prop && !strcmp(prop, "peripheral")) {
355 usb_data.operating_mode = FSL_USB2_DR_DEVICE;
356 usb_dev_dr_client = platform_device_register_simple(
357 "fsl-usb2-udc", i, r, 2);
358 if (IS_ERR(usb_dev_dr_client)) {
359 ret = PTR_ERR(usb_dev_dr_client);
362 } else if (prop && !strcmp(prop, "otg")) {
363 usb_data.operating_mode = FSL_USB2_DR_OTG;
364 usb_dev_dr_host = platform_device_register_simple(
365 "fsl-ehci", i, r, 2);
366 if (IS_ERR(usb_dev_dr_host)) {
367 ret = PTR_ERR(usb_dev_dr_host);
370 usb_dev_dr_client = platform_device_register_simple(
371 "fsl-usb2-udc", i, r, 2);
372 if (IS_ERR(usb_dev_dr_client)) {
373 ret = PTR_ERR(usb_dev_dr_client);
381 prop = of_get_property(np, "phy_type", NULL);
382 usb_data.phy_mode = determine_usb_phy(prop);
384 if (usb_dev_dr_host) {
385 usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
386 usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
387 dev.coherent_dma_mask;
388 if ((ret = platform_device_add_data(usb_dev_dr_host,
389 &usb_data, sizeof(struct
390 fsl_usb2_platform_data))))
393 if (usb_dev_dr_client) {
394 usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
395 usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
396 dev.coherent_dma_mask;
397 if ((ret = platform_device_add_data(usb_dev_dr_client,
398 &usb_data, sizeof(struct
399 fsl_usb2_platform_data))))
408 platform_device_unregister(usb_dev_dr_host);
409 if (usb_dev_dr_client)
410 platform_device_unregister(usb_dev_dr_client);
413 platform_device_unregister(usb_dev_mph);
418 arch_initcall(fsl_usb_of_init);
420 #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
421 static __be32 __iomem *rstcr;
423 static int __init setup_rstcr(void)
425 struct device_node *np;
426 np = of_find_node_by_name(NULL, "global-utilities");
427 if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
428 const u32 *prop = of_get_property(np, "reg", NULL);
430 /* map reset control register
431 * 0xE00B0 is offset of reset control register
433 rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
435 printk (KERN_EMERG "Error: reset control "
436 "register not mapped!\n");
439 printk (KERN_INFO "rstcr compatible register does not exist!\n");
445 arch_initcall(setup_rstcr);
447 void fsl_rstcr_restart(char *cmd)
451 /* set reset control register */
452 out_be32(rstcr, 0x2); /* HRESET_REQ */
458 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
459 struct platform_diu_data_ops diu_ops;
460 EXPORT_SYMBOL(diu_ops);