1 #ifndef __PPC_FSL_SOC_H
2 #define __PPC_FSL_SOC_H
9 extern phys_addr_t get_immrbase(void);
10 #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
11 extern u32 get_brgfreq(void);
12 extern u32 get_baudrate(void);
14 static inline u32 get_brgfreq(void) { return -1; }
15 static inline u32 get_baudrate(void) { return -1; }
17 extern u32 fsl_get_sys_freq(void);
19 struct spi_board_info;
22 /* The different ports that the DIU can be connected to */
23 enum fsl_diu_monitor_port {
24 FSL_DIU_PORT_DVI, /* DVI */
25 FSL_DIU_PORT_LVDS, /* Single-link LVDS */
26 FSL_DIU_PORT_DLVDS /* Dual-link LVDS */
29 struct platform_diu_data_ops {
30 u32 (*get_pixel_format)(enum fsl_diu_monitor_port port,
32 void (*set_gamma_table)(enum fsl_diu_monitor_port port,
33 char *gamma_table_base);
34 void (*set_monitor_port)(enum fsl_diu_monitor_port port);
35 void (*set_pixel_clock)(unsigned int pixclock);
36 enum fsl_diu_monitor_port (*valid_monitor_port)
37 (enum fsl_diu_monitor_port port);
38 void (*release_bootmem)(void);
41 extern struct platform_diu_data_ops diu_ops;
43 void __noreturn fsl_hv_restart(char *cmd);
44 void __noreturn fsl_hv_halt(void);