3 * Copyright IBM Corp. 1999, 2000
4 * Author(s): Hartmut Penner (hp@de.ibm.com)
5 * Ulrich Weigand (weigand@de.ibm.com)
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Derived from "include/asm-i386/pgtable.h"
11 #ifndef _ASM_S390_PGTABLE_H
12 #define _ASM_S390_PGTABLE_H
15 * The Linux memory management assumes a three-level page table setup. For
16 * s390 31 bit we "fold" the mid level into the top-level page table, so
17 * that we physically have the same two-level page table as the s390 mmu
18 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
19 * the hardware provides (region first and region second tables are not
22 * The "pgd_xxx()" functions are trivial for a folded two-level
23 * setup: the pgd is never bad, and a pmd always exists (as it's folded
26 * This file contains the functions and defines necessary to modify and use
27 * the S390 page table tree.
30 #include <linux/sched.h>
31 #include <linux/mm_types.h>
35 extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
36 extern void paging_init(void);
37 extern void vmem_map_init(void);
38 extern void fault_init(void);
41 * The S390 doesn't have any external MMU info: the kernel page
42 * tables contain all the necessary information.
44 #define update_mmu_cache(vma, address, ptep) do { } while (0)
47 * ZERO_PAGE is a global shared page that is always zero; used
48 * for zero-mapped memory areas etc..
51 extern unsigned long empty_zero_page;
52 extern unsigned long zero_page_mask;
54 #define ZERO_PAGE(vaddr) \
55 (virt_to_page((void *)(empty_zero_page + \
56 (((unsigned long)(vaddr)) &zero_page_mask))))
58 #define is_zero_pfn is_zero_pfn
59 static inline int is_zero_pfn(unsigned long pfn)
61 extern unsigned long zero_pfn;
62 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
63 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
66 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
68 #endif /* !__ASSEMBLY__ */
71 * PMD_SHIFT determines the size of the area a second-level page
73 * PGDIR_SHIFT determines what a third-level page table entry can map
78 # define PGDIR_SHIFT 20
79 #else /* CONFIG_64BIT */
82 # define PGDIR_SHIFT 42
83 #endif /* CONFIG_64BIT */
85 #define PMD_SIZE (1UL << PMD_SHIFT)
86 #define PMD_MASK (~(PMD_SIZE-1))
87 #define PUD_SIZE (1UL << PUD_SHIFT)
88 #define PUD_MASK (~(PUD_SIZE-1))
89 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
90 #define PGDIR_MASK (~(PGDIR_SIZE-1))
93 * entries per page directory level: the S390 is two-level, so
94 * we don't really have any PMD directory physically.
95 * for S390 segment-table entries are combined to one PGD
96 * that leads to 1024 pte per pgd
98 #define PTRS_PER_PTE 256
100 #define PTRS_PER_PMD 1
101 #define PTRS_PER_PUD 1
102 #else /* CONFIG_64BIT */
103 #define PTRS_PER_PMD 2048
104 #define PTRS_PER_PUD 2048
105 #endif /* CONFIG_64BIT */
106 #define PTRS_PER_PGD 2048
108 #define FIRST_USER_ADDRESS 0
110 #define pte_ERROR(e) \
111 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
112 #define pmd_ERROR(e) \
113 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
114 #define pud_ERROR(e) \
115 printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
116 #define pgd_ERROR(e) \
117 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
121 * The vmalloc area will always be on the topmost area of the kernel
122 * mapping. We reserve 96MB (31bit) / 128GB (64bit) for vmalloc,
123 * which should be enough for any sane case.
124 * By putting vmalloc at the top, we maximise the gap between physical
125 * memory and vmalloc to catch misplaced memory accesses. As a side
126 * effect, this also makes sure that 64 bit module code cannot be used
127 * as system call address.
129 extern unsigned long VMALLOC_START;
130 extern unsigned long VMALLOC_END;
131 extern struct page *vmemmap;
133 #define VMEM_MAX_PHYS ((unsigned long) vmemmap)
136 * A 31 bit pagetable entry of S390 has following format:
139 * 00000000001111111111222222222233
140 * 01234567890123456789012345678901
142 * I Page-Invalid Bit: Page is not available for address-translation
143 * P Page-Protection Bit: Store access not possible for page
145 * A 31 bit segmenttable entry of S390 has following format:
146 * | P-table origin | |PTL
148 * 00000000001111111111222222222233
149 * 01234567890123456789012345678901
151 * I Segment-Invalid Bit: Segment is not available for address-translation
152 * C Common-Segment Bit: Segment is not private (PoP 3-30)
153 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
155 * The 31 bit segmenttable origin of S390 has following format:
157 * |S-table origin | | STL |
159 * 00000000001111111111222222222233
160 * 01234567890123456789012345678901
162 * X Space-Switch event:
163 * G Segment-Invalid Bit: *
164 * P Private-Space Bit: Segment is not private (PoP 3-30)
165 * S Storage-Alteration:
166 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
168 * A 64 bit pagetable entry of S390 has following format:
170 * 0000000000111111111122222222223333333333444444444455555555556666
171 * 0123456789012345678901234567890123456789012345678901234567890123
173 * I Page-Invalid Bit: Page is not available for address-translation
174 * P Page-Protection Bit: Store access not possible for page
175 * C Change-bit override: HW is not required to set change bit
177 * A 64 bit segmenttable entry of S390 has following format:
178 * | P-table origin | TT
179 * 0000000000111111111122222222223333333333444444444455555555556666
180 * 0123456789012345678901234567890123456789012345678901234567890123
182 * I Segment-Invalid Bit: Segment is not available for address-translation
183 * C Common-Segment Bit: Segment is not private (PoP 3-30)
184 * P Page-Protection Bit: Store access not possible for page
187 * A 64 bit region table entry of S390 has following format:
188 * | S-table origin | TF TTTL
189 * 0000000000111111111122222222223333333333444444444455555555556666
190 * 0123456789012345678901234567890123456789012345678901234567890123
192 * I Segment-Invalid Bit: Segment is not available for address-translation
197 * The 64 bit regiontable origin of S390 has following format:
198 * | region table origon | DTTL
199 * 0000000000111111111122222222223333333333444444444455555555556666
200 * 0123456789012345678901234567890123456789012345678901234567890123
202 * X Space-Switch event:
203 * G Segment-Invalid Bit:
204 * P Private-Space Bit:
205 * S Storage-Alteration:
209 * A storage key has the following format:
213 * F : fetch protection bit
218 /* Hardware bits in the page table entry */
219 #define _PAGE_CO 0x100 /* HW Change-bit override */
220 #define _PAGE_RO 0x200 /* HW read-only bit */
221 #define _PAGE_INVALID 0x400 /* HW invalid bit */
223 /* Software bits in the page table entry */
224 #define _PAGE_SWT 0x001 /* SW pte type bit t */
225 #define _PAGE_SWX 0x002 /* SW pte type bit x */
226 #define _PAGE_SWC 0x004 /* SW pte changed bit (for KVM) */
227 #define _PAGE_SWR 0x008 /* SW pte referenced bit (for KVM) */
228 #define _PAGE_SPECIAL 0x010 /* SW associated with special page */
229 #define __HAVE_ARCH_PTE_SPECIAL
231 /* Set of bits not changed in pte_modify */
232 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL | _PAGE_SWC | _PAGE_SWR)
234 /* Six different types of pages. */
235 #define _PAGE_TYPE_EMPTY 0x400
236 #define _PAGE_TYPE_NONE 0x401
237 #define _PAGE_TYPE_SWAP 0x403
238 #define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */
239 #define _PAGE_TYPE_RO 0x200
240 #define _PAGE_TYPE_RW 0x000
243 * Only four types for huge pages, using the invalid bit and protection bit
244 * of a segment table entry.
246 #define _HPAGE_TYPE_EMPTY 0x020 /* _SEGMENT_ENTRY_INV */
247 #define _HPAGE_TYPE_NONE 0x220
248 #define _HPAGE_TYPE_RO 0x200 /* _SEGMENT_ENTRY_RO */
249 #define _HPAGE_TYPE_RW 0x000
252 * PTE type bits are rather complicated. handle_pte_fault uses pte_present,
253 * pte_none and pte_file to find out the pte type WITHOUT holding the page
254 * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to
255 * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs
256 * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards.
257 * This change is done while holding the lock, but the intermediate step
258 * of a previously valid pte with the hw invalid bit set can be observed by
259 * handle_pte_fault. That makes it necessary that all valid pte types with
260 * the hw invalid bit set must be distinguishable from the four pte types
261 * empty, none, swap and file.
264 * _PAGE_TYPE_EMPTY 1000 -> 1000
265 * _PAGE_TYPE_NONE 1001 -> 1001
266 * _PAGE_TYPE_SWAP 1011 -> 1011
267 * _PAGE_TYPE_FILE 11?1 -> 11?1
268 * _PAGE_TYPE_RO 0100 -> 1100
269 * _PAGE_TYPE_RW 0000 -> 1000
271 * pte_none is true for bits combinations 1000, 1010, 1100, 1110
272 * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001
273 * pte_file is true for bits combinations 1101, 1111
274 * swap pte is 1011 and 0001, 0011, 0101, 0111 are invalid.
279 /* Bits in the segment table address-space-control-element */
280 #define _ASCE_SPACE_SWITCH 0x80000000UL /* space switch event */
281 #define _ASCE_ORIGIN_MASK 0x7ffff000UL /* segment table origin */
282 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
283 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
284 #define _ASCE_TABLE_LENGTH 0x7f /* 128 x 64 entries = 8k */
286 /* Bits in the segment table entry */
287 #define _SEGMENT_ENTRY_ORIGIN 0x7fffffc0UL /* page table origin */
288 #define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
289 #define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
290 #define _SEGMENT_ENTRY_COMMON 0x10 /* common segment bit */
291 #define _SEGMENT_ENTRY_PTL 0x0f /* page table length */
293 #define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PTL)
294 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
296 /* Page status table bits for virtualization */
297 #define RCP_ACC_BITS 0xf0000000UL
298 #define RCP_FP_BIT 0x08000000UL
299 #define RCP_PCL_BIT 0x00800000UL
300 #define RCP_HR_BIT 0x00400000UL
301 #define RCP_HC_BIT 0x00200000UL
302 #define RCP_GR_BIT 0x00040000UL
303 #define RCP_GC_BIT 0x00020000UL
305 /* User dirty / referenced bit for KVM's migration feature */
306 #define KVM_UR_BIT 0x00008000UL
307 #define KVM_UC_BIT 0x00004000UL
309 #else /* CONFIG_64BIT */
311 /* Bits in the segment/region table address-space-control-element */
312 #define _ASCE_ORIGIN ~0xfffUL/* segment table origin */
313 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
314 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
315 #define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
316 #define _ASCE_REAL_SPACE 0x20 /* real space control */
317 #define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
318 #define _ASCE_TYPE_REGION1 0x0c /* region first table type */
319 #define _ASCE_TYPE_REGION2 0x08 /* region second table type */
320 #define _ASCE_TYPE_REGION3 0x04 /* region third table type */
321 #define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
322 #define _ASCE_TABLE_LENGTH 0x03 /* region table length */
324 /* Bits in the region table entry */
325 #define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */
326 #define _REGION_ENTRY_INV 0x20 /* invalid region table entry */
327 #define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
328 #define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
329 #define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
330 #define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
331 #define _REGION_ENTRY_LENGTH 0x03 /* region third length */
333 #define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
334 #define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INV)
335 #define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
336 #define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INV)
337 #define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
338 #define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INV)
340 /* Bits in the segment table entry */
341 #define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* segment table origin */
342 #define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
343 #define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
345 #define _SEGMENT_ENTRY (0)
346 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
348 #define _SEGMENT_ENTRY_LARGE 0x400 /* STE-format control, large page */
349 #define _SEGMENT_ENTRY_CO 0x100 /* change-recording override */
350 #define _SEGMENT_ENTRY_SPLIT_BIT 0 /* THP splitting bit number */
351 #define _SEGMENT_ENTRY_SPLIT (1UL << _SEGMENT_ENTRY_SPLIT_BIT)
353 /* Page status table bits for virtualization */
354 #define RCP_ACC_BITS 0xf000000000000000UL
355 #define RCP_FP_BIT 0x0800000000000000UL
356 #define RCP_PCL_BIT 0x0080000000000000UL
357 #define RCP_HR_BIT 0x0040000000000000UL
358 #define RCP_HC_BIT 0x0020000000000000UL
359 #define RCP_GR_BIT 0x0004000000000000UL
360 #define RCP_GC_BIT 0x0002000000000000UL
362 /* User dirty / referenced bit for KVM's migration feature */
363 #define KVM_UR_BIT 0x0000800000000000UL
364 #define KVM_UC_BIT 0x0000400000000000UL
366 #endif /* CONFIG_64BIT */
369 * A user page table pointer has the space-switch-event bit, the
370 * private-space-control bit and the storage-alteration-event-control
371 * bit set. A kernel page table pointer doesn't need them.
373 #define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
377 * Page protection definitions.
379 #define PAGE_NONE __pgprot(_PAGE_TYPE_NONE)
380 #define PAGE_RO __pgprot(_PAGE_TYPE_RO)
381 #define PAGE_RW __pgprot(_PAGE_TYPE_RW)
383 #define PAGE_KERNEL PAGE_RW
384 #define PAGE_COPY PAGE_RO
387 * On s390 the page table entry has an invalid bit and a read-only bit.
388 * Read permission implies execute permission and write permission
389 * implies read permission.
392 #define __P000 PAGE_NONE
393 #define __P001 PAGE_RO
394 #define __P010 PAGE_RO
395 #define __P011 PAGE_RO
396 #define __P100 PAGE_RO
397 #define __P101 PAGE_RO
398 #define __P110 PAGE_RO
399 #define __P111 PAGE_RO
401 #define __S000 PAGE_NONE
402 #define __S001 PAGE_RO
403 #define __S010 PAGE_RW
404 #define __S011 PAGE_RW
405 #define __S100 PAGE_RO
406 #define __S101 PAGE_RO
407 #define __S110 PAGE_RW
408 #define __S111 PAGE_RW
410 static inline int mm_exclusive(struct mm_struct *mm)
412 return likely(mm == current->active_mm &&
413 atomic_read(&mm->context.attach_count) <= 1);
416 static inline int mm_has_pgste(struct mm_struct *mm)
419 if (unlikely(mm->context.has_pgste))
425 * pgd/pmd/pte query functions
429 static inline int pgd_present(pgd_t pgd) { return 1; }
430 static inline int pgd_none(pgd_t pgd) { return 0; }
431 static inline int pgd_bad(pgd_t pgd) { return 0; }
433 static inline int pud_present(pud_t pud) { return 1; }
434 static inline int pud_none(pud_t pud) { return 0; }
435 static inline int pud_bad(pud_t pud) { return 0; }
437 #else /* CONFIG_64BIT */
439 static inline int pgd_present(pgd_t pgd)
441 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
443 return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL;
446 static inline int pgd_none(pgd_t pgd)
448 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
450 return (pgd_val(pgd) & _REGION_ENTRY_INV) != 0UL;
453 static inline int pgd_bad(pgd_t pgd)
456 * With dynamic page table levels the pgd can be a region table
457 * entry or a segment table entry. Check for the bit that are
458 * invalid for either table entry.
461 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
462 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
463 return (pgd_val(pgd) & mask) != 0;
466 static inline int pud_present(pud_t pud)
468 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
470 return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
473 static inline int pud_none(pud_t pud)
475 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
477 return (pud_val(pud) & _REGION_ENTRY_INV) != 0UL;
480 static inline int pud_bad(pud_t pud)
483 * With dynamic page table levels the pud can be a region table
484 * entry or a segment table entry. Check for the bit that are
485 * invalid for either table entry.
488 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
489 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
490 return (pud_val(pud) & mask) != 0;
493 #endif /* CONFIG_64BIT */
495 static inline int pmd_present(pmd_t pmd)
497 return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL;
500 static inline int pmd_none(pmd_t pmd)
502 return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL;
505 static inline int pmd_bad(pmd_t pmd)
507 unsigned long mask = ~_SEGMENT_ENTRY_ORIGIN & ~_SEGMENT_ENTRY_INV;
508 return (pmd_val(pmd) & mask) != _SEGMENT_ENTRY;
511 #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
512 extern void pmdp_splitting_flush(struct vm_area_struct *vma,
513 unsigned long addr, pmd_t *pmdp);
515 static inline int pte_none(pte_t pte)
517 return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
520 static inline int pte_present(pte_t pte)
522 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX;
523 return (pte_val(pte) & mask) == _PAGE_TYPE_NONE ||
524 (!(pte_val(pte) & _PAGE_INVALID) &&
525 !(pte_val(pte) & _PAGE_SWT));
528 static inline int pte_file(pte_t pte)
530 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT;
531 return (pte_val(pte) & mask) == _PAGE_TYPE_FILE;
534 static inline int pte_special(pte_t pte)
536 return (pte_val(pte) & _PAGE_SPECIAL);
539 #define __HAVE_ARCH_PTE_SAME
540 static inline int pte_same(pte_t a, pte_t b)
542 return pte_val(a) == pte_val(b);
545 static inline pgste_t pgste_get_lock(pte_t *ptep)
547 unsigned long new = 0;
555 " nihh %0,0xff7f\n" /* clear RCP_PCL_BIT in old */
556 " oihh %1,0x0080\n" /* set RCP_PCL_BIT in new */
559 : "=&d" (old), "=&d" (new), "=Q" (ptep[PTRS_PER_PTE])
560 : "Q" (ptep[PTRS_PER_PTE]) : "cc");
565 static inline void pgste_set_unlock(pte_t *ptep, pgste_t pgste)
569 " nihh %1,0xff7f\n" /* clear RCP_PCL_BIT */
571 : "=Q" (ptep[PTRS_PER_PTE])
572 : "d" (pgste_val(pgste)), "Q" (ptep[PTRS_PER_PTE]) : "cc");
577 static inline pgste_t pgste_update_all(pte_t *ptep, pgste_t pgste)
580 unsigned long address, bits;
583 if (!pte_present(*ptep))
585 address = pte_val(*ptep) & PAGE_MASK;
586 skey = page_get_storage_key(address);
587 bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED);
588 /* Clear page changed & referenced bit in the storage key */
589 if (bits & _PAGE_CHANGED)
590 page_set_storage_key(address, skey ^ bits, 1);
592 page_reset_referenced(address);
593 /* Transfer page changed & referenced bit to guest bits in pgste */
594 pgste_val(pgste) |= bits << 48; /* RCP_GR_BIT & RCP_GC_BIT */
595 /* Get host changed & referenced bits from pgste */
596 bits |= (pgste_val(pgste) & (RCP_HR_BIT | RCP_HC_BIT)) >> 52;
597 /* Clear host bits in pgste. */
598 pgste_val(pgste) &= ~(RCP_HR_BIT | RCP_HC_BIT);
599 pgste_val(pgste) &= ~(RCP_ACC_BITS | RCP_FP_BIT);
600 /* Copy page access key and fetch protection bit to pgste */
602 (unsigned long) (skey & (_PAGE_ACC_BITS | _PAGE_FP_BIT)) << 56;
603 /* Transfer changed and referenced to kvm user bits */
604 pgste_val(pgste) |= bits << 45; /* KVM_UR_BIT & KVM_UC_BIT */
605 /* Transfer changed & referenced to pte sofware bits */
606 pte_val(*ptep) |= bits << 1; /* _PAGE_SWR & _PAGE_SWC */
612 static inline pgste_t pgste_update_young(pte_t *ptep, pgste_t pgste)
617 if (!pte_present(*ptep))
619 young = page_reset_referenced(pte_val(*ptep) & PAGE_MASK);
620 /* Transfer page referenced bit to pte software bit (host view) */
621 if (young || (pgste_val(pgste) & RCP_HR_BIT))
622 pte_val(*ptep) |= _PAGE_SWR;
623 /* Clear host referenced bit in pgste. */
624 pgste_val(pgste) &= ~RCP_HR_BIT;
625 /* Transfer page referenced bit to guest bit in pgste */
626 pgste_val(pgste) |= (unsigned long) young << 50; /* set RCP_GR_BIT */
632 static inline void pgste_set_pte(pte_t *ptep, pgste_t pgste, pte_t entry)
635 unsigned long address;
636 unsigned long okey, nkey;
638 if (!pte_present(entry))
640 address = pte_val(entry) & PAGE_MASK;
641 okey = nkey = page_get_storage_key(address);
642 nkey &= ~(_PAGE_ACC_BITS | _PAGE_FP_BIT);
643 /* Set page access key and fetch protection bit from pgste */
644 nkey |= (pgste_val(pgste) & (RCP_ACC_BITS | RCP_FP_BIT)) >> 56;
646 page_set_storage_key(address, nkey, 1);
651 * struct gmap_struct - guest address space
652 * @mm: pointer to the parent mm_struct
653 * @table: pointer to the page directory
654 * @asce: address space control element for gmap page table
655 * @crst_list: list of all crst tables used in the guest address space
658 struct list_head list;
659 struct mm_struct *mm;
660 unsigned long *table;
662 struct list_head crst_list;
666 * struct gmap_rmap - reverse mapping for segment table entries
667 * @next: pointer to the next gmap_rmap structure in the list
668 * @entry: pointer to a segment table entry
671 struct list_head list;
672 unsigned long *entry;
676 * struct gmap_pgtable - gmap information attached to a page table
677 * @vmaddr: address of the 1MB segment in the process virtual memory
678 * @mapper: list of segment table entries maping a page table
680 struct gmap_pgtable {
681 unsigned long vmaddr;
682 struct list_head mapper;
685 struct gmap *gmap_alloc(struct mm_struct *mm);
686 void gmap_free(struct gmap *gmap);
687 void gmap_enable(struct gmap *gmap);
688 void gmap_disable(struct gmap *gmap);
689 int gmap_map_segment(struct gmap *gmap, unsigned long from,
690 unsigned long to, unsigned long length);
691 int gmap_unmap_segment(struct gmap *gmap, unsigned long to, unsigned long len);
692 unsigned long __gmap_fault(unsigned long address, struct gmap *);
693 unsigned long gmap_fault(unsigned long address, struct gmap *);
694 void gmap_discard(unsigned long from, unsigned long to, struct gmap *);
697 * Certain architectures need to do special things when PTEs
698 * within a page table are directly modified. Thus, the following
699 * hook is made available.
701 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
702 pte_t *ptep, pte_t entry)
706 if (mm_has_pgste(mm)) {
707 pgste = pgste_get_lock(ptep);
708 pgste_set_pte(ptep, pgste, entry);
710 pgste_set_unlock(ptep, pgste);
716 * query functions pte_write/pte_dirty/pte_young only work if
717 * pte_present() is true. Undefined behaviour if not..
719 static inline int pte_write(pte_t pte)
721 return (pte_val(pte) & _PAGE_RO) == 0;
724 static inline int pte_dirty(pte_t pte)
727 if (pte_val(pte) & _PAGE_SWC)
733 static inline int pte_young(pte_t pte)
736 if (pte_val(pte) & _PAGE_SWR)
743 * pgd/pmd/pte modification functions
746 static inline void pgd_clear(pgd_t *pgd)
749 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
750 pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;
754 static inline void pud_clear(pud_t *pud)
757 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
758 pud_val(*pud) = _REGION3_ENTRY_EMPTY;
762 static inline void pmd_clear(pmd_t *pmdp)
764 pmd_val(*pmdp) = _SEGMENT_ENTRY_EMPTY;
767 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
769 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
773 * The following pte modification functions only work if
774 * pte_present() is true. Undefined behaviour if not..
776 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
778 pte_val(pte) &= _PAGE_CHG_MASK;
779 pte_val(pte) |= pgprot_val(newprot);
783 static inline pte_t pte_wrprotect(pte_t pte)
785 /* Do not clobber _PAGE_TYPE_NONE pages! */
786 if (!(pte_val(pte) & _PAGE_INVALID))
787 pte_val(pte) |= _PAGE_RO;
791 static inline pte_t pte_mkwrite(pte_t pte)
793 pte_val(pte) &= ~_PAGE_RO;
797 static inline pte_t pte_mkclean(pte_t pte)
800 pte_val(pte) &= ~_PAGE_SWC;
805 static inline pte_t pte_mkdirty(pte_t pte)
810 static inline pte_t pte_mkold(pte_t pte)
813 pte_val(pte) &= ~_PAGE_SWR;
818 static inline pte_t pte_mkyoung(pte_t pte)
823 static inline pte_t pte_mkspecial(pte_t pte)
825 pte_val(pte) |= _PAGE_SPECIAL;
829 #ifdef CONFIG_HUGETLB_PAGE
830 static inline pte_t pte_mkhuge(pte_t pte)
833 * PROT_NONE needs to be remapped from the pte type to the ste type.
834 * The HW invalid bit is also different for pte and ste. The pte
835 * invalid bit happens to be the same as the ste _SEGMENT_ENTRY_LARGE
836 * bit, so we don't have to clear it.
838 if (pte_val(pte) & _PAGE_INVALID) {
839 if (pte_val(pte) & _PAGE_SWT)
840 pte_val(pte) |= _HPAGE_TYPE_NONE;
841 pte_val(pte) |= _SEGMENT_ENTRY_INV;
844 * Clear SW pte bits SWT and SWX, there are no SW bits in a segment
847 pte_val(pte) &= ~(_PAGE_SWT | _PAGE_SWX);
849 * Also set the change-override bit because we don't need dirty bit
850 * tracking for hugetlbfs pages.
852 pte_val(pte) |= (_SEGMENT_ENTRY_LARGE | _SEGMENT_ENTRY_CO);
858 * Get (and clear) the user dirty bit for a pte.
860 static inline int ptep_test_and_clear_user_dirty(struct mm_struct *mm,
866 if (mm_has_pgste(mm)) {
867 pgste = pgste_get_lock(ptep);
868 pgste = pgste_update_all(ptep, pgste);
869 dirty = !!(pgste_val(pgste) & KVM_UC_BIT);
870 pgste_val(pgste) &= ~KVM_UC_BIT;
871 pgste_set_unlock(ptep, pgste);
878 * Get (and clear) the user referenced bit for a pte.
880 static inline int ptep_test_and_clear_user_young(struct mm_struct *mm,
886 if (mm_has_pgste(mm)) {
887 pgste = pgste_get_lock(ptep);
888 pgste = pgste_update_young(ptep, pgste);
889 young = !!(pgste_val(pgste) & KVM_UR_BIT);
890 pgste_val(pgste) &= ~KVM_UR_BIT;
891 pgste_set_unlock(ptep, pgste);
896 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
897 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
898 unsigned long addr, pte_t *ptep)
903 if (mm_has_pgste(vma->vm_mm)) {
904 pgste = pgste_get_lock(ptep);
905 pgste = pgste_update_young(ptep, pgste);
907 *ptep = pte_mkold(pte);
908 pgste_set_unlock(ptep, pgste);
909 return pte_young(pte);
914 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
915 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
916 unsigned long address, pte_t *ptep)
918 /* No need to flush TLB
919 * On s390 reference bits are in storage key and never in TLB
920 * With virtualization we handle the reference bit, without we
921 * we can simply return */
922 return ptep_test_and_clear_young(vma, address, ptep);
925 static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
927 if (!(pte_val(*ptep) & _PAGE_INVALID)) {
929 /* pto must point to the start of the segment table */
930 pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
932 /* ipte in zarch mode can do the math */
937 : "=m" (*ptep) : "m" (*ptep),
938 "a" (pto), "a" (address));
943 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
944 * both clear the TLB for the unmapped pte. The reason is that
945 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
946 * to modify an active pte. The sequence is
947 * 1) ptep_get_and_clear
950 * On s390 the tlb needs to get flushed with the modification of the pte
951 * if the pte is active. The only way how this can be implemented is to
952 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
955 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
956 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
957 unsigned long address, pte_t *ptep)
962 mm->context.flush_mm = 1;
963 if (mm_has_pgste(mm))
964 pgste = pgste_get_lock(ptep);
967 if (!mm_exclusive(mm))
968 __ptep_ipte(address, ptep);
969 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
971 if (mm_has_pgste(mm)) {
972 pgste = pgste_update_all(&pte, pgste);
973 pgste_set_unlock(ptep, pgste);
978 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
979 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
980 unsigned long address,
985 mm->context.flush_mm = 1;
986 if (mm_has_pgste(mm))
987 pgste_get_lock(ptep);
990 if (!mm_exclusive(mm))
991 __ptep_ipte(address, ptep);
995 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
996 unsigned long address,
997 pte_t *ptep, pte_t pte)
1000 if (mm_has_pgste(mm))
1001 pgste_set_unlock(ptep, *(pgste_t *)(ptep + PTRS_PER_PTE));
1004 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
1005 static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
1006 unsigned long address, pte_t *ptep)
1011 if (mm_has_pgste(vma->vm_mm))
1012 pgste = pgste_get_lock(ptep);
1015 __ptep_ipte(address, ptep);
1016 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1018 if (mm_has_pgste(vma->vm_mm)) {
1019 pgste = pgste_update_all(&pte, pgste);
1020 pgste_set_unlock(ptep, pgste);
1026 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
1027 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
1028 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
1029 * cannot be accessed while the batched unmap is running. In this case
1030 * full==1 and a simple pte_clear is enough. See tlb.h.
1032 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1033 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1034 unsigned long address,
1035 pte_t *ptep, int full)
1040 if (mm_has_pgste(mm))
1041 pgste = pgste_get_lock(ptep);
1045 __ptep_ipte(address, ptep);
1046 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1048 if (mm_has_pgste(mm)) {
1049 pgste = pgste_update_all(&pte, pgste);
1050 pgste_set_unlock(ptep, pgste);
1055 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
1056 static inline pte_t ptep_set_wrprotect(struct mm_struct *mm,
1057 unsigned long address, pte_t *ptep)
1062 if (pte_write(pte)) {
1063 mm->context.flush_mm = 1;
1064 if (mm_has_pgste(mm))
1065 pgste = pgste_get_lock(ptep);
1067 if (!mm_exclusive(mm))
1068 __ptep_ipte(address, ptep);
1069 *ptep = pte_wrprotect(pte);
1071 if (mm_has_pgste(mm))
1072 pgste_set_unlock(ptep, pgste);
1077 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1078 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
1079 unsigned long address, pte_t *ptep,
1080 pte_t entry, int dirty)
1084 if (pte_same(*ptep, entry))
1086 if (mm_has_pgste(vma->vm_mm))
1087 pgste = pgste_get_lock(ptep);
1089 __ptep_ipte(address, ptep);
1092 if (mm_has_pgste(vma->vm_mm))
1093 pgste_set_unlock(ptep, pgste);
1098 * Conversion functions: convert a page and protection to a page entry,
1099 * and a page entry and page directory to the page they refer to.
1101 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
1104 pte_val(__pte) = physpage + pgprot_val(pgprot);
1108 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
1110 unsigned long physpage = page_to_phys(page);
1112 return mk_pte_phys(physpage, pgprot);
1115 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
1116 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
1117 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
1118 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
1120 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
1121 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
1123 #ifndef CONFIG_64BIT
1125 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1126 #define pud_deref(pmd) ({ BUG(); 0UL; })
1127 #define pgd_deref(pmd) ({ BUG(); 0UL; })
1129 #define pud_offset(pgd, address) ((pud_t *) pgd)
1130 #define pmd_offset(pud, address) ((pmd_t *) pud + pmd_index(address))
1132 #else /* CONFIG_64BIT */
1134 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1135 #define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
1136 #define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
1138 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
1140 pud_t *pud = (pud_t *) pgd;
1141 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
1142 pud = (pud_t *) pgd_deref(*pgd);
1143 return pud + pud_index(address);
1146 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
1148 pmd_t *pmd = (pmd_t *) pud;
1149 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
1150 pmd = (pmd_t *) pud_deref(*pud);
1151 return pmd + pmd_index(address);
1154 #endif /* CONFIG_64BIT */
1156 #define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
1157 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
1158 #define pte_page(x) pfn_to_page(pte_pfn(x))
1160 #define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
1162 /* Find an entry in the lowest level page table.. */
1163 #define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1164 #define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
1165 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
1166 #define pte_unmap(pte) do { } while (0)
1168 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1169 static inline int pmd_trans_splitting(pmd_t pmd)
1171 return pmd_val(pmd) & _SEGMENT_ENTRY_SPLIT;
1173 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1176 * 31 bit swap entry format:
1177 * A page-table entry has some bits we have to treat in a special way.
1178 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
1179 * exception will occur instead of a page translation exception. The
1180 * specifiation exception has the bad habit not to store necessary
1181 * information in the lowcore.
1182 * Bit 21 and bit 22 are the page invalid bit and the page protection
1183 * bit. We set both to indicate a swapped page.
1184 * Bit 30 and 31 are used to distinguish the different page types. For
1185 * a swapped page these bits need to be zero.
1186 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
1187 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
1188 * plus 24 for the offset.
1189 * 0| offset |0110|o|type |00|
1190 * 0 0000000001111111111 2222 2 22222 33
1191 * 0 1234567890123456789 0123 4 56789 01
1193 * 64 bit swap entry format:
1194 * A page-table entry has some bits we have to treat in a special way.
1195 * Bits 52 and bit 55 have to be zero, otherwise an specification
1196 * exception will occur instead of a page translation exception. The
1197 * specifiation exception has the bad habit not to store necessary
1198 * information in the lowcore.
1199 * Bit 53 and bit 54 are the page invalid bit and the page protection
1200 * bit. We set both to indicate a swapped page.
1201 * Bit 62 and 63 are used to distinguish the different page types. For
1202 * a swapped page these bits need to be zero.
1203 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
1204 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
1205 * plus 56 for the offset.
1206 * | offset |0110|o|type |00|
1207 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
1208 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
1210 #ifndef CONFIG_64BIT
1211 #define __SWP_OFFSET_MASK (~0UL >> 12)
1213 #define __SWP_OFFSET_MASK (~0UL >> 11)
1215 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1218 offset &= __SWP_OFFSET_MASK;
1219 pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) |
1220 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
1224 #define __swp_type(entry) (((entry).val >> 2) & 0x1f)
1225 #define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
1226 #define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
1228 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1229 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1231 #ifndef CONFIG_64BIT
1232 # define PTE_FILE_MAX_BITS 26
1233 #else /* CONFIG_64BIT */
1234 # define PTE_FILE_MAX_BITS 59
1235 #endif /* CONFIG_64BIT */
1237 #define pte_to_pgoff(__pte) \
1238 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
1240 #define pgoff_to_pte(__off) \
1241 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
1242 | _PAGE_TYPE_FILE })
1244 #endif /* !__ASSEMBLY__ */
1246 #define kern_addr_valid(addr) (1)
1248 extern int vmem_add_mapping(unsigned long start, unsigned long size);
1249 extern int vmem_remove_mapping(unsigned long start, unsigned long size);
1250 extern int s390_enable_sie(void);
1253 * No page table caches to initialise
1255 #define pgtable_cache_init() do { } while (0)
1257 #include <asm-generic/pgtable.h>
1259 #endif /* _S390_PAGE_H */