3 * Copyright IBM Corp. 1999
4 * Author(s): Hartmut Penner (hp@de.ibm.com),
5 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * Derived from "include/asm-i386/processor.h"
8 * Copyright (C) 1994, Linus Torvalds
11 #ifndef __ASM_S390_PROCESSOR_H
12 #define __ASM_S390_PROCESSOR_H
16 #include <linux/linkage.h>
17 #include <linux/irqflags.h>
20 #include <asm/ptrace.h>
21 #include <asm/setup.h>
22 #include <asm/runtime_instr.h>
25 * Default implementation of macro that returns current
26 * instruction pointer ("program counter").
28 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
30 static inline void get_cpu_id(struct cpuid *ptr)
32 asm volatile("stidp %0" : "=Q" (*ptr));
35 extern void s390_adjust_jiffies(void);
36 extern const struct seq_operations cpuinfo_op;
37 extern int sysctl_ieee_emulation_warnings;
40 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
44 #define TASK_SIZE (1UL << 31)
45 #define TASK_UNMAPPED_BASE (1UL << 30)
47 #else /* CONFIG_64BIT */
49 #define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit)
50 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
51 (1UL << 30) : (1UL << 41))
52 #define TASK_SIZE TASK_SIZE_OF(current)
54 #endif /* CONFIG_64BIT */
57 #define STACK_TOP (1UL << 31)
58 #define STACK_TOP_MAX (1UL << 31)
59 #else /* CONFIG_64BIT */
60 #define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
61 #define STACK_TOP_MAX (1UL << 42)
62 #endif /* CONFIG_64BIT */
64 #define HAVE_ARCH_PICK_MMAP_LAYOUT
73 struct thread_struct {
75 unsigned int acrs[NUM_ACRS];
76 unsigned long ksp; /* kernel stack pointer */
77 mm_segment_t mm_segment;
78 unsigned long gmap_addr; /* address of last gmap fault. */
79 struct per_regs per_user; /* User specified PER registers */
80 struct per_event per_event; /* Cause of the last PER trap */
81 unsigned long per_flags; /* Flags to control debug behavior */
82 /* pfault_wait is used to block the process on a pfault event */
83 unsigned long pfault_wait;
84 struct list_head list;
85 /* cpu runtime instrumentation */
86 struct runtime_instr_cb *ri_cb;
89 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */
93 #define PER_FLAG_NO_TE 1UL /* Flag to disable transactions. */
95 typedef struct thread_struct thread_struct;
98 * Stack layout of a C stack frame.
102 unsigned long back_chain;
103 unsigned long empty1[5];
104 unsigned long gprs[10];
105 unsigned int empty2[8];
109 unsigned long empty1[5];
110 unsigned int empty2[8];
111 unsigned long gprs[10];
112 unsigned long back_chain;
116 #define ARCH_MIN_TASKALIGN 8
118 #define INIT_THREAD { \
119 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
123 * Do necessary setup to start up a new thread.
125 #define start_thread(regs, new_psw, new_stackp) do { \
126 regs->psw.mask = psw_user_bits | PSW_MASK_EA | PSW_MASK_BA; \
127 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
128 regs->gprs[15] = new_stackp; \
131 #define start_thread31(regs, new_psw, new_stackp) do { \
132 regs->psw.mask = psw_user_bits | PSW_MASK_BA; \
133 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
134 regs->gprs[15] = new_stackp; \
135 __tlb_flush_mm(current->mm); \
136 crst_table_downgrade(current->mm, 1UL << 31); \
137 update_mm(current->mm, current); \
140 /* Forward declaration, a strange C thing */
146 extern void show_cacheinfo(struct seq_file *m);
148 static inline void show_cacheinfo(struct seq_file *m) { }
151 /* Free all resources held by a thread. */
152 extern void release_thread(struct task_struct *);
153 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
156 * Return saved PC of a blocked thread.
158 extern unsigned long thread_saved_pc(struct task_struct *t);
160 extern void show_code(struct pt_regs *regs);
161 extern void print_fn_code(unsigned char *code, unsigned long len);
162 extern int insn_to_mnemonic(unsigned char *instruction, char buf[8]);
164 unsigned long get_wchan(struct task_struct *p);
165 #define task_pt_regs(tsk) ((struct pt_regs *) \
166 (task_stack_page(tsk) + THREAD_SIZE) - 1)
167 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
168 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
170 static inline unsigned short stap(void)
172 unsigned short cpu_address;
174 asm volatile("stap %0" : "=m" (cpu_address));
179 * Give up the time slice of the virtual PU.
181 static inline void cpu_relax(void)
183 if (MACHINE_HAS_DIAG44)
184 asm volatile("diag 0,0,68");
188 static inline void psw_set_key(unsigned int key)
190 asm volatile("spka 0(%0)" : : "d" (key));
194 * Set PSW to specified value.
196 static inline void __load_psw(psw_t psw)
199 asm volatile("lpsw %0" : : "Q" (psw) : "cc");
201 asm volatile("lpswe %0" : : "Q" (psw) : "cc");
206 * Set PSW mask to specified value, while leaving the
207 * PSW addr pointing to the next instruction.
209 static inline void __load_psw_mask (unsigned long mask)
220 " st %0,%O1+4(%R1)\n"
223 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
224 #else /* CONFIG_64BIT */
227 " stg %0,%O1+8(%R1)\n"
230 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
231 #endif /* CONFIG_64BIT */
235 * Rewind PSW instruction address by specified number of bytes.
237 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
240 if (psw.addr & PSW_ADDR_AMODE)
242 return (psw.addr - ilc) | PSW_ADDR_AMODE;
244 return (psw.addr - ilc) & ((1UL << 24) - 1);
248 mask = (psw.mask & PSW_MASK_EA) ? -1UL :
249 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
251 return (psw.addr - ilc) & mask;
256 * Function to drop a processor into disabled wait state
258 static inline void __noreturn disabled_wait(unsigned long code)
260 unsigned long ctl_buf;
263 dw_psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
266 * Store status and then load disabled wait psw,
267 * the processor is dead afterwards
272 " ni 0(%2),0xef\n" /* switch off protection */
274 " stpt 0xd8\n" /* store timer */
275 " stckc 0xe0\n" /* store clock comparator */
276 " stpx 0x108\n" /* store prefix register */
277 " stam 0,15,0x120\n" /* store access registers */
278 " std 0,0x160\n" /* store f0 */
279 " std 2,0x168\n" /* store f2 */
280 " std 4,0x170\n" /* store f4 */
281 " std 6,0x178\n" /* store f6 */
282 " stm 0,15,0x180\n" /* store general registers */
283 " stctl 0,15,0x1c0\n" /* store control registers */
284 " oi 0x1c0,0x10\n" /* fake protection bit */
287 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
288 #else /* CONFIG_64BIT */
291 " ni 4(%2),0xef\n" /* switch off protection */
294 " stpt 0x328(1)\n" /* store timer */
295 " stckc 0x330(1)\n" /* store clock comparator */
296 " stpx 0x318(1)\n" /* store prefix register */
297 " stam 0,15,0x340(1)\n"/* store access registers */
298 " stfpc 0x31c(1)\n" /* store fpu control */
299 " std 0,0x200(1)\n" /* store f0 */
300 " std 1,0x208(1)\n" /* store f1 */
301 " std 2,0x210(1)\n" /* store f2 */
302 " std 3,0x218(1)\n" /* store f3 */
303 " std 4,0x220(1)\n" /* store f4 */
304 " std 5,0x228(1)\n" /* store f5 */
305 " std 6,0x230(1)\n" /* store f6 */
306 " std 7,0x238(1)\n" /* store f7 */
307 " std 8,0x240(1)\n" /* store f8 */
308 " std 9,0x248(1)\n" /* store f9 */
309 " std 10,0x250(1)\n" /* store f10 */
310 " std 11,0x258(1)\n" /* store f11 */
311 " std 12,0x260(1)\n" /* store f12 */
312 " std 13,0x268(1)\n" /* store f13 */
313 " std 14,0x270(1)\n" /* store f14 */
314 " std 15,0x278(1)\n" /* store f15 */
315 " stmg 0,15,0x280(1)\n"/* store general registers */
316 " stctg 0,15,0x380(1)\n"/* store control registers */
317 " oi 0x384(1),0x10\n"/* fake protection bit */
320 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1");
321 #endif /* CONFIG_64BIT */
326 * Use to set psw mask except for the first byte which
327 * won't be changed by this function.
330 __set_psw_mask(unsigned long mask)
332 __load_psw_mask(mask | (arch_local_save_flags() & ~(-1UL >> 8)));
335 #define local_mcck_enable() \
336 __set_psw_mask(psw_kernel_bits | PSW_MASK_DAT | PSW_MASK_MCHECK)
337 #define local_mcck_disable() \
338 __set_psw_mask(psw_kernel_bits | PSW_MASK_DAT)
341 * Basic Machine Check/Program Check Handler.
344 extern void s390_base_mcck_handler(void);
345 extern void s390_base_pgm_handler(void);
346 extern void s390_base_ext_handler(void);
348 extern void (*s390_base_mcck_handler_fn)(void);
349 extern void (*s390_base_pgm_handler_fn)(void);
350 extern void (*s390_base_ext_handler_fn)(void);
352 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
354 extern int memcpy_real(void *, void *, size_t);
355 extern void memcpy_absolute(void *, void *, size_t);
357 #define mem_assign_absolute(dest, val) { \
358 __typeof__(dest) __tmp = (val); \
360 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \
361 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \
365 * Helper macro for exception table entries
367 #define EX_TABLE(_fault, _target) \
368 ".section __ex_table,\"a\"\n" \
370 ".long (" #_fault ") - .\n" \
371 ".long (" #_target ") - .\n" \
374 #else /* __ASSEMBLY__ */
376 #define EX_TABLE(_fault, _target) \
377 .section __ex_table,"a" ; \
379 .long (_fault) - . ; \
380 .long (_target) - . ; \
383 #endif /* __ASSEMBLY__ */
385 #endif /* __ASM_S390_PROCESSOR_H */