2 * Extract CPU cache information and expose them via sysfs.
4 * Copyright IBM Corp. 2012
5 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
8 #include <linux/seq_file.h>
10 #include <linux/cacheinfo.h>
11 #include <asm/facility.h>
14 CACHE_SCOPE_NOTEXISTS,
31 EXTRACT_ASSOCIATIVITY,
42 unsigned char scope : 2;
43 unsigned char type : 2;
46 #define CACHE_MAX_LEVEL 8
47 union cache_topology {
48 struct cache_info ci[CACHE_MAX_LEVEL];
49 unsigned long long raw;
52 static const char * const cache_type_string[] = {
60 static const enum cache_type cache_type_map[] = {
61 [CTYPE_SEPARATE] = CACHE_TYPE_SEPARATE,
62 [CTYPE_DATA] = CACHE_TYPE_DATA,
63 [CTYPE_INSTRUCTION] = CACHE_TYPE_INST,
64 [CTYPE_UNIFIED] = CACHE_TYPE_UNIFIED,
67 void show_cacheinfo(struct seq_file *m)
69 struct cpu_cacheinfo *this_cpu_ci;
70 struct cacheinfo *cache;
74 this_cpu_ci = get_cpu_cacheinfo(cpumask_any(cpu_online_mask));
75 for (idx = 0; idx < this_cpu_ci->num_leaves; idx++) {
76 cache = this_cpu_ci->info_list + idx;
77 seq_printf(m, "cache%-11d: ", idx);
78 seq_printf(m, "level=%d ", cache->level);
79 seq_printf(m, "type=%s ", cache_type_string[cache->type]);
80 seq_printf(m, "scope=%s ",
81 cache->disable_sysfs ? "Shared" : "Private");
82 seq_printf(m, "size=%dK ", cache->size >> 10);
83 seq_printf(m, "line_size=%u ", cache->coherency_line_size);
84 seq_printf(m, "associativity=%d", cache->ways_of_associativity);
90 static inline enum cache_type get_cache_type(struct cache_info *ci, int level)
92 if (level >= CACHE_MAX_LEVEL)
93 return CACHE_TYPE_NOCACHE;
97 if (ci->scope != CACHE_SCOPE_SHARED && ci->scope != CACHE_SCOPE_PRIVATE)
98 return CACHE_TYPE_NOCACHE;
100 return cache_type_map[ci->type];
103 static inline unsigned long ecag(int ai, int li, int ti)
105 unsigned long cmd, val;
107 cmd = ai << 4 | li << 1 | ti;
108 asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */
109 : "=d" (val) : "a" (cmd));
113 static void ci_leaf_init(struct cacheinfo *this_leaf, int private,
114 enum cache_type type, unsigned int level)
117 int cpu = smp_processor_id();
119 if (type == CACHE_TYPE_INST)
120 ti = CACHE_TI_INSTRUCTION;
122 ti = CACHE_TI_UNIFIED;
124 this_leaf->level = level + 1;
125 this_leaf->type = type;
126 this_leaf->coherency_line_size = ecag(EXTRACT_LINE_SIZE, level, ti);
127 this_leaf->ways_of_associativity = ecag(EXTRACT_ASSOCIATIVITY,
129 this_leaf->size = ecag(EXTRACT_SIZE, level, ti);
131 num_sets = this_leaf->size / this_leaf->coherency_line_size;
132 num_sets /= this_leaf->ways_of_associativity;
133 this_leaf->number_of_sets = num_sets;
134 cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
136 this_leaf->disable_sysfs = true;
139 int init_cache_level(unsigned int cpu)
141 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
142 unsigned int level = 0, leaves = 0;
143 union cache_topology ct;
144 enum cache_type ctype;
149 ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0);
151 ctype = get_cache_type(&ct.ci[0], level);
152 if (ctype == CACHE_TYPE_NOCACHE)
154 /* Separate instruction and data caches */
155 leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1;
156 } while (++level < CACHE_MAX_LEVEL);
158 this_cpu_ci->num_levels = level;
159 this_cpu_ci->num_leaves = leaves;
164 int populate_cache_leaves(unsigned int cpu)
166 unsigned int level, idx, pvt;
167 union cache_topology ct;
168 enum cache_type ctype;
169 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
170 struct cacheinfo *this_leaf = this_cpu_ci->info_list;
172 ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0);
173 for (idx = 0, level = 0; level < this_cpu_ci->num_levels &&
174 idx < this_cpu_ci->num_leaves; idx++, level++) {
178 pvt = (ct.ci[level].scope == CACHE_SCOPE_PRIVATE) ? 1 : 0;
179 ctype = get_cache_type(&ct.ci[0], level);
180 if (ctype == CACHE_TYPE_SEPARATE) {
181 ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_DATA, level);
182 ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_INST, level);
184 ci_leaf_init(this_leaf++, pvt, ctype, level);