2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/cache.h>
16 #include <asm/errno.h>
17 #include <asm/ptrace.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/unistd.h>
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
27 SP_PTREGS = STACK_FRAME_OVERHEAD
28 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
29 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
30 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
31 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
32 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
34 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
36 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
37 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
38 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
39 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
40 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
41 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
42 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
43 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
44 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
45 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
46 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
48 SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
49 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
51 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
52 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
53 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
55 _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
56 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
58 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
59 STACK_SIZE = 1 << STACK_SHIFT
61 #define BASED(name) name-system_call(%r13)
63 #ifdef CONFIG_TRACE_IRQFLAGS
66 l %r1,BASED(.Ltrace_irq_on_caller)
72 l %r1,BASED(.Ltrace_irq_off_caller)
76 .macro TRACE_IRQS_CHECK
78 tm SP_PSW(%r15),0x03 # irqs enabled?
80 l %r1,BASED(.Ltrace_irq_on_caller)
83 0: l %r1,BASED(.Ltrace_irq_off_caller)
89 #define TRACE_IRQS_OFF
90 #define TRACE_IRQS_CHECK
94 .macro LOCKDEP_SYS_EXIT
95 tm SP_PSW+1(%r15),0x01 # returning to user ?
97 l %r1,BASED(.Llockdep_sys_exit)
102 #define LOCKDEP_SYS_EXIT
106 * Register usage in interrupt handlers:
107 * R9 - pointer to current task structure
108 * R13 - pointer to literal pool
109 * R14 - return register for function calls
110 * R15 - kernel stack pointer
113 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
114 lm %r10,%r11,\lc_from
123 1: stm %r10,%r11,\lc_sum
126 .macro SAVE_ALL_BASE savearea
127 stm %r12,%r15,\savearea
128 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
131 .macro SAVE_ALL_SVC psworg,savearea
133 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
136 .macro SAVE_ALL_SYNC psworg,savearea
138 tm \psworg+1,0x01 # test problem state bit
139 bz BASED(2f) # skip stack setup save
140 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
141 #ifdef CONFIG_CHECK_STACK
143 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
144 bz BASED(stack_overflow)
150 .macro SAVE_ALL_ASYNC psworg,savearea
152 tm \psworg+1,0x01 # test problem state bit
153 bnz BASED(1f) # from user -> load async stack
154 clc \psworg+4(4),BASED(.Lcritical_end)
156 clc \psworg+4(4),BASED(.Lcritical_start)
158 l %r14,BASED(.Lcleanup_critical)
160 tm 1(%r12),0x01 # retest problem state after cleanup
162 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
166 1: l %r15,__LC_ASYNC_STACK
167 #ifdef CONFIG_CHECK_STACK
169 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
170 bz BASED(stack_overflow)
176 .macro CREATE_STACK_FRAME psworg,savearea
177 s %r15,BASED(.Lc_spsize) # make room for registers & psw
178 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
179 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
180 icm %r12,3,__LC_SVC_ILC
181 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
182 st %r12,SP_SVCNR(%r15)
183 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
185 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
188 .macro RESTORE_ALL psworg,sync
189 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
191 ni \psworg+1,0xfd # clear wait state bit
193 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
195 lpsw \psworg # back to caller
199 * Scheduler resume function, called by switch_to
200 * gpr2 = (task_struct *) prev
201 * gpr3 = (task_struct *) next
209 tm __THREAD_per(%r3),0xe8 # new process is using per ?
210 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
211 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff
212 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15)
213 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
214 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
216 l %r4,__THREAD_info(%r2) # get thread_info of prev
217 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
218 bz __switch_to_no_mcck-__switch_to_base(%r1)
219 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
220 l %r4,__THREAD_info(%r3) # get thread_info of next
221 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
223 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
224 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
225 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
226 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
227 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
228 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
229 l %r3,__THREAD_info(%r3) # load thread_info from task struct
230 st %r3,__LC_THREAD_INFO
232 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
237 * SVC interrupt handler routine. System calls are synchronous events and
238 * are executed with interrupts enabled.
243 stpt __LC_SYNC_ENTER_TIMER
245 SAVE_ALL_BASE __LC_SAVE_AREA
246 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
247 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
248 lh %r7,0x8a # get svc number from lowcore
250 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
252 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
254 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
256 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
257 ltr %r7,%r7 # test for svc 0
258 bnz BASED(sysc_nr_ok) # svc number > 0
259 # svc 0: system call number in %r1
260 cl %r1,BASED(.Lnr_syscalls)
261 bnl BASED(sysc_nr_ok)
262 lr %r7,%r1 # copy svc number to %r7
264 mvc SP_ARGS(4,%r15),SP_R7(%r15)
266 sth %r7,SP_SVCNR(%r15)
267 sll %r7,2 # svc number *4
268 l %r8,BASED(.Lsysc_table)
269 tm __TI_flags+2(%r9),_TIF_SYSCALL
270 l %r8,0(%r7,%r8) # get system call addr.
271 bnz BASED(sysc_tracesys)
272 basr %r14,%r8 # call sys_xxxx
273 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
276 tm __TI_flags+3(%r9),_TIF_WORK_SVC
277 bnz BASED(sysc_work) # there is work to do (signals etc.)
279 #ifdef CONFIG_TRACE_IRQFLAGS
280 la %r1,BASED(sysc_restore_trace_psw_addr)
288 RESTORE_ALL __LC_RETURN_PSW,1
291 #ifdef CONFIG_TRACE_IRQFLAGS
292 sysc_restore_trace_psw_addr:
293 .long sysc_restore_trace_psw
295 .section .data,"aw",@progbits
297 .globl sysc_restore_trace_psw
298 sysc_restore_trace_psw:
299 .long 0, sysc_restore_trace + 0x80000000
304 # There is work to do, but first we need to check if we return to userspace.
307 tm SP_PSW+1(%r15),0x01 # returning to user ?
308 bno BASED(sysc_restore)
311 # One of the work bits is on. Find out which one.
314 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
315 bo BASED(sysc_mcck_pending)
316 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
317 bo BASED(sysc_reschedule)
318 tm __TI_flags+3(%r9),_TIF_SIGPENDING
319 bo BASED(sysc_sigpending)
320 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
321 bo BASED(sysc_notify_resume)
322 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
323 bo BASED(sysc_restart)
324 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
325 bo BASED(sysc_singlestep)
326 b BASED(sysc_return) # beware of critical section cleanup
329 # _TIF_NEED_RESCHED is set, call schedule
332 l %r1,BASED(.Lschedule)
333 la %r14,BASED(sysc_work_loop)
334 br %r1 # call scheduler
337 # _TIF_MCCK_PENDING is set, call handler
340 l %r1,BASED(.Ls390_handle_mcck)
341 la %r14,BASED(sysc_work_loop)
342 br %r1 # TIF bit will be cleared by handler
345 # _TIF_SIGPENDING is set, call do_signal
348 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
349 la %r2,SP_PTREGS(%r15) # load pt_regs
350 l %r1,BASED(.Ldo_signal)
351 basr %r14,%r1 # call do_signal
352 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
353 bo BASED(sysc_restart)
354 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
355 bo BASED(sysc_singlestep)
356 b BASED(sysc_work_loop)
359 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
362 la %r2,SP_PTREGS(%r15) # load pt_regs
363 l %r1,BASED(.Ldo_notify_resume)
364 la %r14,BASED(sysc_work_loop)
365 br %r1 # call do_notify_resume
369 # _TIF_RESTART_SVC is set, set up registers and restart svc
372 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
373 l %r7,SP_R2(%r15) # load new svc number
374 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
375 lm %r2,%r6,SP_R2(%r15) # load svc arguments
376 b BASED(sysc_do_restart) # restart svc
379 # _TIF_SINGLE_STEP is set, call do_single_step
382 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
383 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
384 mvi SP_SVCNR+1(%r15),0xff
385 la %r2,SP_PTREGS(%r15) # address of register-save area
386 l %r1,BASED(.Lhandle_per) # load adr. of per handler
387 la %r14,BASED(sysc_work_loop) # load adr. of system return
388 br %r1 # branch to do_single_step
391 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
392 # and after the system call
395 l %r1,BASED(.Ltrace_entry)
396 la %r2,SP_PTREGS(%r15) # load pt_regs
401 cl %r2,BASED(.Lnr_syscalls)
402 bnl BASED(sysc_tracenogo)
403 l %r8,BASED(.Lsysc_table)
405 sll %r7,2 # svc number *4
408 lm %r3,%r6,SP_R3(%r15)
409 l %r2,SP_ORIG_R2(%r15)
410 basr %r14,%r8 # call sys_xxx
411 st %r2,SP_R2(%r15) # store return value
413 tm __TI_flags+2(%r9),_TIF_SYSCALL
414 bz BASED(sysc_return)
415 l %r1,BASED(.Ltrace_exit)
416 la %r2,SP_PTREGS(%r15) # load pt_regs
417 la %r14,BASED(sysc_return)
421 # a new process exits the kernel with ret_from_fork
425 l %r13,__LC_SVC_NEW_PSW+4
426 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
427 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
429 st %r15,SP_R15(%r15) # store stack pointer for new kthread
430 0: l %r1,BASED(.Lschedtail)
433 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
434 b BASED(sysc_tracenogo)
437 # kernel_execve function needs to deal with pt_regs that is not
442 stm %r12,%r15,48(%r15)
444 l %r13,__LC_SVC_NEW_PSW+4
445 s %r15,BASED(.Lc_spsize)
446 st %r14,__SF_BACKCHAIN(%r15)
447 la %r12,SP_PTREGS(%r15)
448 xc 0(__PT_SIZE,%r12),0(%r12)
449 l %r1,BASED(.Ldo_execve)
454 a %r15,BASED(.Lc_spsize)
455 lm %r12,%r15,48(%r15)
458 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
459 l %r15,__LC_KERNEL_STACK # load ksp
460 s %r15,BASED(.Lc_spsize) # make room for registers & psw
461 l %r9,__LC_THREAD_INFO
462 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
463 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
464 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
465 l %r1,BASED(.Lexecve_tail)
470 * Program check handler routine
473 .globl pgm_check_handler
476 * First we need to check for a special case:
477 * Single stepping an instruction that disables the PER event mask will
478 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
479 * For a single stepped SVC the program check handler gets control after
480 * the SVC new PSW has been loaded. But we want to execute the SVC first and
481 * then handle the PER event. Therefore we update the SVC old PSW to point
482 * to the pgm_check_handler and branch to the SVC handler after we checked
483 * if we have to load the kernel stack register.
484 * For every other possible cause for PER event without the PER mask set
485 * we just ignore the PER event (FIXME: is there anything we have to do
488 stpt __LC_SYNC_ENTER_TIMER
489 SAVE_ALL_BASE __LC_SAVE_AREA
490 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
491 bnz BASED(pgm_per) # got per exception -> special case
492 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
493 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
494 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
495 bz BASED(pgm_no_vtime)
496 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
497 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
498 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
500 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
502 l %r3,__LC_PGM_ILC # load program interruption code
506 l %r7,BASED(.Ljump_table)
508 l %r7,0(%r8,%r7) # load address of handler routine
509 la %r2,SP_PTREGS(%r15) # address of register-save area
510 la %r14,BASED(sysc_return)
511 br %r7 # branch to interrupt-handler
514 # handle per exception
517 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
518 bnz BASED(pgm_per_std) # ok, normal per event from user space
519 # ok its one of the special cases, now we need to find out which one
520 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
522 # no interesting special case, ignore PER event
523 lm %r12,%r15,__LC_SAVE_AREA
527 # Normal per exception
530 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
531 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
532 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
533 bz BASED(pgm_no_vtime2)
534 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
535 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
536 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
538 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
541 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
542 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
543 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
544 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
545 tm SP_PSW+1(%r15),0x01 # kernel per event ?
547 l %r3,__LC_PGM_ILC # load program interruption code
549 nr %r8,%r3 # clear per-event-bit and ilc
550 be BASED(sysc_return) # only per or per+check ?
554 # it was a single stepped SVC that is causing all the trouble
557 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
558 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
559 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
560 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
561 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
562 lh %r7,0x8a # get svc number from lowcore
563 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
566 mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
567 mvc __THREAD_per+__PER_address(4,%r8),__LC_PER_ADDRESS
568 mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
569 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
571 lm %r2,%r6,SP_R2(%r15) # load svc arguments
572 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
576 # per was called from kernel, must be kprobes
579 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
580 mvi SP_SVCNR+1(%r15),0xff
581 la %r2,SP_PTREGS(%r15) # address of register-save area
582 l %r1,BASED(.Lhandle_per) # load adr. of per handler
583 la %r14,BASED(sysc_restore)# load adr. of system return
584 br %r1 # branch to do_single_step
587 * IO interrupt handler routine
590 .globl io_int_handler
593 stpt __LC_ASYNC_ENTER_TIMER
594 SAVE_ALL_BASE __LC_SAVE_AREA+16
595 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
596 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
597 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
598 bz BASED(io_no_vtime)
599 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
600 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
601 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
603 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
605 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
606 la %r2,SP_PTREGS(%r15) # address of register-save area
607 basr %r14,%r1 # branch to standard irq handler
609 tm __TI_flags+3(%r9),_TIF_WORK_INT
610 bnz BASED(io_work) # there is work to do (signals etc.)
612 #ifdef CONFIG_TRACE_IRQFLAGS
613 la %r1,BASED(io_restore_trace_psw_addr)
621 RESTORE_ALL __LC_RETURN_PSW,0
624 #ifdef CONFIG_TRACE_IRQFLAGS
625 io_restore_trace_psw_addr:
626 .long io_restore_trace_psw
628 .section .data,"aw",@progbits
630 .globl io_restore_trace_psw
631 io_restore_trace_psw:
632 .long 0, io_restore_trace + 0x80000000
637 # There is work todo, find out in which context we have been interrupted:
638 # 1) if we return to user space we can do all _TIF_WORK_INT work
639 # 2) if we return to kernel code and preemptive scheduling is enabled check
640 # the preemption counter and if it is zero call preempt_schedule_irq
641 # Before any work can be done, a switch to the kernel stack is required.
644 tm SP_PSW+1(%r15),0x01 # returning to user ?
645 bo BASED(io_work_user) # yes -> do resched & signal
646 #ifdef CONFIG_PREEMPT
647 # check for preemptive scheduling
648 icm %r0,15,__TI_precount(%r9)
649 bnz BASED(io_restore) # preemption disabled
650 # switch to kernel stack
652 s %r1,BASED(.Lc_spsize)
653 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
654 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
657 l %r1,BASED(.Lpreempt_schedule_irq)
658 la %r14,BASED(io_resume_loop)
659 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
660 bor %r1 # call preempt_schedule_irq
665 # Need to do work before returning to userspace, switch to kernel stack
668 l %r1,__LC_KERNEL_STACK
669 s %r1,BASED(.Lc_spsize)
670 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
671 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
674 # One of the work bits is on. Find out which one.
675 # Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
676 # and _TIF_MCCK_PENDING
679 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
680 bo BASED(io_mcck_pending)
681 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
682 bo BASED(io_reschedule)
683 tm __TI_flags+3(%r9),_TIF_SIGPENDING
684 bo BASED(io_sigpending)
685 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
686 bo BASED(io_notify_resume)
687 b BASED(io_return) # beware of critical section cleanup
690 # _TIF_MCCK_PENDING is set, call handler
693 l %r1,BASED(.Ls390_handle_mcck)
694 basr %r14,%r1 # TIF bit will be cleared by handler
695 b BASED(io_work_loop)
698 # _TIF_NEED_RESCHED is set, call schedule
702 l %r1,BASED(.Lschedule)
703 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
704 basr %r14,%r1 # call scheduler
705 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
707 b BASED(io_work_loop)
710 # _TIF_SIGPENDING is set, call do_signal
714 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
715 la %r2,SP_PTREGS(%r15) # load pt_regs
716 l %r1,BASED(.Ldo_signal)
717 basr %r14,%r1 # call do_signal
718 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
720 b BASED(io_work_loop)
723 # _TIF_SIGPENDING is set, call do_signal
727 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
728 la %r2,SP_PTREGS(%r15) # load pt_regs
729 l %r1,BASED(.Ldo_notify_resume)
730 basr %r14,%r1 # call do_signal
731 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
733 b BASED(io_work_loop)
736 * External interrupt handler routine
739 .globl ext_int_handler
742 stpt __LC_ASYNC_ENTER_TIMER
743 SAVE_ALL_BASE __LC_SAVE_AREA+16
744 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
745 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
746 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
747 bz BASED(ext_no_vtime)
748 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
749 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
750 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
752 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
754 la %r2,SP_PTREGS(%r15) # address of register-save area
755 lh %r3,__LC_EXT_INT_CODE # get interruption code
756 l %r1,BASED(.Ldo_extint)
763 * Machine check handler routines
766 .globl mcck_int_handler
769 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
770 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
771 SAVE_ALL_BASE __LC_SAVE_AREA+32
772 la %r12,__LC_MCK_OLD_PSW
773 tm __LC_MCCK_CODE,0x80 # system damage?
774 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
775 mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
776 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
777 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
779 la %r14,__LC_SYNC_ENTER_TIMER
780 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
782 la %r14,__LC_ASYNC_ENTER_TIMER
783 0: clc 0(8,%r14),__LC_EXIT_TIMER
785 la %r14,__LC_EXIT_TIMER
786 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
788 la %r14,__LC_LAST_UPDATE_TIMER
790 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
791 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
792 bno BASED(mcck_int_main) # no -> skip cleanup critical
793 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
794 bnz BASED(mcck_int_main) # from user -> load async stack
795 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
796 bhe BASED(mcck_int_main)
797 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
798 bl BASED(mcck_int_main)
799 l %r14,BASED(.Lcleanup_critical)
802 l %r14,__LC_PANIC_STACK # are we already on the panic stack?
806 l %r15,__LC_PANIC_STACK # load panic stack
807 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
808 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
809 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
810 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
811 bz BASED(mcck_no_vtime)
812 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
813 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
814 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
816 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
817 la %r2,SP_PTREGS(%r15) # load pt_regs
818 l %r1,BASED(.Ls390_mcck)
819 basr %r14,%r1 # call machine check handler
820 tm SP_PSW+1(%r15),0x01 # returning to user ?
821 bno BASED(mcck_return)
822 l %r1,__LC_KERNEL_STACK # switch to kernel stack
823 s %r1,BASED(.Lc_spsize)
824 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
825 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
827 stosm __SF_EMPTY(%r15),0x04 # turn dat on
828 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
829 bno BASED(mcck_return)
831 l %r1,BASED(.Ls390_handle_mcck)
832 basr %r14,%r1 # call machine check handler
835 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
836 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
837 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
838 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
840 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
842 lpsw __LC_RETURN_MCCK_PSW # back to caller
843 0: lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
844 lpsw __LC_RETURN_MCCK_PSW # back to caller
846 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
849 * Restart interruption handler, kick starter for additional CPUs
853 .globl restart_int_handler
857 spt restart_vtime-restart_base(%r1)
858 stck __LC_LAST_UPDATE_CLOCK
859 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
860 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
861 l %r15,__LC_SAVE_AREA+60 # load ksp
862 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
863 lam %a0,%a15,__LC_AREGS_SAVE_AREA
864 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
865 l %r1,__LC_THREAD_INFO
866 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
867 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
868 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
869 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
871 l %r14,restart_addr-.(%r14)
872 br %r14 # branch to start_secondary
874 .long start_secondary
877 .long 0x7fffffff,0xffffffff
881 * If we do not run with SMP enabled, let the new CPU crash ...
883 .globl restart_int_handler
887 lpsw restart_crash-restart_base(%r1)
890 .long 0x000a0000,0x00000000
894 #ifdef CONFIG_CHECK_STACK
896 * The synchronous or the asynchronous stack overflowed. We are dead.
897 * No need to properly save the registers, we are going to panic anyway.
898 * Setup a pt_regs so that show_trace can provide a good call trace.
901 l %r15,__LC_PANIC_STACK # change to panic stack
902 sl %r15,BASED(.Lc_spsize)
903 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
904 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
905 la %r1,__LC_SAVE_AREA
906 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
908 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
910 la %r1,__LC_SAVE_AREA+16
911 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
912 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
913 l %r1,BASED(1f) # branch to kernel_stack_overflow
914 la %r2,SP_PTREGS(%r15) # load pt_regs
916 1: .long kernel_stack_overflow
919 cleanup_table_system_call:
920 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
921 cleanup_table_sysc_return:
922 .long sysc_return + 0x80000000, sysc_leave + 0x80000000
923 cleanup_table_sysc_leave:
924 .long sysc_leave + 0x80000000, sysc_done + 0x80000000
925 cleanup_table_io_return:
926 .long io_return + 0x80000000, io_leave + 0x80000000
927 cleanup_table_io_leave:
928 .long io_leave + 0x80000000, io_done + 0x80000000
931 clc 4(4,%r12),BASED(cleanup_table_system_call)
933 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
934 bl BASED(cleanup_system_call)
936 clc 4(4,%r12),BASED(cleanup_table_sysc_return)
938 clc 4(4,%r12),BASED(cleanup_table_sysc_return+4)
939 bl BASED(cleanup_sysc_return)
941 clc 4(4,%r12),BASED(cleanup_table_sysc_leave)
943 clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4)
944 bl BASED(cleanup_sysc_leave)
946 clc 4(4,%r12),BASED(cleanup_table_io_return)
948 clc 4(4,%r12),BASED(cleanup_table_io_return+4)
949 bl BASED(cleanup_io_return)
951 clc 4(4,%r12),BASED(cleanup_table_io_leave)
953 clc 4(4,%r12),BASED(cleanup_table_io_leave+4)
954 bl BASED(cleanup_io_leave)
959 mvc __LC_RETURN_PSW(8),0(%r12)
960 c %r12,BASED(.Lmck_old_psw)
962 la %r12,__LC_SAVE_AREA+16
964 0: la %r12,__LC_SAVE_AREA+32
966 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
968 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
969 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
970 bhe BASED(cleanup_vtime)
971 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
973 mvc __LC_SAVE_AREA(16),0(%r12)
975 st %r12,__LC_SAVE_AREA+48 # argh
976 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
977 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
978 l %r12,__LC_SAVE_AREA+48 # argh
982 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
983 bhe BASED(cleanup_stime)
984 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
986 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
987 bh BASED(cleanup_update)
988 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
990 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
991 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
992 la %r12,__LC_RETURN_PSW
994 cleanup_system_call_insn:
995 .long sysc_saveall + 0x80000000
996 .long system_call + 0x80000000
997 .long sysc_vtime + 0x80000000
998 .long sysc_stime + 0x80000000
999 .long sysc_update + 0x80000000
1001 cleanup_sysc_return:
1002 mvc __LC_RETURN_PSW(4),0(%r12)
1003 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return)
1004 la %r12,__LC_RETURN_PSW
1008 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn)
1010 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1011 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
1013 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1014 c %r12,BASED(.Lmck_old_psw)
1016 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1018 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
1019 1: lm %r0,%r11,SP_R0(%r15)
1021 2: la %r12,__LC_RETURN_PSW
1023 cleanup_sysc_leave_insn:
1024 .long sysc_done - 4 + 0x80000000
1025 .long sysc_done - 8 + 0x80000000
1028 mvc __LC_RETURN_PSW(4),0(%r12)
1029 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_return)
1030 la %r12,__LC_RETURN_PSW
1034 clc 4(4,%r12),BASED(cleanup_io_leave_insn)
1036 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1037 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4)
1039 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1040 c %r12,BASED(.Lmck_old_psw)
1042 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1044 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
1045 1: lm %r0,%r11,SP_R0(%r15)
1047 2: la %r12,__LC_RETURN_PSW
1049 cleanup_io_leave_insn:
1050 .long io_done - 4 + 0x80000000
1051 .long io_done - 8 + 0x80000000
1057 .Lc_spsize: .long SP_SIZE
1058 .Lc_overhead: .long STACK_FRAME_OVERHEAD
1059 .Lnr_syscalls: .long NR_syscalls
1060 .L0x018: .short 0x018
1061 .L0x020: .short 0x020
1062 .L0x028: .short 0x028
1063 .L0x030: .short 0x030
1064 .L0x038: .short 0x038
1070 .Ls390_mcck: .long s390_do_machine_check
1072 .long s390_handle_mcck
1073 .Lmck_old_psw: .long __LC_MCK_OLD_PSW
1074 .Ldo_IRQ: .long do_IRQ
1075 .Ldo_extint: .long do_extint
1076 .Ldo_signal: .long do_signal
1078 .long do_notify_resume
1079 .Lhandle_per: .long do_single_step
1080 .Ldo_execve: .long do_execve
1081 .Lexecve_tail: .long execve_tail
1082 .Ljump_table: .long pgm_check_table
1083 .Lschedule: .long schedule
1084 #ifdef CONFIG_PREEMPT
1085 .Lpreempt_schedule_irq:
1086 .long preempt_schedule_irq
1088 .Ltrace_entry: .long do_syscall_trace_enter
1089 .Ltrace_exit: .long do_syscall_trace_exit
1090 .Lschedtail: .long schedule_tail
1091 .Lsysc_table: .long sys_call_table
1092 #ifdef CONFIG_TRACE_IRQFLAGS
1093 .Ltrace_irq_on_caller:
1094 .long trace_hardirqs_on_caller
1095 .Ltrace_irq_off_caller:
1096 .long trace_hardirqs_off_caller
1098 #ifdef CONFIG_LOCKDEP
1100 .long lockdep_sys_exit
1103 .long __critical_start + 0x80000000
1105 .long __critical_end + 0x80000000
1107 .long cleanup_critical
1109 .section .rodata, "a"
1110 #define SYSCALL(esa,esame,emu) .long esa
1111 .globl sys_call_table
1113 #include "syscalls.S"