2 * S390 low-level entry points.
4 * Copyright IBM Corp. 1999, 2012
5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
6 * Hartmut Penner (hp@de.ibm.com),
7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
8 * Heiko Carstens <heiko.carstens@de.ibm.com>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/processor.h>
14 #include <asm/cache.h>
15 #include <asm/errno.h>
16 #include <asm/ptrace.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/unistd.h>
23 #include <asm/vx-insn.h>
24 #include <asm/setup.h>
26 #include <asm/export.h>
29 __PT_R1 = __PT_GPRS + 8
30 __PT_R2 = __PT_GPRS + 16
31 __PT_R3 = __PT_GPRS + 24
32 __PT_R4 = __PT_GPRS + 32
33 __PT_R5 = __PT_GPRS + 40
34 __PT_R6 = __PT_GPRS + 48
35 __PT_R7 = __PT_GPRS + 56
36 __PT_R8 = __PT_GPRS + 64
37 __PT_R9 = __PT_GPRS + 72
38 __PT_R10 = __PT_GPRS + 80
39 __PT_R11 = __PT_GPRS + 88
40 __PT_R12 = __PT_GPRS + 96
41 __PT_R13 = __PT_GPRS + 104
42 __PT_R14 = __PT_GPRS + 112
43 __PT_R15 = __PT_GPRS + 120
45 STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
46 STACK_SIZE = 1 << STACK_SHIFT
47 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
49 _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
50 _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING)
51 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
52 _TIF_SYSCALL_TRACEPOINT)
53 _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \
54 _CIF_ASCE_SECONDARY | _CIF_FPU)
55 _PIF_WORK = (_PIF_PER_TRAP)
57 #define BASED(name) name-cleanup_critical(%r13)
60 #ifdef CONFIG_TRACE_IRQFLAGS
62 brasl %r14,trace_hardirqs_on_caller
67 #ifdef CONFIG_TRACE_IRQFLAGS
69 brasl %r14,trace_hardirqs_off_caller
73 .macro LOCKDEP_SYS_EXIT
75 tm __PT_PSW+1(%r11),0x01 # returning to user ?
77 brasl %r14,lockdep_sys_exit
81 .macro CHECK_STACK stacksize,savearea
82 #ifdef CONFIG_CHECK_STACK
83 tml %r15,\stacksize - CONFIG_STACK_GUARD
89 .macro SWITCH_ASYNC savearea,timer
90 tmhh %r8,0x0001 # interrupting from user ?
93 slg %r14,BASED(.Lcritical_start)
94 clg %r14,BASED(.Lcritical_length)
96 lghi %r11,\savearea # inside critical section, do cleanup
97 brasl %r14,cleanup_critical
98 tmhh %r8,0x0001 # retest problem state after cleanup
100 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack?
102 srag %r14,%r14,STACK_SHIFT
104 CHECK_STACK 1<<STACK_SHIFT,\savearea
105 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
107 1: UPDATE_VTIME %r14,%r15,\timer
108 2: lg %r15,__LC_ASYNC_STACK # load async stack
109 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
112 .macro UPDATE_VTIME w1,w2,enter_timer
113 lg \w1,__LC_EXIT_TIMER
114 lg \w2,__LC_LAST_UPDATE_TIMER
116 slg \w2,__LC_EXIT_TIMER
117 alg \w1,__LC_USER_TIMER
118 alg \w2,__LC_SYSTEM_TIMER
119 stg \w1,__LC_USER_TIMER
120 stg \w2,__LC_SYSTEM_TIMER
121 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
125 stg %r8,__LC_RETURN_PSW
126 ni __LC_RETURN_PSW,0xbf
131 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
132 .insn s,0xb27c0000,\savearea # store clock fast
134 .insn s,0xb2050000,\savearea # store clock
139 * The TSTMSK macro generates a test-under-mask instruction by
140 * calculating the memory offset for the specified mask value.
141 * Mask value can be any constant. The macro shifts the mask
142 * value to calculate the memory offset for the test-under-mask
145 .macro TSTMSK addr, mask, size=8, bytepos=0
146 .if (\bytepos < \size) && (\mask >> 8)
148 .error "Mask exceeds byte boundary"
150 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
154 .error "Mask must not be zero"
156 off = \size - \bytepos - 1
160 .section .kprobes.text, "ax"
163 * This nop exists only in order to avoid that __switch_to starts at
164 * the beginning of the kprobes text section. In that case we would
165 * have several symbols at the same address. E.g. objdump would take
166 * an arbitrary symbol name when disassembling this code.
167 * With the added nop in between the __switch_to symbol is unique
173 * Scheduler resume function, called by switch_to
174 * gpr2 = (task_struct *) prev
175 * gpr3 = (task_struct *) next
180 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
182 aghi %r1,__TASK_thread # thread_struct of prev task
183 lg %r5,__TASK_stack(%r3) # start of kernel stack of next
184 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev
186 aghi %r1,__TASK_thread # thread_struct of next task
188 aghi %r15,STACK_INIT # end of kernel stack of next
189 stg %r3,__LC_CURRENT # store task struct of next
190 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
191 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next
192 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
193 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
194 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
196 .insn s,0xb2800000,__LC_LPP # set program parameter
201 #if IS_ENABLED(CONFIG_KVM)
203 * sie64a calling convention:
204 * %r2 pointer to sie control block
205 * %r3 guest register save area
208 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
209 stg %r2,__SF_EMPTY(%r15) # save control block pointer
210 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
211 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
212 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
213 jno .Lsie_load_guest_gprs
214 brasl %r14,load_fpu_regs # load guest fp/vx regs
215 .Lsie_load_guest_gprs:
216 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
217 lg %r14,__LC_GMAP # get gmap pointer
220 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
222 lg %r14,__SF_EMPTY(%r15) # get control block pointer
223 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
224 tm __SIE_PROG20+3(%r14),3 # last exit...
226 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
227 jo .Lsie_skip # exit if fp/vx regs changed
230 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
231 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
233 # some program checks are suppressing. C code (e.g. do_protection_exception)
234 # will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other
235 # instructions between sie64a and .Lsie_done should not cause program
236 # interrupts. So lets use a nop (47 00 00 00) as a landing pad.
237 # See also .Lcleanup_sie
242 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
243 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
244 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
245 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code
249 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code
252 EX_TABLE(.Lrewind_pad,.Lsie_fault)
253 EX_TABLE(sie_exit,.Lsie_fault)
254 EXPORT_SYMBOL(sie64a)
255 EXPORT_SYMBOL(sie_exit)
259 * SVC interrupt handler routine. System calls are synchronous events and
260 * are executed with interrupts enabled.
264 stpt __LC_SYNC_ENTER_TIMER
266 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
268 lghi %r13,__TASK_thread
269 lghi %r14,_PIF_SYSCALL
271 lg %r15,__LC_KERNEL_STACK
272 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
274 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
275 stmg %r0,%r7,__PT_R0(%r11)
276 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
277 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
278 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
279 stg %r14,__PT_FLAGS(%r11)
281 # load address of system call table
282 lg %r10,__THREAD_sysc_table(%r13,%r12)
283 llgh %r8,__PT_INT_CODE+2(%r11)
284 slag %r8,%r8,2 # shift and test for svc 0
286 # svc 0: system call number in %r1
287 llgfr %r1,%r1 # clear high word in r1
290 sth %r1,__PT_INT_CODE+2(%r11)
293 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
294 stg %r2,__PT_ORIG_GPR2(%r11)
295 stg %r7,STACK_FRAME_OVERHEAD(%r15)
296 lgf %r9,0(%r8,%r10) # get system call add.
297 TSTMSK __TI_flags(%r12),_TIF_TRACE
299 basr %r14,%r9 # call sys_xxxx
300 stg %r2,__PT_R2(%r11) # store return value
305 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
307 TSTMSK __TI_flags(%r12),_TIF_WORK
308 jnz .Lsysc_work # check for work
309 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
312 lg %r14,__LC_VDSO_PER_CPU
313 lmg %r0,%r10,__PT_R0(%r11)
314 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
317 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
318 lmg %r11,%r15,__PT_R11(%r11)
319 lpswe __LC_RETURN_PSW
323 # One of the work bits is on. Find out which one.
326 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
327 jo .Lsysc_mcck_pending
328 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
330 #ifdef CONFIG_UPROBES
331 TSTMSK __TI_flags(%r12),_TIF_UPROBE
332 jo .Lsysc_uprobe_notify
334 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
335 jo .Lsysc_guarded_storage
336 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
338 #ifdef CONFIG_LIVEPATCH
339 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
340 jo .Lsysc_patch_pending # handle live patching just before
341 # signals and possible syscall restart
343 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
345 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
346 jo .Lsysc_notify_resume
347 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
349 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
351 j .Lsysc_return # beware of critical section cleanup
354 # _TIF_NEED_RESCHED is set, call schedule
357 larl %r14,.Lsysc_return
361 # _CIF_MCCK_PENDING is set, call handler
364 larl %r14,.Lsysc_return
365 jg s390_handle_mcck # TIF bit will be cleared by handler
368 # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
371 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
372 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
373 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
375 larl %r14,.Lsysc_return
379 # CIF_FPU is set, restore floating-point controls and floating-point registers.
382 larl %r14,.Lsysc_return
386 # _TIF_SIGPENDING is set, call do_signal
389 lgr %r2,%r11 # pass pointer to pt_regs
391 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
394 lghi %r13,__TASK_thread
395 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
396 lghi %r1,0 # svc 0 returns -ENOSYS
400 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
402 .Lsysc_notify_resume:
403 lgr %r2,%r11 # pass pointer to pt_regs
404 larl %r14,.Lsysc_return
408 # _TIF_UPROBE is set, call uprobe_notify_resume
410 #ifdef CONFIG_UPROBES
411 .Lsysc_uprobe_notify:
412 lgr %r2,%r11 # pass pointer to pt_regs
413 larl %r14,.Lsysc_return
414 jg uprobe_notify_resume
418 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
420 .Lsysc_guarded_storage:
421 lgr %r2,%r11 # pass pointer to pt_regs
422 larl %r14,.Lsysc_return
425 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
427 #ifdef CONFIG_LIVEPATCH
428 .Lsysc_patch_pending:
429 lg %r2,__LC_CURRENT # pass pointer to task struct
430 larl %r14,.Lsysc_return
431 jg klp_update_patch_state
435 # _PIF_PER_TRAP is set, call do_per_trap
438 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
439 lgr %r2,%r11 # pass pointer to pt_regs
440 larl %r14,.Lsysc_return
444 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
445 # and after the system call
448 lgr %r2,%r11 # pass pointer to pt_regs
450 llgh %r0,__PT_INT_CODE+2(%r11)
451 stg %r0,__PT_R2(%r11)
452 brasl %r14,do_syscall_trace_enter
459 lmg %r3,%r7,__PT_R3(%r11)
460 stg %r7,STACK_FRAME_OVERHEAD(%r15)
461 lg %r2,__PT_ORIG_GPR2(%r11)
462 basr %r14,%r9 # call sys_xxx
463 stg %r2,__PT_R2(%r11) # store return value
465 TSTMSK __TI_flags(%r12),_TIF_TRACE
467 lgr %r2,%r11 # pass pointer to pt_regs
468 larl %r14,.Lsysc_return
469 jg do_syscall_trace_exit
472 # a new process exits the kernel with ret_from_fork
475 la %r11,STACK_FRAME_OVERHEAD(%r15)
477 brasl %r14,schedule_tail
479 ssm __LC_SVC_NEW_PSW # reenable interrupts
480 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
482 # it's a kernel thread
483 lmg %r9,%r10,__PT_R9(%r11) # load gprs
484 ENTRY(kernel_thread_starter)
490 * Program check handler routine
493 ENTRY(pgm_check_handler)
494 stpt __LC_SYNC_ENTER_TIMER
495 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
496 lg %r10,__LC_LAST_BREAK
498 larl %r13,cleanup_critical
499 lmg %r8,%r9,__LC_PGM_OLD_PSW
500 tmhh %r8,0x0001 # test problem state bit
501 jnz 2f # -> fault in user space
502 #if IS_ENABLED(CONFIG_KVM)
503 # cleanup critical section for sie64a
505 slg %r14,BASED(.Lsie_critical_start)
506 clg %r14,BASED(.Lsie_critical_length)
508 brasl %r14,.Lcleanup_sie
510 0: tmhh %r8,0x4000 # PER bit set in old PSW ?
511 jnz 1f # -> enabled, can't be a double fault
512 tm __LC_PGM_ILC+3,0x80 # check for per exception
513 jnz .Lpgm_svcper # -> single stepped svc
514 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
515 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
517 2: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
518 lg %r15,__LC_KERNEL_STACK
520 aghi %r14,__TASK_thread # pointer to thread_struct
521 lghi %r13,__LC_PGM_TDB
522 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
524 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
525 3: stg %r10,__THREAD_last_break(%r14)
526 4: la %r11,STACK_FRAME_OVERHEAD(%r15)
527 stmg %r0,%r7,__PT_R0(%r11)
528 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
529 stmg %r8,%r9,__PT_PSW(%r11)
530 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
531 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
532 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
533 stg %r10,__PT_ARGS(%r11)
534 tm __LC_PGM_ILC+3,0x80 # check for per exception
536 tmhh %r8,0x0001 # kernel per event ?
538 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
539 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
540 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
541 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
543 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
544 larl %r1,pgm_check_table
545 llgh %r10,__PT_INT_CODE+2(%r11)
549 lgf %r1,0(%r10,%r1) # load address of handler routine
550 lgr %r2,%r11 # pass pointer to pt_regs
551 basr %r14,%r1 # branch to interrupt-handler
554 tm __PT_PSW+1(%r11),0x01 # returning to user ?
556 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
561 # PER event in supervisor state, must be kprobes
565 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
566 lgr %r2,%r11 # pass pointer to pt_regs
567 brasl %r14,do_per_trap
571 # single stepped system call
574 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
575 lghi %r13,__TASK_thread
577 stg %r14,__LC_RETURN_PSW+8
578 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
579 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs
582 * IO interrupt handler routine
584 ENTRY(io_int_handler)
586 stpt __LC_ASYNC_ENTER_TIMER
587 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
589 larl %r13,cleanup_critical
590 lmg %r8,%r9,__LC_IO_OLD_PSW
591 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
592 stmg %r0,%r7,__PT_R0(%r11)
593 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
594 stmg %r8,%r9,__PT_PSW(%r11)
595 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
596 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
597 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
600 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
602 lgr %r2,%r11 # pass pointer to pt_regs
603 lghi %r3,IO_INTERRUPT
604 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
606 lghi %r3,THIN_INTERRUPT
609 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
613 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
619 TSTMSK __TI_flags(%r12),_TIF_WORK
620 jnz .Lio_work # there is work to do (signals etc.)
621 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
624 lg %r14,__LC_VDSO_PER_CPU
625 lmg %r0,%r10,__PT_R0(%r11)
626 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
629 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
630 lmg %r11,%r15,__PT_R11(%r11)
631 lpswe __LC_RETURN_PSW
635 # There is work todo, find out in which context we have been interrupted:
636 # 1) if we return to user space we can do all _TIF_WORK work
637 # 2) if we return to kernel code and kvm is enabled check if we need to
638 # modify the psw to leave SIE
639 # 3) if we return to kernel code and preemptive scheduling is enabled check
640 # the preemption counter and if it is zero call preempt_schedule_irq
641 # Before any work can be done, a switch to the kernel stack is required.
644 tm __PT_PSW+1(%r11),0x01 # returning to user ?
645 jo .Lio_work_user # yes -> do resched & signal
646 #ifdef CONFIG_PREEMPT
647 # check for preemptive scheduling
648 icm %r0,15,__LC_PREEMPT_COUNT
649 jnz .Lio_restore # preemption is disabled
650 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
652 # switch to kernel stack
653 lg %r1,__PT_R15(%r11)
654 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
655 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
656 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
657 la %r11,STACK_FRAME_OVERHEAD(%r1)
659 # TRACE_IRQS_ON already done at .Lio_return, call
660 # TRACE_IRQS_OFF to keep things symmetrical
662 brasl %r14,preempt_schedule_irq
669 # Need to do work before returning to userspace, switch to kernel stack
672 lg %r1,__LC_KERNEL_STACK
673 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
674 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
675 la %r11,STACK_FRAME_OVERHEAD(%r1)
679 # One of the work bits is on. Find out which one.
682 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
684 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
686 #ifdef CONFIG_LIVEPATCH
687 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
688 jo .Lio_patch_pending
690 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
692 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
693 jo .Lio_notify_resume
694 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
695 jo .Lio_guarded_storage
696 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
698 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
700 j .Lio_return # beware of critical section cleanup
703 # _CIF_MCCK_PENDING is set, call handler
706 # TRACE_IRQS_ON already done at .Lio_return
707 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
712 # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
715 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
716 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
717 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
719 larl %r14,.Lio_return
723 # CIF_FPU is set, restore floating-point controls and floating-point registers.
726 larl %r14,.Lio_return
730 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
732 .Lio_guarded_storage:
733 # TRACE_IRQS_ON already done at .Lio_return
734 ssm __LC_SVC_NEW_PSW # reenable interrupts
735 lgr %r2,%r11 # pass pointer to pt_regs
736 brasl %r14,gs_load_bc_cb
737 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
742 # _TIF_NEED_RESCHED is set, call schedule
745 # TRACE_IRQS_ON already done at .Lio_return
746 ssm __LC_SVC_NEW_PSW # reenable interrupts
747 brasl %r14,schedule # call scheduler
748 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
753 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
755 #ifdef CONFIG_LIVEPATCH
757 lg %r2,__LC_CURRENT # pass pointer to task struct
758 larl %r14,.Lio_return
759 jg klp_update_patch_state
763 # _TIF_SIGPENDING or is set, call do_signal
766 # TRACE_IRQS_ON already done at .Lio_return
767 ssm __LC_SVC_NEW_PSW # reenable interrupts
768 lgr %r2,%r11 # pass pointer to pt_regs
770 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
775 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
778 # TRACE_IRQS_ON already done at .Lio_return
779 ssm __LC_SVC_NEW_PSW # reenable interrupts
780 lgr %r2,%r11 # pass pointer to pt_regs
781 brasl %r14,do_notify_resume
782 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
787 * External interrupt handler routine
789 ENTRY(ext_int_handler)
791 stpt __LC_ASYNC_ENTER_TIMER
792 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
794 larl %r13,cleanup_critical
795 lmg %r8,%r9,__LC_EXT_OLD_PSW
796 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
797 stmg %r0,%r7,__PT_R0(%r11)
798 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
799 stmg %r8,%r9,__PT_PSW(%r11)
800 lghi %r1,__LC_EXT_PARAMS2
801 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
802 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
803 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
804 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
805 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
808 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
809 lgr %r2,%r11 # pass pointer to pt_regs
810 lghi %r3,EXT_INTERRUPT
815 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
818 stg %r3,__SF_EMPTY(%r15)
819 larl %r1,.Lpsw_idle_lpsw+4
820 stg %r1,__SF_EMPTY+8(%r15)
822 larl %r1,smp_cpu_mtid
826 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
829 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
830 STCK __CLOCK_IDLE_ENTER(%r2)
831 stpt __TIMER_IDLE_ENTER(%r2)
833 lpswe __SF_EMPTY(%r15)
838 * Store floating-point controls and floating-point or vector register
839 * depending whether the vector facility is available. A critical section
840 * cleanup assures that the registers are stored even if interrupted for
841 * some other work. The CIF_FPU flag is set to trigger a lazy restore
842 * of the register contents at return from io or a system call.
846 aghi %r2,__TASK_thread
847 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
849 stfpc __THREAD_FPU_fpc(%r2)
850 lg %r3,__THREAD_FPU_regs(%r2)
851 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
852 jz .Lsave_fpu_regs_fp # no -> store FP regs
853 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
854 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
855 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
873 .Lsave_fpu_regs_done:
874 oi __LC_CPU_FLAGS+7,_CIF_FPU
877 #if IS_ENABLED(CONFIG_KVM)
878 EXPORT_SYMBOL(save_fpu_regs)
882 * Load floating-point controls and floating-point or vector registers.
883 * A critical section cleanup assures that the register contents are
884 * loaded even if interrupted for some other work.
886 * There are special calling conventions to fit into sysc and io return work:
887 * %r15: <kernel stack>
888 * The function requires:
893 aghi %r4,__TASK_thread
894 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
896 lfpc __THREAD_FPU_fpc(%r4)
897 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
898 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
899 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
901 VLM %v16,%v31,256,%r4
902 j .Lload_fpu_regs_done
920 .Lload_fpu_regs_done:
921 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
928 * Machine check handler routines
930 ENTRY(mcck_int_handler)
932 la %r1,4095 # revalidate r1
933 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
934 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
936 larl %r13,cleanup_critical
937 lmg %r8,%r9,__LC_MCK_OLD_PSW
938 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
939 jo .Lmcck_panic # yes -> rest of mcck code invalid
940 lghi %r14,__LC_CPU_TIMER_SAVE_AREA
941 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
942 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
944 la %r14,__LC_SYNC_ENTER_TIMER
945 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
947 la %r14,__LC_ASYNC_ENTER_TIMER
948 0: clc 0(8,%r14),__LC_EXIT_TIMER
950 la %r14,__LC_EXIT_TIMER
951 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
953 la %r14,__LC_LAST_UPDATE_TIMER
955 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
956 3: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID)
957 jno .Lmcck_panic # no -> skip cleanup critical
958 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
960 lghi %r14,__LC_GPREGS_SAVE_AREA+64
961 stmg %r0,%r7,__PT_R0(%r11)
962 mvc __PT_R8(64,%r11),0(%r14)
963 stmg %r8,%r9,__PT_PSW(%r11)
964 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
965 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
966 lgr %r2,%r11 # pass pointer to pt_regs
967 brasl %r14,s390_do_machine_check
968 tm __PT_PSW+1(%r11),0x01 # returning to user ?
970 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
971 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
972 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
973 la %r11,STACK_FRAME_OVERHEAD(%r1)
975 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
976 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
979 brasl %r14,s390_handle_mcck
982 lg %r14,__LC_VDSO_PER_CPU
983 lmg %r0,%r10,__PT_R0(%r11)
984 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
985 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
988 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
989 0: lmg %r11,%r15,__PT_R11(%r11)
990 lpswe __LC_RETURN_MCCK_PSW
993 lg %r15,__LC_PANIC_STACK
994 la %r11,STACK_FRAME_OVERHEAD(%r15)
998 # PSW restart interrupt handler
1000 ENTRY(restart_int_handler)
1001 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
1003 .insn s,0xb2800000,__LC_LPP
1004 0: stg %r15,__LC_SAVE_AREA_RESTART
1005 lg %r15,__LC_RESTART_STACK
1006 aghi %r15,-__PT_SIZE # create pt_regs on stack
1007 xc 0(__PT_SIZE,%r15),0(%r15)
1008 stmg %r0,%r14,__PT_R0(%r15)
1009 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1010 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
1011 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack
1012 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1013 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
1014 lg %r2,__LC_RESTART_DATA
1015 lg %r3,__LC_RESTART_SOURCE
1016 ltgr %r3,%r3 # test source cpu address
1017 jm 1f # negative -> skip source stop
1018 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
1019 brc 10,0b # wait for status stored
1020 1: basr %r14,%r1 # call function
1021 stap __SF_EMPTY(%r15) # store cpu address
1022 llgh %r3,__SF_EMPTY(%r15)
1023 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
1027 .section .kprobes.text, "ax"
1029 #ifdef CONFIG_CHECK_STACK
1031 * The synchronous or the asynchronous stack overflowed. We are dead.
1032 * No need to properly save the registers, we are going to panic anyway.
1033 * Setup a pt_regs so that show_trace can provide a good call trace.
1036 lg %r15,__LC_PANIC_STACK # change to panic stack
1037 la %r11,STACK_FRAME_OVERHEAD(%r15)
1038 stmg %r0,%r7,__PT_R0(%r11)
1039 stmg %r8,%r9,__PT_PSW(%r11)
1040 mvc __PT_R8(64,%r11),0(%r14)
1041 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1042 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1043 lgr %r2,%r11 # pass pointer to pt_regs
1044 jg kernel_stack_overflow
1048 #if IS_ENABLED(CONFIG_KVM)
1049 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap
1051 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1054 clg %r9,BASED(.Lcleanup_table) # system_call
1056 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc
1057 jl .Lcleanup_system_call
1058 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif
1060 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore
1061 jl .Lcleanup_sysc_tif
1062 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done
1063 jl .Lcleanup_sysc_restore
1064 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif
1066 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore
1068 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done
1069 jl .Lcleanup_io_restore
1070 clg %r9,BASED(.Lcleanup_table+64) # psw_idle
1072 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end
1074 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs
1076 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end
1077 jl .Lcleanup_save_fpu_regs
1078 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs
1080 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
1081 jl .Lcleanup_load_fpu_regs
1089 .quad .Lsysc_restore
1095 .quad .Lpsw_idle_end
1097 .quad .Lsave_fpu_regs_end
1099 .quad .Lload_fpu_regs_end
1101 #if IS_ENABLED(CONFIG_KVM)
1102 .Lcleanup_table_sie:
1107 lg %r9,__SF_EMPTY(%r15) # get control block pointer
1108 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1109 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1110 larl %r9,sie_exit # skip forward to sie_exit
1114 .Lcleanup_system_call:
1115 # check if stpt has been executed
1116 clg %r9,BASED(.Lcleanup_system_call_insn)
1118 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1119 cghi %r11,__LC_SAVE_AREA_ASYNC
1121 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
1122 0: # check if stmg has been executed
1123 clg %r9,BASED(.Lcleanup_system_call_insn+8)
1125 mvc __LC_SAVE_AREA_SYNC(64),0(%r11)
1126 0: # check if base register setup + TIF bit load has been done
1127 clg %r9,BASED(.Lcleanup_system_call_insn+16)
1129 # set up saved register r12 task struct pointer
1131 # set up saved register r13 __TASK_thread offset
1132 mvc 40(8,%r11),BASED(.Lcleanup_system_call_const)
1133 0: # check if the user time update has been done
1134 clg %r9,BASED(.Lcleanup_system_call_insn+24)
1136 lg %r15,__LC_EXIT_TIMER
1137 slg %r15,__LC_SYNC_ENTER_TIMER
1138 alg %r15,__LC_USER_TIMER
1139 stg %r15,__LC_USER_TIMER
1140 0: # check if the system time update has been done
1141 clg %r9,BASED(.Lcleanup_system_call_insn+32)
1143 lg %r15,__LC_LAST_UPDATE_TIMER
1144 slg %r15,__LC_EXIT_TIMER
1145 alg %r15,__LC_SYSTEM_TIMER
1146 stg %r15,__LC_SYSTEM_TIMER
1147 0: # update accounting time stamp
1148 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1149 # set up saved register r11
1150 lg %r15,__LC_KERNEL_STACK
1151 la %r9,STACK_FRAME_OVERHEAD(%r15)
1152 stg %r9,24(%r11) # r11 pt_regs pointer
1154 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1155 stmg %r0,%r7,__PT_R0(%r9)
1156 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1157 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC
1158 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1159 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL
1160 # setup saved register r15
1161 stg %r15,56(%r11) # r15 stack pointer
1162 # set new psw address and exit
1163 larl %r9,.Lsysc_do_svc
1165 .Lcleanup_system_call_insn:
1169 .quad .Lsysc_vtime+36
1170 .quad .Lsysc_vtime+42
1171 .Lcleanup_system_call_const:
1178 .Lcleanup_sysc_restore:
1179 # check if stpt has been executed
1180 clg %r9,BASED(.Lcleanup_sysc_restore_insn)
1182 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1183 cghi %r11,__LC_SAVE_AREA_ASYNC
1185 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1186 0: clg %r9,BASED(.Lcleanup_sysc_restore_insn+8)
1188 lg %r9,24(%r11) # get saved pointer to pt_regs
1189 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1190 mvc 0(64,%r11),__PT_R8(%r9)
1191 lmg %r0,%r7,__PT_R0(%r9)
1192 1: lmg %r8,%r9,__LC_RETURN_PSW
1194 .Lcleanup_sysc_restore_insn:
1195 .quad .Lsysc_exit_timer
1196 .quad .Lsysc_done - 4
1202 .Lcleanup_io_restore:
1203 # check if stpt has been executed
1204 clg %r9,BASED(.Lcleanup_io_restore_insn)
1206 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1207 0: clg %r9,BASED(.Lcleanup_io_restore_insn+8)
1209 lg %r9,24(%r11) # get saved r11 pointer to pt_regs
1210 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1211 mvc 0(64,%r11),__PT_R8(%r9)
1212 lmg %r0,%r7,__PT_R0(%r9)
1213 1: lmg %r8,%r9,__LC_RETURN_PSW
1215 .Lcleanup_io_restore_insn:
1216 .quad .Lio_exit_timer
1220 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1221 # copy interrupt clock & cpu timer
1222 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1223 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1224 cghi %r11,__LC_SAVE_AREA_ASYNC
1226 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1227 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
1228 0: # check if stck & stpt have been executed
1229 clg %r9,BASED(.Lcleanup_idle_insn)
1231 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1232 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
1233 1: # calculate idle cycles
1235 clg %r9,BASED(.Lcleanup_idle_insn)
1237 larl %r1,smp_cpu_mtid
1241 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1243 ag %r3,__LC_PERCPU_OFFSET
1244 la %r4,__SF_EMPTY+16(%r15)
1253 3: # account system time going idle
1254 lg %r9,__LC_STEAL_TIMER
1255 alg %r9,__CLOCK_IDLE_ENTER(%r2)
1256 slg %r9,__LC_LAST_UPDATE_CLOCK
1257 stg %r9,__LC_STEAL_TIMER
1258 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1259 lg %r9,__LC_SYSTEM_TIMER
1260 alg %r9,__LC_LAST_UPDATE_TIMER
1261 slg %r9,__TIMER_IDLE_ENTER(%r2)
1262 stg %r9,__LC_SYSTEM_TIMER
1263 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1264 # prepare return psw
1265 nihh %r8,0xfcfd # clear irq & wait state bits
1266 lg %r9,48(%r11) # return from psw_idle
1268 .Lcleanup_idle_insn:
1269 .quad .Lpsw_idle_lpsw
1271 .Lcleanup_save_fpu_regs:
1272 larl %r9,save_fpu_regs
1275 .Lcleanup_load_fpu_regs:
1276 larl %r9,load_fpu_regs
1284 .quad .L__critical_start
1286 .quad .L__critical_end - .L__critical_start
1287 #if IS_ENABLED(CONFIG_KVM)
1288 .Lsie_critical_start:
1290 .Lsie_critical_length:
1291 .quad .Lsie_done - .Lsie_gmap
1294 .section .rodata, "a"
1295 #define SYSCALL(esame,emu) .long esame
1296 .globl sys_call_table
1298 #include "syscalls.S"
1301 #ifdef CONFIG_COMPAT
1303 #define SYSCALL(esame,emu) .long emu
1304 .globl sys_call_table_emu
1306 #include "syscalls.S"