2 * User-space Probes (UProbes) for s390
4 * Copyright IBM Corp. 2014
5 * Author(s): Jan Willeke,
8 #include <linux/uaccess.h>
9 #include <linux/uprobes.h>
10 #include <linux/compat.h>
11 #include <linux/kdebug.h>
12 #include <linux/sched/task_stack.h>
14 #include <asm/switch_to.h>
15 #include <asm/facility.h>
16 #include <asm/kprobes.h>
20 #define UPROBE_TRAP_NR UINT_MAX
22 int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm,
25 return probe_is_prohibited_opcode(auprobe->insn);
28 int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
30 if (psw_bits(regs->psw).eaba == PSW_AMODE_24BIT)
32 if (!is_compat_task() && psw_bits(regs->psw).eaba == PSW_AMODE_31BIT)
34 clear_pt_regs_flag(regs, PIF_PER_TRAP);
35 auprobe->saved_per = psw_bits(regs->psw).r;
36 auprobe->saved_int_code = regs->int_code;
37 regs->int_code = UPROBE_TRAP_NR;
38 regs->psw.addr = current->utask->xol_vaddr;
39 set_tsk_thread_flag(current, TIF_UPROBE_SINGLESTEP);
40 update_cr_regs(current);
44 bool arch_uprobe_xol_was_trapped(struct task_struct *tsk)
46 struct pt_regs *regs = task_pt_regs(tsk);
48 if (regs->int_code != UPROBE_TRAP_NR)
53 static int check_per_event(unsigned short cause, unsigned long control,
56 if (!(regs->psw.mask & PSW_MASK_PER))
58 /* user space single step */
61 /* over indication for storage alteration */
62 if ((control & 0x20200000) && (cause & 0x2000))
66 if ((control & 0x80800000) == 0x80000000)
68 /* branch into selected range */
69 if (((control & 0x80800000) == 0x80800000) &&
70 regs->psw.addr >= current->thread.per_user.start &&
71 regs->psw.addr <= current->thread.per_user.end)
77 int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
79 int fixup = probe_get_fixup_type(auprobe->insn);
80 struct uprobe_task *utask = current->utask;
82 clear_tsk_thread_flag(current, TIF_UPROBE_SINGLESTEP);
83 update_cr_regs(current);
84 psw_bits(regs->psw).r = auprobe->saved_per;
85 regs->int_code = auprobe->saved_int_code;
87 if (fixup & FIXUP_PSW_NORMAL)
88 regs->psw.addr += utask->vaddr - utask->xol_vaddr;
89 if (fixup & FIXUP_RETURN_REGISTER) {
90 int reg = (auprobe->insn[0] & 0xf0) >> 4;
92 regs->gprs[reg] += utask->vaddr - utask->xol_vaddr;
94 if (fixup & FIXUP_BRANCH_NOT_TAKEN) {
95 int ilen = insn_length(auprobe->insn[0] >> 8);
97 if (regs->psw.addr - utask->xol_vaddr == ilen)
98 regs->psw.addr = utask->vaddr + ilen;
100 if (check_per_event(current->thread.per_event.cause,
101 current->thread.per_user.control, regs)) {
102 /* fix per address */
103 current->thread.per_event.address = utask->vaddr;
104 /* trigger per event */
105 set_pt_regs_flag(regs, PIF_PER_TRAP);
110 int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val,
113 struct die_args *args = data;
114 struct pt_regs *regs = args->regs;
116 if (!user_mode(regs))
118 if (regs->int_code & 0x200) /* Trap during transaction */
122 if (uprobe_pre_sstep_notifier(regs))
126 if (uprobe_post_sstep_notifier(regs))
134 void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
136 clear_thread_flag(TIF_UPROBE_SINGLESTEP);
137 regs->int_code = auprobe->saved_int_code;
138 regs->psw.addr = current->utask->vaddr;
139 current->thread.per_event.address = current->utask->vaddr;
142 unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline,
143 struct pt_regs *regs)
147 orig = regs->gprs[14];
148 regs->gprs[14] = trampoline;
152 /* Instruction Emulation */
154 static void adjust_psw_addr(psw_t *psw, unsigned long len)
156 psw->addr = __rewind_psw(*psw, -len);
159 #define EMU_ILLEGAL_OP 1
160 #define EMU_SPECIFICATION 2
161 #define EMU_ADDRESSING 3
163 #define emu_load_ril(ptr, output) \
165 unsigned int mask = sizeof(*(ptr)) - 1; \
166 __typeof__(*(ptr)) input; \
169 if (!test_facility(34)) \
170 __rc = EMU_ILLEGAL_OP; \
171 else if ((u64 __force)ptr & mask) \
172 __rc = EMU_SPECIFICATION; \
173 else if (get_user(input, ptr)) \
174 __rc = EMU_ADDRESSING; \
180 #define emu_store_ril(regs, ptr, input) \
182 unsigned int mask = sizeof(*(ptr)) - 1; \
183 __typeof__(ptr) __ptr = (ptr); \
186 if (!test_facility(34)) \
187 __rc = EMU_ILLEGAL_OP; \
188 else if ((u64 __force)__ptr & mask) \
189 __rc = EMU_SPECIFICATION; \
190 else if (put_user(*(input), __ptr)) \
191 __rc = EMU_ADDRESSING; \
193 sim_stor_event(regs, \
194 (void __force *)__ptr, \
199 #define emu_cmp_ril(regs, ptr, cmp) \
201 unsigned int mask = sizeof(*(ptr)) - 1; \
202 __typeof__(*(ptr)) input; \
205 if (!test_facility(34)) \
206 __rc = EMU_ILLEGAL_OP; \
207 else if ((u64 __force)ptr & mask) \
208 __rc = EMU_SPECIFICATION; \
209 else if (get_user(input, ptr)) \
210 __rc = EMU_ADDRESSING; \
211 else if (input > *(cmp)) \
212 psw_bits((regs)->psw).cc = 1; \
213 else if (input < *(cmp)) \
214 psw_bits((regs)->psw).cc = 2; \
216 psw_bits((regs)->psw).cc = 0; \
227 union split_register {
237 * If user per registers are setup to trace storage alterations and an
238 * emulated store took place on a fitting address a user trap is generated.
240 static void sim_stor_event(struct pt_regs *regs, void *addr, int len)
242 if (!(regs->psw.mask & PSW_MASK_PER))
244 if (!(current->thread.per_user.control & PER_EVENT_STORE))
246 if ((void *)current->thread.per_user.start > (addr + len))
248 if ((void *)current->thread.per_user.end < addr)
250 current->thread.per_event.address = regs->psw.addr;
251 current->thread.per_event.cause = PER_EVENT_STORE >> 16;
252 set_pt_regs_flag(regs, PIF_PER_TRAP);
256 * pc relative instructions are emulated, since parameters may not be
257 * accessible from the xol area due to range limitations.
259 static void handle_insn_ril(struct arch_uprobe *auprobe, struct pt_regs *regs)
261 union split_register *rx;
262 struct insn_ril *insn;
267 insn = (struct insn_ril *) &auprobe->insn;
268 rx = (union split_register *) ®s->gprs[insn->reg];
269 uptr = (void *)(regs->psw.addr + (insn->disp * 2));
270 ilen = insn_length(insn->opc0);
272 switch (insn->opc0) {
274 switch (insn->opc1) {
275 case 0x00: /* larl */
276 rx->u64 = (unsigned long)uptr;
281 switch (insn->opc1) {
282 case 0x02: /* llhrl */
283 rc = emu_load_ril((u16 __user *)uptr, &rx->u32[1]);
285 case 0x04: /* lghrl */
286 rc = emu_load_ril((s16 __user *)uptr, &rx->u64);
288 case 0x05: /* lhrl */
289 rc = emu_load_ril((s16 __user *)uptr, &rx->u32[1]);
291 case 0x06: /* llghrl */
292 rc = emu_load_ril((u16 __user *)uptr, &rx->u64);
294 case 0x08: /* lgrl */
295 rc = emu_load_ril((u64 __user *)uptr, &rx->u64);
297 case 0x0c: /* lgfrl */
298 rc = emu_load_ril((s32 __user *)uptr, &rx->u64);
301 rc = emu_load_ril((u32 __user *)uptr, &rx->u32[1]);
303 case 0x0e: /* llgfrl */
304 rc = emu_load_ril((u32 __user *)uptr, &rx->u64);
306 case 0x07: /* sthrl */
307 rc = emu_store_ril(regs, (u16 __user *)uptr, &rx->u16[3]);
309 case 0x0b: /* stgrl */
310 rc = emu_store_ril(regs, (u64 __user *)uptr, &rx->u64);
312 case 0x0f: /* strl */
313 rc = emu_store_ril(regs, (u32 __user *)uptr, &rx->u32[1]);
318 switch (insn->opc1) {
319 case 0x02: /* pfdrl */
320 if (!test_facility(34))
323 case 0x04: /* cghrl */
324 rc = emu_cmp_ril(regs, (s16 __user *)uptr, &rx->s64);
326 case 0x05: /* chrl */
327 rc = emu_cmp_ril(regs, (s16 __user *)uptr, &rx->s32[1]);
329 case 0x06: /* clghrl */
330 rc = emu_cmp_ril(regs, (u16 __user *)uptr, &rx->u64);
332 case 0x07: /* clhrl */
333 rc = emu_cmp_ril(regs, (u16 __user *)uptr, &rx->u32[1]);
335 case 0x08: /* cgrl */
336 rc = emu_cmp_ril(regs, (s64 __user *)uptr, &rx->s64);
338 case 0x0a: /* clgrl */
339 rc = emu_cmp_ril(regs, (u64 __user *)uptr, &rx->u64);
341 case 0x0c: /* cgfrl */
342 rc = emu_cmp_ril(regs, (s32 __user *)uptr, &rx->s64);
345 rc = emu_cmp_ril(regs, (s32 __user *)uptr, &rx->s32[1]);
347 case 0x0e: /* clgfrl */
348 rc = emu_cmp_ril(regs, (u32 __user *)uptr, &rx->u64);
350 case 0x0f: /* clrl */
351 rc = emu_cmp_ril(regs, (u32 __user *)uptr, &rx->u32[1]);
356 adjust_psw_addr(®s->psw, ilen);
359 regs->int_code = ilen << 16 | 0x0001;
360 do_report_trap(regs, SIGILL, ILL_ILLOPC, NULL);
362 case EMU_SPECIFICATION:
363 regs->int_code = ilen << 16 | 0x0006;
364 do_report_trap(regs, SIGILL, ILL_ILLOPC , NULL);
367 regs->int_code = ilen << 16 | 0x0005;
368 do_report_trap(regs, SIGSEGV, SEGV_MAPERR, NULL);
373 bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
375 if ((psw_bits(regs->psw).eaba == PSW_AMODE_24BIT) ||
376 ((psw_bits(regs->psw).eaba == PSW_AMODE_31BIT) &&
377 !is_compat_task())) {
378 regs->psw.addr = __rewind_psw(regs->psw, UPROBE_SWBP_INSN_SIZE);
379 do_report_trap(regs, SIGILL, ILL_ILLADR, NULL);
382 if (probe_is_insn_relative_long(auprobe->insn)) {
383 handle_insn_ril(auprobe, regs);