2 * guest access functions
4 * Copyright IBM Corp. 2014
8 #include <linux/vmalloc.h>
10 #include <asm/pgtable.h>
14 #include <asm/switch_to.h>
19 unsigned long origin : 52; /* Region- or Segment-Table Origin */
21 unsigned long g : 1; /* Subspace Group Control */
22 unsigned long p : 1; /* Private Space Control */
23 unsigned long s : 1; /* Storage-Alteration-Event Control */
24 unsigned long x : 1; /* Space-Switch-Event Control */
25 unsigned long r : 1; /* Real-Space Control */
27 unsigned long dt : 2; /* Designation-Type Control */
28 unsigned long tl : 2; /* Region- or Segment-Table Length */
33 ASCE_TYPE_SEGMENT = 0,
34 ASCE_TYPE_REGION3 = 1,
35 ASCE_TYPE_REGION2 = 2,
39 union region1_table_entry {
42 unsigned long rto: 52;/* Region-Table Origin */
44 unsigned long p : 1; /* DAT-Protection Bit */
46 unsigned long tf : 2; /* Region-Second-Table Offset */
47 unsigned long i : 1; /* Region-Invalid Bit */
49 unsigned long tt : 2; /* Table-Type Bits */
50 unsigned long tl : 2; /* Region-Second-Table Length */
54 union region2_table_entry {
57 unsigned long rto: 52;/* Region-Table Origin */
59 unsigned long p : 1; /* DAT-Protection Bit */
61 unsigned long tf : 2; /* Region-Third-Table Offset */
62 unsigned long i : 1; /* Region-Invalid Bit */
64 unsigned long tt : 2; /* Table-Type Bits */
65 unsigned long tl : 2; /* Region-Third-Table Length */
69 struct region3_table_entry_fc0 {
70 unsigned long sto: 52;/* Segment-Table Origin */
72 unsigned long fc : 1; /* Format-Control */
73 unsigned long p : 1; /* DAT-Protection Bit */
75 unsigned long tf : 2; /* Segment-Table Offset */
76 unsigned long i : 1; /* Region-Invalid Bit */
77 unsigned long cr : 1; /* Common-Region Bit */
78 unsigned long tt : 2; /* Table-Type Bits */
79 unsigned long tl : 2; /* Segment-Table Length */
82 struct region3_table_entry_fc1 {
83 unsigned long rfaa : 33; /* Region-Frame Absolute Address */
85 unsigned long av : 1; /* ACCF-Validity Control */
86 unsigned long acc: 4; /* Access-Control Bits */
87 unsigned long f : 1; /* Fetch-Protection Bit */
88 unsigned long fc : 1; /* Format-Control */
89 unsigned long p : 1; /* DAT-Protection Bit */
90 unsigned long co : 1; /* Change-Recording Override */
92 unsigned long i : 1; /* Region-Invalid Bit */
93 unsigned long cr : 1; /* Common-Region Bit */
94 unsigned long tt : 2; /* Table-Type Bits */
98 union region3_table_entry {
100 struct region3_table_entry_fc0 fc0;
101 struct region3_table_entry_fc1 fc1;
104 unsigned long fc : 1; /* Format-Control */
106 unsigned long i : 1; /* Region-Invalid Bit */
107 unsigned long cr : 1; /* Common-Region Bit */
108 unsigned long tt : 2; /* Table-Type Bits */
113 struct segment_entry_fc0 {
114 unsigned long pto: 53;/* Page-Table Origin */
115 unsigned long fc : 1; /* Format-Control */
116 unsigned long p : 1; /* DAT-Protection Bit */
118 unsigned long i : 1; /* Segment-Invalid Bit */
119 unsigned long cs : 1; /* Common-Segment Bit */
120 unsigned long tt : 2; /* Table-Type Bits */
124 struct segment_entry_fc1 {
125 unsigned long sfaa : 44; /* Segment-Frame Absolute Address */
127 unsigned long av : 1; /* ACCF-Validity Control */
128 unsigned long acc: 4; /* Access-Control Bits */
129 unsigned long f : 1; /* Fetch-Protection Bit */
130 unsigned long fc : 1; /* Format-Control */
131 unsigned long p : 1; /* DAT-Protection Bit */
132 unsigned long co : 1; /* Change-Recording Override */
134 unsigned long i : 1; /* Segment-Invalid Bit */
135 unsigned long cs : 1; /* Common-Segment Bit */
136 unsigned long tt : 2; /* Table-Type Bits */
140 union segment_table_entry {
142 struct segment_entry_fc0 fc0;
143 struct segment_entry_fc1 fc1;
146 unsigned long fc : 1; /* Format-Control */
148 unsigned long i : 1; /* Segment-Invalid Bit */
149 unsigned long cs : 1; /* Common-Segment Bit */
150 unsigned long tt : 2; /* Table-Type Bits */
156 TABLE_TYPE_SEGMENT = 0,
157 TABLE_TYPE_REGION3 = 1,
158 TABLE_TYPE_REGION2 = 2,
159 TABLE_TYPE_REGION1 = 3
162 union page_table_entry {
165 unsigned long pfra : 52; /* Page-Frame Real Address */
166 unsigned long z : 1; /* Zero Bit */
167 unsigned long i : 1; /* Page-Invalid Bit */
168 unsigned long p : 1; /* DAT-Protection Bit */
169 unsigned long co : 1; /* Change-Recording Override */
175 * vaddress union in order to easily decode a virtual address into its
176 * region first index, region second index etc. parts.
181 unsigned long rfx : 11;
182 unsigned long rsx : 11;
183 unsigned long rtx : 11;
184 unsigned long sx : 11;
185 unsigned long px : 8;
186 unsigned long bx : 12;
189 unsigned long rfx01 : 2;
191 unsigned long rsx01 : 2;
193 unsigned long rtx01 : 2;
195 unsigned long sx01 : 2;
201 * raddress union which will contain the result (real or absolute address)
202 * after a page table walk. The rfaa, sfaa and pfra members are used to
203 * simply assign them the value of a region, segment or page table entry.
207 unsigned long rfaa : 33; /* Region-Frame Absolute Address */
208 unsigned long sfaa : 44; /* Segment-Frame Absolute Address */
209 unsigned long pfra : 52; /* Page-Frame Real Address */
232 unsigned long i : 1; /* ALEN-Invalid Bit */
234 unsigned long fo : 1; /* Fetch-Only Bit */
235 unsigned long p : 1; /* Private Bit */
236 unsigned long alesn : 8; /* Access-List-Entry Sequence Number */
237 unsigned long aleax : 16; /* Access-List-Entry Authorization Index */
240 unsigned long asteo : 25; /* ASN-Second-Table-Entry Origin */
242 unsigned long astesn : 32; /* ASTE Sequence Number */
246 unsigned long i : 1; /* ASX-Invalid Bit */
247 unsigned long ato : 29; /* Authority-Table Origin */
249 unsigned long b : 1; /* Base-Space Bit */
250 unsigned long ax : 16; /* Authorization Index */
251 unsigned long atl : 12; /* Authority-Table Length */
253 unsigned long ca : 1; /* Controlled-ASN Bit */
254 unsigned long ra : 1; /* Reusable-ASN Bit */
255 unsigned long asce : 64; /* Address-Space-Control Element */
256 unsigned long ald : 32;
257 unsigned long astesn : 32;
258 /* .. more fields there */
261 int ipte_lock_held(struct kvm_vcpu *vcpu)
263 if (vcpu->arch.sie_block->eca & 1) {
266 read_lock(&vcpu->kvm->arch.sca_lock);
267 rc = kvm_s390_get_ipte_control(vcpu->kvm)->kh != 0;
268 read_unlock(&vcpu->kvm->arch.sca_lock);
271 return vcpu->kvm->arch.ipte_lock_count != 0;
274 static void ipte_lock_simple(struct kvm_vcpu *vcpu)
276 union ipte_control old, new, *ic;
278 mutex_lock(&vcpu->kvm->arch.ipte_mutex);
279 vcpu->kvm->arch.ipte_lock_count++;
280 if (vcpu->kvm->arch.ipte_lock_count > 1)
283 read_lock(&vcpu->kvm->arch.sca_lock);
284 ic = kvm_s390_get_ipte_control(vcpu->kvm);
286 old = READ_ONCE(*ic);
288 read_unlock(&vcpu->kvm->arch.sca_lock);
294 } while (cmpxchg(&ic->val, old.val, new.val) != old.val);
295 read_unlock(&vcpu->kvm->arch.sca_lock);
297 mutex_unlock(&vcpu->kvm->arch.ipte_mutex);
300 static void ipte_unlock_simple(struct kvm_vcpu *vcpu)
302 union ipte_control old, new, *ic;
304 mutex_lock(&vcpu->kvm->arch.ipte_mutex);
305 vcpu->kvm->arch.ipte_lock_count--;
306 if (vcpu->kvm->arch.ipte_lock_count)
308 read_lock(&vcpu->kvm->arch.sca_lock);
309 ic = kvm_s390_get_ipte_control(vcpu->kvm);
311 old = READ_ONCE(*ic);
314 } while (cmpxchg(&ic->val, old.val, new.val) != old.val);
315 read_unlock(&vcpu->kvm->arch.sca_lock);
316 wake_up(&vcpu->kvm->arch.ipte_wq);
318 mutex_unlock(&vcpu->kvm->arch.ipte_mutex);
321 static void ipte_lock_siif(struct kvm_vcpu *vcpu)
323 union ipte_control old, new, *ic;
326 read_lock(&vcpu->kvm->arch.sca_lock);
327 ic = kvm_s390_get_ipte_control(vcpu->kvm);
329 old = READ_ONCE(*ic);
331 read_unlock(&vcpu->kvm->arch.sca_lock);
338 } while (cmpxchg(&ic->val, old.val, new.val) != old.val);
339 read_unlock(&vcpu->kvm->arch.sca_lock);
342 static void ipte_unlock_siif(struct kvm_vcpu *vcpu)
344 union ipte_control old, new, *ic;
346 read_lock(&vcpu->kvm->arch.sca_lock);
347 ic = kvm_s390_get_ipte_control(vcpu->kvm);
349 old = READ_ONCE(*ic);
354 } while (cmpxchg(&ic->val, old.val, new.val) != old.val);
355 read_unlock(&vcpu->kvm->arch.sca_lock);
357 wake_up(&vcpu->kvm->arch.ipte_wq);
360 void ipte_lock(struct kvm_vcpu *vcpu)
362 if (vcpu->arch.sie_block->eca & 1)
363 ipte_lock_siif(vcpu);
365 ipte_lock_simple(vcpu);
368 void ipte_unlock(struct kvm_vcpu *vcpu)
370 if (vcpu->arch.sie_block->eca & 1)
371 ipte_unlock_siif(vcpu);
373 ipte_unlock_simple(vcpu);
376 static int ar_translation(struct kvm_vcpu *vcpu, union asce *asce, ar_t ar,
382 unsigned long ald_addr, authority_table_addr;
390 save_access_regs(vcpu->run->s.regs.acrs);
391 alet.val = vcpu->run->s.regs.acrs[ar];
393 if (ar == 0 || alet.val == 0) {
394 asce->val = vcpu->arch.sie_block->gcr[1];
396 } else if (alet.val == 1) {
397 asce->val = vcpu->arch.sie_block->gcr[7];
402 return PGM_ALET_SPECIFICATION;
405 ald_addr = vcpu->arch.sie_block->gcr[5];
407 ald_addr = vcpu->arch.sie_block->gcr[2];
408 ald_addr &= 0x7fffffc0;
410 rc = read_guest_real(vcpu, ald_addr + 16, &ald.val, sizeof(union ald));
414 if (alet.alen / 8 > ald.all)
415 return PGM_ALEN_TRANSLATION;
417 if (0x7fffffff - ald.alo * 128 < alet.alen * 16)
418 return PGM_ADDRESSING;
420 rc = read_guest_real(vcpu, ald.alo * 128 + alet.alen * 16, &ale,
426 return PGM_ALEN_TRANSLATION;
427 if (ale.alesn != alet.alesn)
428 return PGM_ALE_SEQUENCE;
430 rc = read_guest_real(vcpu, ale.asteo * 64, &aste, sizeof(struct aste));
435 return PGM_ASTE_VALIDITY;
436 if (aste.astesn != ale.astesn)
437 return PGM_ASTE_SEQUENCE;
440 eax = (vcpu->arch.sie_block->gcr[8] >> 16) & 0xffff;
441 if (ale.aleax != eax) {
442 if (eax / 16 > aste.atl)
443 return PGM_EXTENDED_AUTHORITY;
445 authority_table_addr = aste.ato * 4 + eax / 4;
447 rc = read_guest_real(vcpu, authority_table_addr,
453 if ((authority_table & (0x40 >> ((eax & 3) * 2))) == 0)
454 return PGM_EXTENDED_AUTHORITY;
458 if (ale.fo == 1 && mode == GACC_STORE)
459 return PGM_PROTECTION;
461 asce->val = aste.asce;
465 struct trans_exc_code_bits {
466 unsigned long addr : 52; /* Translation-exception Address */
467 unsigned long fsi : 2; /* Access Exception Fetch/Store Indication */
469 unsigned long b60 : 1;
470 unsigned long b61 : 1;
471 unsigned long as : 2; /* ASCE Identifier */
475 FSI_UNKNOWN = 0, /* Unknown wether fetch or store */
476 FSI_STORE = 1, /* Exception was due to store operation */
477 FSI_FETCH = 2 /* Exception was due to fetch operation */
487 static int trans_exc(struct kvm_vcpu *vcpu, int code, unsigned long gva,
488 ar_t ar, enum gacc_mode mode, enum prot_type prot)
490 struct kvm_s390_pgm_info *pgm = &vcpu->arch.pgm;
491 struct trans_exc_code_bits *tec;
493 memset(pgm, 0, sizeof(*pgm));
495 tec = (struct trans_exc_code_bits *)&pgm->trans_exc_code;
506 default: /* LA and KEYC set b61 to 0, other params undefined */
511 case PGM_PAGE_TRANSLATION:
512 case PGM_REGION_FIRST_TRANS:
513 case PGM_REGION_SECOND_TRANS:
514 case PGM_REGION_THIRD_TRANS:
515 case PGM_SEGMENT_TRANSLATION:
517 * op_access_id only applies to MOVE_PAGE -> set bit 61
518 * exc_access_id has to be set to 0 for some instructions. Both
519 * cases have to be handled by the caller.
521 tec->addr = gva >> PAGE_SHIFT;
522 tec->fsi = mode == GACC_STORE ? FSI_STORE : FSI_FETCH;
523 tec->as = psw_bits(vcpu->arch.sie_block->gpsw).as;
525 case PGM_ALEN_TRANSLATION:
526 case PGM_ALE_SEQUENCE:
527 case PGM_ASTE_VALIDITY:
528 case PGM_ASTE_SEQUENCE:
529 case PGM_EXTENDED_AUTHORITY:
531 * We can always store exc_access_id, as it is
532 * undefined for non-ar cases. It is undefined for
533 * most DAT protection exceptions.
535 pgm->exc_access_id = ar;
541 static int get_vcpu_asce(struct kvm_vcpu *vcpu, union asce *asce,
542 unsigned long ga, ar_t ar, enum gacc_mode mode)
545 struct psw_bits psw = psw_bits(vcpu->arch.sie_block->gpsw);
553 if (mode == GACC_IFETCH)
554 psw.as = psw.as == PSW_AS_HOME ? PSW_AS_HOME : PSW_AS_PRIMARY;
558 asce->val = vcpu->arch.sie_block->gcr[1];
560 case PSW_AS_SECONDARY:
561 asce->val = vcpu->arch.sie_block->gcr[7];
564 asce->val = vcpu->arch.sie_block->gcr[13];
567 rc = ar_translation(vcpu, asce, ar, mode);
569 return trans_exc(vcpu, rc, ga, ar, mode, PROT_TYPE_ALC);
575 static int deref_table(struct kvm *kvm, unsigned long gpa, unsigned long *val)
577 return kvm_read_guest(kvm, gpa, val, sizeof(*val));
581 * guest_translate - translate a guest virtual into a guest absolute address
583 * @gva: guest virtual address
584 * @gpa: points to where guest physical (absolute) address should be stored
585 * @asce: effective asce
586 * @mode: indicates the access mode to be used
588 * Translate a guest virtual address into a guest absolute address by means
589 * of dynamic address translation as specified by the architecture.
590 * If the resulting absolute address is not available in the configuration
591 * an addressing exception is indicated and @gpa will not be changed.
593 * Returns: - zero on success; @gpa contains the resulting absolute address
594 * - a negative value if guest access failed due to e.g. broken
596 * - a positve value if an access exception happened. In this case
597 * the returned value is the program interruption code as defined
598 * by the architecture
600 static unsigned long guest_translate(struct kvm_vcpu *vcpu, unsigned long gva,
601 unsigned long *gpa, const union asce asce,
604 union vaddress vaddr = {.addr = gva};
605 union raddress raddr = {.addr = gva};
606 union page_table_entry pte;
607 int dat_protection = 0;
608 union ctlreg0 ctlreg0;
612 ctlreg0.val = vcpu->arch.sie_block->gcr[0];
613 edat1 = ctlreg0.edat && test_kvm_facility(vcpu->kvm, 8);
614 edat2 = edat1 && test_kvm_facility(vcpu->kvm, 78);
617 ptr = asce.origin * 4096;
619 case ASCE_TYPE_REGION1:
620 if (vaddr.rfx01 > asce.tl)
621 return PGM_REGION_FIRST_TRANS;
622 ptr += vaddr.rfx * 8;
624 case ASCE_TYPE_REGION2:
626 return PGM_ASCE_TYPE;
627 if (vaddr.rsx01 > asce.tl)
628 return PGM_REGION_SECOND_TRANS;
629 ptr += vaddr.rsx * 8;
631 case ASCE_TYPE_REGION3:
632 if (vaddr.rfx || vaddr.rsx)
633 return PGM_ASCE_TYPE;
634 if (vaddr.rtx01 > asce.tl)
635 return PGM_REGION_THIRD_TRANS;
636 ptr += vaddr.rtx * 8;
638 case ASCE_TYPE_SEGMENT:
639 if (vaddr.rfx || vaddr.rsx || vaddr.rtx)
640 return PGM_ASCE_TYPE;
641 if (vaddr.sx01 > asce.tl)
642 return PGM_SEGMENT_TRANSLATION;
647 case ASCE_TYPE_REGION1: {
648 union region1_table_entry rfte;
650 if (kvm_is_error_gpa(vcpu->kvm, ptr))
651 return PGM_ADDRESSING;
652 if (deref_table(vcpu->kvm, ptr, &rfte.val))
655 return PGM_REGION_FIRST_TRANS;
656 if (rfte.tt != TABLE_TYPE_REGION1)
657 return PGM_TRANSLATION_SPEC;
658 if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl)
659 return PGM_REGION_SECOND_TRANS;
661 dat_protection |= rfte.p;
662 ptr = rfte.rto * 4096 + vaddr.rsx * 8;
665 case ASCE_TYPE_REGION2: {
666 union region2_table_entry rste;
668 if (kvm_is_error_gpa(vcpu->kvm, ptr))
669 return PGM_ADDRESSING;
670 if (deref_table(vcpu->kvm, ptr, &rste.val))
673 return PGM_REGION_SECOND_TRANS;
674 if (rste.tt != TABLE_TYPE_REGION2)
675 return PGM_TRANSLATION_SPEC;
676 if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl)
677 return PGM_REGION_THIRD_TRANS;
679 dat_protection |= rste.p;
680 ptr = rste.rto * 4096 + vaddr.rtx * 8;
683 case ASCE_TYPE_REGION3: {
684 union region3_table_entry rtte;
686 if (kvm_is_error_gpa(vcpu->kvm, ptr))
687 return PGM_ADDRESSING;
688 if (deref_table(vcpu->kvm, ptr, &rtte.val))
691 return PGM_REGION_THIRD_TRANS;
692 if (rtte.tt != TABLE_TYPE_REGION3)
693 return PGM_TRANSLATION_SPEC;
694 if (rtte.cr && asce.p && edat2)
695 return PGM_TRANSLATION_SPEC;
696 if (rtte.fc && edat2) {
697 dat_protection |= rtte.fc1.p;
698 raddr.rfaa = rtte.fc1.rfaa;
699 goto absolute_address;
701 if (vaddr.sx01 < rtte.fc0.tf)
702 return PGM_SEGMENT_TRANSLATION;
703 if (vaddr.sx01 > rtte.fc0.tl)
704 return PGM_SEGMENT_TRANSLATION;
706 dat_protection |= rtte.fc0.p;
707 ptr = rtte.fc0.sto * 4096 + vaddr.sx * 8;
710 case ASCE_TYPE_SEGMENT: {
711 union segment_table_entry ste;
713 if (kvm_is_error_gpa(vcpu->kvm, ptr))
714 return PGM_ADDRESSING;
715 if (deref_table(vcpu->kvm, ptr, &ste.val))
718 return PGM_SEGMENT_TRANSLATION;
719 if (ste.tt != TABLE_TYPE_SEGMENT)
720 return PGM_TRANSLATION_SPEC;
721 if (ste.cs && asce.p)
722 return PGM_TRANSLATION_SPEC;
723 if (ste.fc && edat1) {
724 dat_protection |= ste.fc1.p;
725 raddr.sfaa = ste.fc1.sfaa;
726 goto absolute_address;
728 dat_protection |= ste.fc0.p;
729 ptr = ste.fc0.pto * 2048 + vaddr.px * 8;
732 if (kvm_is_error_gpa(vcpu->kvm, ptr))
733 return PGM_ADDRESSING;
734 if (deref_table(vcpu->kvm, ptr, &pte.val))
737 return PGM_PAGE_TRANSLATION;
739 return PGM_TRANSLATION_SPEC;
740 if (pte.co && !edat1)
741 return PGM_TRANSLATION_SPEC;
742 dat_protection |= pte.p;
743 raddr.pfra = pte.pfra;
745 raddr.addr = kvm_s390_real_to_abs(vcpu, raddr.addr);
747 if (mode == GACC_STORE && dat_protection)
748 return PGM_PROTECTION;
749 if (kvm_is_error_gpa(vcpu->kvm, raddr.addr))
750 return PGM_ADDRESSING;
755 static inline int is_low_address(unsigned long ga)
757 /* Check for address ranges 0..511 and 4096..4607 */
758 return (ga & ~0x11fful) == 0;
761 static int low_address_protection_enabled(struct kvm_vcpu *vcpu,
762 const union asce asce)
764 union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]};
765 psw_t *psw = &vcpu->arch.sie_block->gpsw;
769 if (psw_bits(*psw).t && asce.p)
774 static int guest_page_range(struct kvm_vcpu *vcpu, unsigned long ga, ar_t ar,
775 unsigned long *pages, unsigned long nr_pages,
776 const union asce asce, enum gacc_mode mode)
778 psw_t *psw = &vcpu->arch.sie_block->gpsw;
779 int lap_enabled, rc = 0;
781 lap_enabled = low_address_protection_enabled(vcpu, asce);
783 ga = kvm_s390_logical_to_effective(vcpu, ga);
784 if (mode == GACC_STORE && lap_enabled && is_low_address(ga))
785 return trans_exc(vcpu, PGM_PROTECTION, ga, ar, mode,
788 if (psw_bits(*psw).t) {
789 rc = guest_translate(vcpu, ga, pages, asce, mode);
793 *pages = kvm_s390_real_to_abs(vcpu, ga);
794 if (kvm_is_error_gpa(vcpu->kvm, *pages))
798 return trans_exc(vcpu, rc, ga, ar, mode, PROT_TYPE_DAT);
806 int access_guest(struct kvm_vcpu *vcpu, unsigned long ga, ar_t ar, void *data,
807 unsigned long len, enum gacc_mode mode)
809 psw_t *psw = &vcpu->arch.sie_block->gpsw;
810 unsigned long _len, nr_pages, gpa, idx;
811 unsigned long pages_array[2];
812 unsigned long *pages;
819 ga = kvm_s390_logical_to_effective(vcpu, ga);
820 rc = get_vcpu_asce(vcpu, &asce, ga, ar, mode);
823 nr_pages = (((ga & ~PAGE_MASK) + len - 1) >> PAGE_SHIFT) + 1;
825 if (nr_pages > ARRAY_SIZE(pages_array))
826 pages = vmalloc(nr_pages * sizeof(unsigned long));
829 need_ipte_lock = psw_bits(*psw).t && !asce.r;
832 rc = guest_page_range(vcpu, ga, ar, pages, nr_pages, asce, mode);
833 for (idx = 0; idx < nr_pages && !rc; idx++) {
834 gpa = *(pages + idx) + (ga & ~PAGE_MASK);
835 _len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len);
836 if (mode == GACC_STORE)
837 rc = kvm_write_guest(vcpu->kvm, gpa, data, _len);
839 rc = kvm_read_guest(vcpu->kvm, gpa, data, _len);
846 if (nr_pages > ARRAY_SIZE(pages_array))
851 int access_guest_real(struct kvm_vcpu *vcpu, unsigned long gra,
852 void *data, unsigned long len, enum gacc_mode mode)
854 unsigned long _len, gpa;
858 gpa = kvm_s390_real_to_abs(vcpu, gra);
859 _len = min(PAGE_SIZE - (gpa & ~PAGE_MASK), len);
861 rc = write_guest_abs(vcpu, gpa, data, _len);
863 rc = read_guest_abs(vcpu, gpa, data, _len);
872 * guest_translate_address - translate guest logical into guest absolute address
874 * Parameter semantics are the same as the ones from guest_translate.
875 * The memory contents at the guest address are not changed.
877 * Note: The IPTE lock is not taken during this function, so the caller
878 * has to take care of this.
880 int guest_translate_address(struct kvm_vcpu *vcpu, unsigned long gva, ar_t ar,
881 unsigned long *gpa, enum gacc_mode mode)
883 psw_t *psw = &vcpu->arch.sie_block->gpsw;
887 gva = kvm_s390_logical_to_effective(vcpu, gva);
888 rc = get_vcpu_asce(vcpu, &asce, gva, ar, mode);
891 if (is_low_address(gva) && low_address_protection_enabled(vcpu, asce)) {
892 if (mode == GACC_STORE)
893 return trans_exc(vcpu, PGM_PROTECTION, gva, 0,
897 if (psw_bits(*psw).t && !asce.r) { /* Use DAT? */
898 rc = guest_translate(vcpu, gva, gpa, asce, mode);
900 return trans_exc(vcpu, rc, gva, 0, mode, PROT_TYPE_DAT);
902 *gpa = kvm_s390_real_to_abs(vcpu, gva);
903 if (kvm_is_error_gpa(vcpu->kvm, *gpa))
904 return trans_exc(vcpu, rc, gva, PGM_ADDRESSING, mode, 0);
911 * check_gva_range - test a range of guest virtual addresses for accessibility
913 int check_gva_range(struct kvm_vcpu *vcpu, unsigned long gva, ar_t ar,
914 unsigned long length, enum gacc_mode mode)
917 unsigned long currlen;
921 while (length > 0 && !rc) {
922 currlen = min(length, PAGE_SIZE - (gva % PAGE_SIZE));
923 rc = guest_translate_address(vcpu, gva, ar, &gpa, mode);
933 * kvm_s390_check_low_addr_prot_real - check for low-address protection
934 * @gra: Guest real address
936 * Checks whether an address is subject to low-address protection and set
937 * up vcpu->arch.pgm accordingly if necessary.
939 * Return: 0 if no protection exception, or PGM_PROTECTION if protected.
941 int kvm_s390_check_low_addr_prot_real(struct kvm_vcpu *vcpu, unsigned long gra)
943 union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]};
945 if (!ctlreg0.lap || !is_low_address(gra))
947 return trans_exc(vcpu, PGM_PROTECTION, gra, 0, GACC_STORE, PROT_TYPE_LA);
951 * kvm_s390_shadow_tables - walk the guest page table and create shadow tables
952 * @sg: pointer to the shadow guest address space structure
953 * @saddr: faulting address in the shadow gmap
954 * @pgt: pointer to the page table address result
955 * @fake: pgt references contiguous guest memory block, not a pgtable
957 static int kvm_s390_shadow_tables(struct gmap *sg, unsigned long saddr,
958 unsigned long *pgt, int *dat_protection,
963 union vaddress vaddr;
971 asce.val = sg->orig_asce;
972 ptr = asce.origin * 4096;
975 asce.dt = ASCE_TYPE_REGION1;
978 case ASCE_TYPE_REGION1:
979 if (vaddr.rfx01 > asce.tl && !asce.r)
980 return PGM_REGION_FIRST_TRANS;
982 case ASCE_TYPE_REGION2:
984 return PGM_ASCE_TYPE;
985 if (vaddr.rsx01 > asce.tl)
986 return PGM_REGION_SECOND_TRANS;
988 case ASCE_TYPE_REGION3:
989 if (vaddr.rfx || vaddr.rsx)
990 return PGM_ASCE_TYPE;
991 if (vaddr.rtx01 > asce.tl)
992 return PGM_REGION_THIRD_TRANS;
994 case ASCE_TYPE_SEGMENT:
995 if (vaddr.rfx || vaddr.rsx || vaddr.rtx)
996 return PGM_ASCE_TYPE;
997 if (vaddr.sx01 > asce.tl)
998 return PGM_SEGMENT_TRANSLATION;
1003 case ASCE_TYPE_REGION1: {
1004 union region1_table_entry rfte;
1007 /* offset in 16EB guest memory block */
1008 ptr = ptr + ((unsigned long) vaddr.rsx << 53UL);
1012 rc = gmap_read_table(parent, ptr + vaddr.rfx * 8, &rfte.val);
1016 return PGM_REGION_FIRST_TRANS;
1017 if (rfte.tt != TABLE_TYPE_REGION1)
1018 return PGM_TRANSLATION_SPEC;
1019 if (vaddr.rsx01 < rfte.tf || vaddr.rsx01 > rfte.tl)
1020 return PGM_REGION_SECOND_TRANS;
1021 if (sg->edat_level >= 1)
1022 *dat_protection |= rfte.p;
1023 ptr = rfte.rto << 12UL;
1025 rc = gmap_shadow_r2t(sg, saddr, rfte.val, *fake);
1030 case ASCE_TYPE_REGION2: {
1031 union region2_table_entry rste;
1034 /* offset in 8PB guest memory block */
1035 ptr = ptr + ((unsigned long) vaddr.rtx << 42UL);
1039 rc = gmap_read_table(parent, ptr + vaddr.rsx * 8, &rste.val);
1043 return PGM_REGION_SECOND_TRANS;
1044 if (rste.tt != TABLE_TYPE_REGION2)
1045 return PGM_TRANSLATION_SPEC;
1046 if (vaddr.rtx01 < rste.tf || vaddr.rtx01 > rste.tl)
1047 return PGM_REGION_THIRD_TRANS;
1048 if (sg->edat_level >= 1)
1049 *dat_protection |= rste.p;
1050 ptr = rste.rto << 12UL;
1052 rste.p |= *dat_protection;
1053 rc = gmap_shadow_r3t(sg, saddr, rste.val, *fake);
1058 case ASCE_TYPE_REGION3: {
1059 union region3_table_entry rtte;
1062 /* offset in 4TB guest memory block */
1063 ptr = ptr + ((unsigned long) vaddr.sx << 31UL);
1067 rc = gmap_read_table(parent, ptr + vaddr.rtx * 8, &rtte.val);
1071 return PGM_REGION_THIRD_TRANS;
1072 if (rtte.tt != TABLE_TYPE_REGION3)
1073 return PGM_TRANSLATION_SPEC;
1074 if (rtte.cr && asce.p && sg->edat_level >= 2)
1075 return PGM_TRANSLATION_SPEC;
1076 if (rtte.fc && sg->edat_level >= 2) {
1077 *dat_protection |= rtte.fc0.p;
1079 ptr = rtte.fc1.rfaa << 31UL;
1083 if (vaddr.sx01 < rtte.fc0.tf || vaddr.sx01 > rtte.fc0.tl)
1084 return PGM_SEGMENT_TRANSLATION;
1085 if (sg->edat_level >= 1)
1086 *dat_protection |= rtte.fc0.p;
1087 ptr = rtte.fc0.sto << 12UL;
1089 rtte.fc0.p |= *dat_protection;
1090 rc = gmap_shadow_sgt(sg, saddr, rtte.val, *fake);
1095 case ASCE_TYPE_SEGMENT: {
1096 union segment_table_entry ste;
1099 /* offset in 2G guest memory block */
1100 ptr = ptr + ((unsigned long) vaddr.sx << 20UL);
1104 rc = gmap_read_table(parent, ptr + vaddr.sx * 8, &ste.val);
1108 return PGM_SEGMENT_TRANSLATION;
1109 if (ste.tt != TABLE_TYPE_SEGMENT)
1110 return PGM_TRANSLATION_SPEC;
1111 if (ste.cs && asce.p)
1112 return PGM_TRANSLATION_SPEC;
1113 *dat_protection |= ste.fc0.p;
1114 if (ste.fc && sg->edat_level >= 1) {
1116 ptr = ste.fc1.sfaa << 20UL;
1120 ptr = ste.fc0.pto << 11UL;
1122 ste.fc0.p |= *dat_protection;
1123 rc = gmap_shadow_pgt(sg, saddr, ste.val, *fake);
1128 /* Return the parent address of the page table */
1134 * kvm_s390_shadow_fault - handle fault on a shadow page table
1135 * @vcpu: virtual cpu
1136 * @sg: pointer to the shadow guest address space structure
1137 * @saddr: faulting address in the shadow gmap
1139 * Returns: - 0 if the shadow fault was successfully resolved
1140 * - > 0 (pgm exception code) on exceptions while faulting
1141 * - -EAGAIN if the caller can retry immediately
1142 * - -EFAULT when accessing invalid guest addresses
1143 * - -ENOMEM if out of memory
1145 int kvm_s390_shadow_fault(struct kvm_vcpu *vcpu, struct gmap *sg,
1146 unsigned long saddr)
1148 union vaddress vaddr;
1149 union page_table_entry pte;
1151 int dat_protection, fake;
1154 down_read(&sg->mm->mmap_sem);
1156 * We don't want any guest-2 tables to change - so the parent
1157 * tables/pointers we read stay valid - unshadowing is however
1158 * always possible - only guest_table_lock protects us.
1162 rc = gmap_shadow_pgt_lookup(sg, saddr, &pgt, &dat_protection, &fake);
1164 rc = kvm_s390_shadow_tables(sg, saddr, &pgt, &dat_protection,
1169 /* offset in 1MB guest memory block */
1170 pte.val = pgt + ((unsigned long) vaddr.px << 12UL);
1174 rc = gmap_read_table(sg->parent, pgt + vaddr.px * 8, &pte.val);
1176 rc = PGM_PAGE_TRANSLATION;
1177 if (!rc && (pte.z || (pte.co && sg->edat_level < 1)))
1178 rc = PGM_TRANSLATION_SPEC;
1180 pte.p |= dat_protection;
1182 rc = gmap_shadow_page(sg, saddr, __pte(pte.val));
1184 up_read(&sg->mm->mmap_sem);