2 * linux/arch/sh/boards/se/7724/setup.c
4 * Copyright (C) 2009 Renesas Solutions Corp.
6 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/mfd/sh_mobile_sdhi.h>
18 #include <linux/mtd/physmap.h>
19 #include <linux/delay.h>
20 #include <linux/smc91x.h>
21 #include <linux/gpio.h>
22 #include <linux/input.h>
23 #include <linux/input/sh_keysc.h>
24 #include <linux/usb/r8a66597.h>
25 #include <video/sh_mobile_lcdc.h>
26 #include <media/sh_mobile_ceu.h>
27 #include <sound/sh_fsi.h>
29 #include <asm/heartbeat.h>
30 #include <asm/sh_eth.h>
31 #include <asm/clock.h>
32 #include <asm/suspend.h>
33 #include <cpu/sh7724.h>
34 #include <mach-se/mach/se7724.h>
38 * ------------------------------------
39 * SW31 : 1001 1100 : default
40 * SW32 : 0111 1111 : use on board flash
42 * SW41 : abxx xxxx -> a = 0 : Analog monitor
51 * When you use 1280 x 720 lcdc output,
52 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
53 * and change SW41 to use 720p
59 * This setup.c supports FSI slave mode.
60 * Please change J20, J21, J22 pin to 1-2 connection.
64 static struct resource heartbeat_resource = {
67 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
70 static struct platform_device heartbeat_device = {
74 .resource = &heartbeat_resource,
78 static struct smc91x_platdata smc91x_info = {
79 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
82 static struct resource smc91x_eth_resources[] = {
87 .flags = IORESOURCE_MEM,
91 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
95 static struct platform_device smc91x_eth_device = {
97 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
98 .resource = smc91x_eth_resources,
100 .platform_data = &smc91x_info,
105 static struct mtd_partition nor_flash_partitions[] = {
109 .size = (1 * 1024 * 1024),
110 .mask_flags = MTD_WRITEABLE, /* Read-only */
113 .offset = MTDPART_OFS_APPEND,
114 .size = (2 * 1024 * 1024),
117 .offset = MTDPART_OFS_APPEND,
118 .size = MTDPART_SIZ_FULL,
122 static struct physmap_flash_data nor_flash_data = {
124 .parts = nor_flash_partitions,
125 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
128 static struct resource nor_flash_resources[] = {
133 .flags = IORESOURCE_MEM,
137 static struct platform_device nor_flash_device = {
138 .name = "physmap-flash",
139 .resource = nor_flash_resources,
140 .num_resources = ARRAY_SIZE(nor_flash_resources),
142 .platform_data = &nor_flash_data,
147 const static struct fb_videomode lcdc_720p_modes[] = {
150 .sync = 0, /* hsync and vsync are active low */
162 const static struct fb_videomode lcdc_vga_modes[] = {
165 .sync = 0, /* hsync and vsync are active low */
177 static struct sh_mobile_lcdc_info lcdc_info = {
178 .clock_source = LCDC_CLK_EXTERNAL,
180 .chan = LCDC_CHAN_MAINLCD,
183 .lcd_size_cfg = { /* 7.0 inch */
192 static struct resource lcdc_resources[] = {
197 .flags = IORESOURCE_MEM,
201 .flags = IORESOURCE_IRQ,
205 static struct platform_device lcdc_device = {
206 .name = "sh_mobile_lcdc_fb",
207 .num_resources = ARRAY_SIZE(lcdc_resources),
208 .resource = lcdc_resources,
210 .platform_data = &lcdc_info,
213 .hwblk_id = HWBLK_LCDC,
218 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
219 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
222 static struct resource ceu0_resources[] = {
227 .flags = IORESOURCE_MEM,
231 .flags = IORESOURCE_IRQ,
234 /* place holder for contiguous memory */
238 static struct platform_device ceu0_device = {
239 .name = "sh_mobile_ceu",
240 .id = 0, /* "ceu0" clock */
241 .num_resources = ARRAY_SIZE(ceu0_resources),
242 .resource = ceu0_resources,
244 .platform_data = &sh_mobile_ceu0_info,
247 .hwblk_id = HWBLK_CEU0,
252 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
253 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
256 static struct resource ceu1_resources[] = {
261 .flags = IORESOURCE_MEM,
265 .flags = IORESOURCE_IRQ,
268 /* place holder for contiguous memory */
272 static struct platform_device ceu1_device = {
273 .name = "sh_mobile_ceu",
274 .id = 1, /* "ceu1" clock */
275 .num_resources = ARRAY_SIZE(ceu1_resources),
276 .resource = ceu1_resources,
278 .platform_data = &sh_mobile_ceu1_info,
281 .hwblk_id = HWBLK_CEU1,
287 * FSI-A use external clock which came from ak464x.
288 * So, we should change parent of fsi
290 #define FCLKACR 0xa4150008
291 static void fsimck_init(struct clk *clk)
293 u32 status = __raw_readl(clk->enable_reg);
295 /* use external clock */
296 status &= ~0x000000ff;
297 status |= 0x00000080;
298 __raw_writel(status, clk->enable_reg);
301 static struct clk_ops fsimck_clk_ops = {
305 static struct clk fsimcka_clk = {
306 .ops = &fsimck_clk_ops,
307 .enable_reg = (void __iomem *)FCLKACR,
308 .rate = 0, /* unknown */
311 /* change J20, J21, J22 pin to 1-2 connection to use slave mode */
312 static struct sh_fsi_platform_info fsi_info = {
313 .porta_flags = SH_FSI_BRS_INV |
314 SH_FSI_OUT_SLAVE_MODE |
315 SH_FSI_IN_SLAVE_MODE |
320 static struct resource fsi_resources[] = {
325 .flags = IORESOURCE_MEM,
329 .flags = IORESOURCE_IRQ,
333 static struct platform_device fsi_device = {
336 .num_resources = ARRAY_SIZE(fsi_resources),
337 .resource = fsi_resources,
339 .platform_data = &fsi_info,
342 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
346 /* KEYSC in SoC (Needs SW33-2 set to ON) */
347 static struct sh_keysc_info keysc_info = {
348 .mode = SH_KEYSC_MODE_1,
352 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
353 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
354 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
355 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
356 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
357 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
361 static struct resource keysc_resources[] = {
366 .flags = IORESOURCE_MEM,
370 .flags = IORESOURCE_IRQ,
374 static struct platform_device keysc_device = {
376 .id = 0, /* "keysc0" clock */
377 .num_resources = ARRAY_SIZE(keysc_resources),
378 .resource = keysc_resources,
380 .platform_data = &keysc_info,
383 .hwblk_id = HWBLK_KEYSC,
388 static struct resource sh_eth_resources[] = {
390 .start = SH_ETH_ADDR,
391 .end = SH_ETH_ADDR + 0x1FC,
392 .flags = IORESOURCE_MEM,
396 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
400 static struct sh_eth_plat_data sh_eth_plat = {
401 .phy = 0x1f, /* SMSC LAN8187 */
402 .edmac_endian = EDMAC_LITTLE_ENDIAN,
405 static struct platform_device sh_eth_device = {
409 .platform_data = &sh_eth_plat,
411 .num_resources = ARRAY_SIZE(sh_eth_resources),
412 .resource = sh_eth_resources,
414 .hwblk_id = HWBLK_ETHER,
418 static struct r8a66597_platdata sh7724_usb0_host_data = {
422 static struct resource sh7724_usb0_host_resources[] = {
425 .end = 0xa4d80124 - 1,
426 .flags = IORESOURCE_MEM,
431 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
435 static struct platform_device sh7724_usb0_host_device = {
436 .name = "r8a66597_hcd",
439 .dma_mask = NULL, /* not use dma */
440 .coherent_dma_mask = 0xffffffff,
441 .platform_data = &sh7724_usb0_host_data,
443 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
444 .resource = sh7724_usb0_host_resources,
446 .hwblk_id = HWBLK_USB0,
450 static struct r8a66597_platdata sh7724_usb1_gadget_data = {
454 static struct resource sh7724_usb1_gadget_resources[] = {
458 .flags = IORESOURCE_MEM,
463 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
467 static struct platform_device sh7724_usb1_gadget_device = {
468 .name = "r8a66597_udc",
471 .dma_mask = NULL, /* not use dma */
472 .coherent_dma_mask = 0xffffffff,
473 .platform_data = &sh7724_usb1_gadget_data,
475 .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources),
476 .resource = sh7724_usb1_gadget_resources,
479 static struct resource sdhi0_cn7_resources[] = {
484 .flags = IORESOURCE_MEM,
488 .flags = IORESOURCE_IRQ,
492 static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
493 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
494 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
497 static struct platform_device sdhi0_cn7_device = {
498 .name = "sh_mobile_sdhi",
500 .num_resources = ARRAY_SIZE(sdhi0_cn7_resources),
501 .resource = sdhi0_cn7_resources,
503 .platform_data = &sh7724_sdhi0_data,
506 .hwblk_id = HWBLK_SDHI0,
510 static struct resource sdhi1_cn8_resources[] = {
515 .flags = IORESOURCE_MEM,
519 .flags = IORESOURCE_IRQ,
523 static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
524 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
525 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
528 static struct platform_device sdhi1_cn8_device = {
529 .name = "sh_mobile_sdhi",
531 .num_resources = ARRAY_SIZE(sdhi1_cn8_resources),
532 .resource = sdhi1_cn8_resources,
534 .platform_data = &sh7724_sdhi1_data,
537 .hwblk_id = HWBLK_SDHI1,
542 static struct resource irda_resources[] = {
547 .flags = IORESOURCE_MEM,
551 .flags = IORESOURCE_IRQ,
555 static struct platform_device irda_device = {
557 .num_resources = ARRAY_SIZE(irda_resources),
558 .resource = irda_resources,
561 #include <media/ak881x.h>
562 #include <media/sh_vou.h>
564 static struct ak881x_pdata ak881x_pdata = {
565 .flags = AK881X_IF_MODE_SLAVE,
568 static struct i2c_board_info ak8813 = {
569 /* With open J18 jumper address is 0x21 */
570 I2C_BOARD_INFO("ak8813", 0x20),
571 .platform_data = &ak881x_pdata,
574 static struct sh_vou_pdata sh_vou_pdata = {
575 .bus_fmt = SH_VOU_BUS_8BIT,
576 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
577 .board_info = &ak8813,
581 static struct resource sh_vou_resources[] = {
585 .flags = IORESOURCE_MEM,
589 .flags = IORESOURCE_IRQ,
593 static struct platform_device vou_device = {
596 .num_resources = ARRAY_SIZE(sh_vou_resources),
597 .resource = sh_vou_resources,
599 .platform_data = &sh_vou_pdata,
602 .hwblk_id = HWBLK_VOU,
606 static struct platform_device *ms7724se_devices[] __initdata = {
615 &sh7724_usb0_host_device,
616 &sh7724_usb1_gadget_device,
625 static struct i2c_board_info i2c0_devices[] = {
627 I2C_BOARD_INFO("ak4642", 0x12),
631 #define EEPROM_OP 0xBA206000
632 #define EEPROM_ADR 0xBA206004
633 #define EEPROM_DATA 0xBA20600C
634 #define EEPROM_STAT 0xBA206010
635 #define EEPROM_STRT 0xBA206014
636 static int __init sh_eth_is_eeprom_ready(void)
641 if (!__raw_readw(EEPROM_STAT))
646 printk(KERN_ERR "ms7724se can not access to eeprom\n");
650 static void __init sh_eth_init(void)
655 /* check EEPROM status */
656 if (!sh_eth_is_eeprom_ready())
659 /* read MAC addr from EEPROM */
660 for (i = 0 ; i < 3 ; i++) {
661 __raw_writew(0x0, EEPROM_OP); /* read */
662 __raw_writew(i*2, EEPROM_ADR);
663 __raw_writew(0x1, EEPROM_STRT);
664 if (!sh_eth_is_eeprom_ready())
667 mac = __raw_readw(EEPROM_DATA);
668 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
669 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
673 #define SW4140 0xBA201000
674 #define FPGA_OUT 0xBA200400
675 #define PORT_HIZA 0xA4050158
676 #define PORT_MSELCRB 0xA4050182
678 #define SW41_A 0x0100
679 #define SW41_B 0x0200
680 #define SW41_C 0x0400
681 #define SW41_D 0x0800
682 #define SW41_E 0x1000
683 #define SW41_F 0x2000
684 #define SW41_G 0x4000
685 #define SW41_H 0x8000
687 extern char ms7724se_sdram_enter_start;
688 extern char ms7724se_sdram_enter_end;
689 extern char ms7724se_sdram_leave_start;
690 extern char ms7724se_sdram_leave_end;
693 static int __init arch_setup(void)
695 /* enable I2C device */
696 i2c_register_board_info(0, i2c0_devices,
697 ARRAY_SIZE(i2c0_devices));
700 arch_initcall(arch_setup);
702 static int __init devices_setup(void)
704 u16 sw = __raw_readw(SW4140); /* select camera, monitor */
708 /* register board specific self-refresh code */
709 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
711 &ms7724se_sdram_enter_start,
712 &ms7724se_sdram_enter_end,
713 &ms7724se_sdram_leave_start,
714 &ms7724se_sdram_leave_end);
716 fpga_out = __raw_readw(FPGA_OUT);
717 /* bit4: NTSC_PDN, bit5: NTSC_RESET */
718 fpga_out &= ~((1 << 1) | /* LAN */
719 (1 << 4) | /* AK8813 PDN */
720 (1 << 5) | /* AK8813 RESET */
721 (1 << 6) | /* VIDEO DAC */
722 (1 << 7) | /* AK4643 */
723 (1 << 8) | /* IrDA */
724 (1 << 12) | /* USB0 */
725 (1 << 14)); /* RMII */
726 __raw_writew(fpga_out | (1 << 4), FPGA_OUT);
731 __raw_writew(fpga_out | (1 << 5), FPGA_OUT);
735 __raw_writew(fpga_out, FPGA_OUT);
737 /* turn on USB clocks, use external clock */
738 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
740 /* Let LED9 show STATUS2 */
741 gpio_request(GPIO_FN_STATUS2, NULL);
743 /* Lit LED10 show STATUS0 */
744 gpio_request(GPIO_FN_STATUS0, NULL);
746 /* Lit LED11 show PDSTATUS */
747 gpio_request(GPIO_FN_PDSTATUS, NULL);
749 /* enable USB0 port */
750 __raw_writew(0x0600, 0xa40501d4);
752 /* enable USB1 port */
753 __raw_writew(0x0600, 0xa4050192);
755 /* enable IRQ 0,1,2 */
756 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
757 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
758 gpio_request(GPIO_FN_INTC_IRQ2, NULL);
761 gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
762 gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
763 gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
764 gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
765 gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
768 gpio_request(GPIO_FN_LCDD23, NULL);
769 gpio_request(GPIO_FN_LCDD22, NULL);
770 gpio_request(GPIO_FN_LCDD21, NULL);
771 gpio_request(GPIO_FN_LCDD20, NULL);
772 gpio_request(GPIO_FN_LCDD19, NULL);
773 gpio_request(GPIO_FN_LCDD18, NULL);
774 gpio_request(GPIO_FN_LCDD17, NULL);
775 gpio_request(GPIO_FN_LCDD16, NULL);
776 gpio_request(GPIO_FN_LCDD15, NULL);
777 gpio_request(GPIO_FN_LCDD14, NULL);
778 gpio_request(GPIO_FN_LCDD13, NULL);
779 gpio_request(GPIO_FN_LCDD12, NULL);
780 gpio_request(GPIO_FN_LCDD11, NULL);
781 gpio_request(GPIO_FN_LCDD10, NULL);
782 gpio_request(GPIO_FN_LCDD9, NULL);
783 gpio_request(GPIO_FN_LCDD8, NULL);
784 gpio_request(GPIO_FN_LCDD7, NULL);
785 gpio_request(GPIO_FN_LCDD6, NULL);
786 gpio_request(GPIO_FN_LCDD5, NULL);
787 gpio_request(GPIO_FN_LCDD4, NULL);
788 gpio_request(GPIO_FN_LCDD3, NULL);
789 gpio_request(GPIO_FN_LCDD2, NULL);
790 gpio_request(GPIO_FN_LCDD1, NULL);
791 gpio_request(GPIO_FN_LCDD0, NULL);
792 gpio_request(GPIO_FN_LCDDISP, NULL);
793 gpio_request(GPIO_FN_LCDHSYN, NULL);
794 gpio_request(GPIO_FN_LCDDCK, NULL);
795 gpio_request(GPIO_FN_LCDVSYN, NULL);
796 gpio_request(GPIO_FN_LCDDON, NULL);
797 gpio_request(GPIO_FN_LCDVEPWC, NULL);
798 gpio_request(GPIO_FN_LCDVCPWC, NULL);
799 gpio_request(GPIO_FN_LCDRD, NULL);
800 gpio_request(GPIO_FN_LCDLCLK, NULL);
801 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
804 gpio_request(GPIO_FN_VIO0_D15, NULL);
805 gpio_request(GPIO_FN_VIO0_D14, NULL);
806 gpio_request(GPIO_FN_VIO0_D13, NULL);
807 gpio_request(GPIO_FN_VIO0_D12, NULL);
808 gpio_request(GPIO_FN_VIO0_D11, NULL);
809 gpio_request(GPIO_FN_VIO0_D10, NULL);
810 gpio_request(GPIO_FN_VIO0_D9, NULL);
811 gpio_request(GPIO_FN_VIO0_D8, NULL);
812 gpio_request(GPIO_FN_VIO0_D7, NULL);
813 gpio_request(GPIO_FN_VIO0_D6, NULL);
814 gpio_request(GPIO_FN_VIO0_D5, NULL);
815 gpio_request(GPIO_FN_VIO0_D4, NULL);
816 gpio_request(GPIO_FN_VIO0_D3, NULL);
817 gpio_request(GPIO_FN_VIO0_D2, NULL);
818 gpio_request(GPIO_FN_VIO0_D1, NULL);
819 gpio_request(GPIO_FN_VIO0_D0, NULL);
820 gpio_request(GPIO_FN_VIO0_VD, NULL);
821 gpio_request(GPIO_FN_VIO0_CLK, NULL);
822 gpio_request(GPIO_FN_VIO0_FLD, NULL);
823 gpio_request(GPIO_FN_VIO0_HD, NULL);
824 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
827 gpio_request(GPIO_FN_VIO1_D7, NULL);
828 gpio_request(GPIO_FN_VIO1_D6, NULL);
829 gpio_request(GPIO_FN_VIO1_D5, NULL);
830 gpio_request(GPIO_FN_VIO1_D4, NULL);
831 gpio_request(GPIO_FN_VIO1_D3, NULL);
832 gpio_request(GPIO_FN_VIO1_D2, NULL);
833 gpio_request(GPIO_FN_VIO1_D1, NULL);
834 gpio_request(GPIO_FN_VIO1_D0, NULL);
835 gpio_request(GPIO_FN_VIO1_FLD, NULL);
836 gpio_request(GPIO_FN_VIO1_HD, NULL);
837 gpio_request(GPIO_FN_VIO1_VD, NULL);
838 gpio_request(GPIO_FN_VIO1_CLK, NULL);
839 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
842 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
843 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
844 gpio_request(GPIO_FN_KEYIN4, NULL);
845 gpio_request(GPIO_FN_KEYIN3, NULL);
846 gpio_request(GPIO_FN_KEYIN2, NULL);
847 gpio_request(GPIO_FN_KEYIN1, NULL);
848 gpio_request(GPIO_FN_KEYIN0, NULL);
849 gpio_request(GPIO_FN_KEYOUT3, NULL);
850 gpio_request(GPIO_FN_KEYOUT2, NULL);
851 gpio_request(GPIO_FN_KEYOUT1, NULL);
852 gpio_request(GPIO_FN_KEYOUT0, NULL);
855 gpio_request(GPIO_FN_FSIMCKB, NULL);
856 gpio_request(GPIO_FN_FSIMCKA, NULL);
857 gpio_request(GPIO_FN_FSIOASD, NULL);
858 gpio_request(GPIO_FN_FSIIABCK, NULL);
859 gpio_request(GPIO_FN_FSIIALRCK, NULL);
860 gpio_request(GPIO_FN_FSIOABCK, NULL);
861 gpio_request(GPIO_FN_FSIOALRCK, NULL);
862 gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
863 gpio_request(GPIO_FN_FSIIBSD, NULL);
864 gpio_request(GPIO_FN_FSIOBSD, NULL);
865 gpio_request(GPIO_FN_FSIIBBCK, NULL);
866 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
867 gpio_request(GPIO_FN_FSIOBBCK, NULL);
868 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
869 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
870 gpio_request(GPIO_FN_FSIIASD, NULL);
872 /* set SPU2 clock to 83.4 MHz */
873 clk = clk_get(NULL, "spu_clk");
875 clk_set_rate(clk, clk_round_rate(clk, 83333333));
879 /* change parent of FSI A */
880 clk = clk_get(NULL, "fsia_clk");
882 clk_register(&fsimcka_clk);
883 clk_set_parent(clk, &fsimcka_clk);
884 clk_set_rate(clk, 11000);
885 clk_set_rate(&fsimcka_clk, 11000);
889 /* SDHI0 connected to cn7 */
890 gpio_request(GPIO_FN_SDHI0CD, NULL);
891 gpio_request(GPIO_FN_SDHI0WP, NULL);
892 gpio_request(GPIO_FN_SDHI0D3, NULL);
893 gpio_request(GPIO_FN_SDHI0D2, NULL);
894 gpio_request(GPIO_FN_SDHI0D1, NULL);
895 gpio_request(GPIO_FN_SDHI0D0, NULL);
896 gpio_request(GPIO_FN_SDHI0CMD, NULL);
897 gpio_request(GPIO_FN_SDHI0CLK, NULL);
899 /* SDHI1 connected to cn8 */
900 gpio_request(GPIO_FN_SDHI1CD, NULL);
901 gpio_request(GPIO_FN_SDHI1WP, NULL);
902 gpio_request(GPIO_FN_SDHI1D3, NULL);
903 gpio_request(GPIO_FN_SDHI1D2, NULL);
904 gpio_request(GPIO_FN_SDHI1D1, NULL);
905 gpio_request(GPIO_FN_SDHI1D0, NULL);
906 gpio_request(GPIO_FN_SDHI1CMD, NULL);
907 gpio_request(GPIO_FN_SDHI1CLK, NULL);
910 gpio_request(GPIO_FN_IRDA_OUT, NULL);
911 gpio_request(GPIO_FN_IRDA_IN, NULL);
916 * please remove J33 pin from your board !!
918 * ms7724 board should not use GPIO_FN_LNKSTA pin
919 * So, This time PTX5 is set to input pin
921 gpio_request(GPIO_FN_RMII_RXD0, NULL);
922 gpio_request(GPIO_FN_RMII_RXD1, NULL);
923 gpio_request(GPIO_FN_RMII_TXD0, NULL);
924 gpio_request(GPIO_FN_RMII_TXD1, NULL);
925 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
926 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
927 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
928 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
929 gpio_request(GPIO_FN_MDIO, NULL);
930 gpio_request(GPIO_FN_MDC, NULL);
931 gpio_request(GPIO_PTX5, NULL);
932 gpio_direction_input(GPIO_PTX5);
937 lcdc_info.ch[0].lcd_cfg = lcdc_720p_modes;
938 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_720p_modes);
941 lcdc_info.ch[0].lcd_cfg = lcdc_vga_modes;
942 lcdc_info.ch[0].num_cfg = ARRAY_SIZE(lcdc_vga_modes);
946 /* Digital monitor */
947 lcdc_info.ch[0].interface_type = RGB18;
948 lcdc_info.ch[0].flags = 0;
951 lcdc_info.ch[0].interface_type = RGB24;
952 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
956 gpio_request(GPIO_FN_DV_D15, NULL);
957 gpio_request(GPIO_FN_DV_D14, NULL);
958 gpio_request(GPIO_FN_DV_D13, NULL);
959 gpio_request(GPIO_FN_DV_D12, NULL);
960 gpio_request(GPIO_FN_DV_D11, NULL);
961 gpio_request(GPIO_FN_DV_D10, NULL);
962 gpio_request(GPIO_FN_DV_D9, NULL);
963 gpio_request(GPIO_FN_DV_D8, NULL);
964 gpio_request(GPIO_FN_DV_CLKI, NULL);
965 gpio_request(GPIO_FN_DV_CLK, NULL);
966 gpio_request(GPIO_FN_DV_VSYNC, NULL);
967 gpio_request(GPIO_FN_DV_HSYNC, NULL);
969 return platform_add_devices(ms7724se_devices,
970 ARRAY_SIZE(ms7724se_devices));
972 device_initcall(devices_setup);
974 static struct sh_machine_vector mv_ms7724se __initmv = {
975 .mv_name = "ms7724se",
976 .mv_init_irq = init_se7724_IRQ,
977 .mv_nr_irqs = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,