2 * linux/arch/sh/boards/se/7724/setup.c
4 * Copyright (C) 2009 Renesas Solutions Corp.
6 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/mfd/sh_mobile_sdhi.h>
18 #include <linux/mtd/physmap.h>
19 #include <linux/delay.h>
20 #include <linux/smc91x.h>
21 #include <linux/gpio.h>
22 #include <linux/input.h>
23 #include <linux/input/sh_keysc.h>
24 #include <linux/usb/r8a66597.h>
25 #include <video/sh_mobile_lcdc.h>
26 #include <media/sh_mobile_ceu.h>
27 #include <sound/sh_fsi.h>
29 #include <asm/heartbeat.h>
30 #include <asm/sh_eth.h>
31 #include <asm/clock.h>
32 #include <asm/suspend.h>
33 #include <cpu/sh7724.h>
34 #include <mach-se/mach/se7724.h>
38 * ------------------------------------
39 * SW31 : 1001 1100 : default
40 * SW32 : 0111 1111 : use on board flash
42 * SW41 : abxx xxxx -> a = 0 : Analog monitor
51 * When you use 1280 x 720 lcdc output,
52 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
53 * and change SW41 to use 720p
59 * This setup.c supports FSI slave mode.
60 * Please change J20, J21, J22 pin to 1-2 connection.
64 static struct resource heartbeat_resource = {
67 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
70 static struct platform_device heartbeat_device = {
74 .resource = &heartbeat_resource,
78 static struct smc91x_platdata smc91x_info = {
79 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
82 static struct resource smc91x_eth_resources[] = {
87 .flags = IORESOURCE_MEM,
91 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
95 static struct platform_device smc91x_eth_device = {
97 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
98 .resource = smc91x_eth_resources,
100 .platform_data = &smc91x_info,
105 static struct mtd_partition nor_flash_partitions[] = {
109 .size = (1 * 1024 * 1024),
110 .mask_flags = MTD_WRITEABLE, /* Read-only */
113 .offset = MTDPART_OFS_APPEND,
114 .size = (2 * 1024 * 1024),
117 .offset = MTDPART_OFS_APPEND,
118 .size = MTDPART_SIZ_FULL,
122 static struct physmap_flash_data nor_flash_data = {
124 .parts = nor_flash_partitions,
125 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
128 static struct resource nor_flash_resources[] = {
133 .flags = IORESOURCE_MEM,
137 static struct platform_device nor_flash_device = {
138 .name = "physmap-flash",
139 .resource = nor_flash_resources,
140 .num_resources = ARRAY_SIZE(nor_flash_resources),
142 .platform_data = &nor_flash_data,
147 static struct sh_mobile_lcdc_info lcdc_info = {
148 .clock_source = LCDC_CLK_EXTERNAL,
150 .chan = LCDC_CHAN_MAINLCD,
155 .sync = 0, /* hsync and vsync are active low */
157 .lcd_size_cfg = { /* 7.0 inch */
166 static struct resource lcdc_resources[] = {
171 .flags = IORESOURCE_MEM,
175 .flags = IORESOURCE_IRQ,
179 static struct platform_device lcdc_device = {
180 .name = "sh_mobile_lcdc_fb",
181 .num_resources = ARRAY_SIZE(lcdc_resources),
182 .resource = lcdc_resources,
184 .platform_data = &lcdc_info,
187 .hwblk_id = HWBLK_LCDC,
192 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
193 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
196 static struct resource ceu0_resources[] = {
201 .flags = IORESOURCE_MEM,
205 .flags = IORESOURCE_IRQ,
208 /* place holder for contiguous memory */
212 static struct platform_device ceu0_device = {
213 .name = "sh_mobile_ceu",
214 .id = 0, /* "ceu0" clock */
215 .num_resources = ARRAY_SIZE(ceu0_resources),
216 .resource = ceu0_resources,
218 .platform_data = &sh_mobile_ceu0_info,
221 .hwblk_id = HWBLK_CEU0,
226 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
227 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
230 static struct resource ceu1_resources[] = {
235 .flags = IORESOURCE_MEM,
239 .flags = IORESOURCE_IRQ,
242 /* place holder for contiguous memory */
246 static struct platform_device ceu1_device = {
247 .name = "sh_mobile_ceu",
248 .id = 1, /* "ceu1" clock */
249 .num_resources = ARRAY_SIZE(ceu1_resources),
250 .resource = ceu1_resources,
252 .platform_data = &sh_mobile_ceu1_info,
255 .hwblk_id = HWBLK_CEU1,
261 * FSI-A use external clock which came from ak464x.
262 * So, we should change parent of fsi
264 #define FCLKACR 0xa4150008
265 static void fsimck_init(struct clk *clk)
267 u32 status = __raw_readl(clk->enable_reg);
269 /* use external clock */
270 status &= ~0x000000ff;
271 status |= 0x00000080;
272 __raw_writel(status, clk->enable_reg);
275 static struct clk_ops fsimck_clk_ops = {
279 static struct clk fsimcka_clk = {
280 .ops = &fsimck_clk_ops,
281 .enable_reg = (void __iomem *)FCLKACR,
282 .rate = 0, /* unknown */
285 /* change J20, J21, J22 pin to 1-2 connection to use slave mode */
286 static struct sh_fsi_platform_info fsi_info = {
287 .porta_flags = SH_FSI_BRS_INV |
288 SH_FSI_OUT_SLAVE_MODE |
289 SH_FSI_IN_SLAVE_MODE |
294 static struct resource fsi_resources[] = {
299 .flags = IORESOURCE_MEM,
303 .flags = IORESOURCE_IRQ,
307 static struct platform_device fsi_device = {
310 .num_resources = ARRAY_SIZE(fsi_resources),
311 .resource = fsi_resources,
313 .platform_data = &fsi_info,
316 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
320 /* KEYSC in SoC (Needs SW33-2 set to ON) */
321 static struct sh_keysc_info keysc_info = {
322 .mode = SH_KEYSC_MODE_1,
326 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
327 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
328 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
329 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
330 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
331 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
335 static struct resource keysc_resources[] = {
340 .flags = IORESOURCE_MEM,
344 .flags = IORESOURCE_IRQ,
348 static struct platform_device keysc_device = {
350 .id = 0, /* "keysc0" clock */
351 .num_resources = ARRAY_SIZE(keysc_resources),
352 .resource = keysc_resources,
354 .platform_data = &keysc_info,
357 .hwblk_id = HWBLK_KEYSC,
362 static struct resource sh_eth_resources[] = {
364 .start = SH_ETH_ADDR,
365 .end = SH_ETH_ADDR + 0x1FC,
366 .flags = IORESOURCE_MEM,
370 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
374 static struct sh_eth_plat_data sh_eth_plat = {
375 .phy = 0x1f, /* SMSC LAN8187 */
376 .edmac_endian = EDMAC_LITTLE_ENDIAN,
379 static struct platform_device sh_eth_device = {
383 .platform_data = &sh_eth_plat,
385 .num_resources = ARRAY_SIZE(sh_eth_resources),
386 .resource = sh_eth_resources,
388 .hwblk_id = HWBLK_ETHER,
392 static struct r8a66597_platdata sh7724_usb0_host_data = {
396 static struct resource sh7724_usb0_host_resources[] = {
399 .end = 0xa4d80124 - 1,
400 .flags = IORESOURCE_MEM,
405 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
409 static struct platform_device sh7724_usb0_host_device = {
410 .name = "r8a66597_hcd",
413 .dma_mask = NULL, /* not use dma */
414 .coherent_dma_mask = 0xffffffff,
415 .platform_data = &sh7724_usb0_host_data,
417 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
418 .resource = sh7724_usb0_host_resources,
420 .hwblk_id = HWBLK_USB0,
424 static struct r8a66597_platdata sh7724_usb1_gadget_data = {
428 static struct resource sh7724_usb1_gadget_resources[] = {
432 .flags = IORESOURCE_MEM,
437 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
441 static struct platform_device sh7724_usb1_gadget_device = {
442 .name = "r8a66597_udc",
445 .dma_mask = NULL, /* not use dma */
446 .coherent_dma_mask = 0xffffffff,
447 .platform_data = &sh7724_usb1_gadget_data,
449 .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources),
450 .resource = sh7724_usb1_gadget_resources,
453 static struct resource sdhi0_cn7_resources[] = {
458 .flags = IORESOURCE_MEM,
462 .flags = IORESOURCE_IRQ,
466 static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
467 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
468 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
471 static struct platform_device sdhi0_cn7_device = {
472 .name = "sh_mobile_sdhi",
474 .num_resources = ARRAY_SIZE(sdhi0_cn7_resources),
475 .resource = sdhi0_cn7_resources,
477 .platform_data = &sh7724_sdhi0_data,
480 .hwblk_id = HWBLK_SDHI0,
484 static struct resource sdhi1_cn8_resources[] = {
489 .flags = IORESOURCE_MEM,
493 .flags = IORESOURCE_IRQ,
497 static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
498 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
499 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
502 static struct platform_device sdhi1_cn8_device = {
503 .name = "sh_mobile_sdhi",
505 .num_resources = ARRAY_SIZE(sdhi1_cn8_resources),
506 .resource = sdhi1_cn8_resources,
508 .platform_data = &sh7724_sdhi1_data,
511 .hwblk_id = HWBLK_SDHI1,
516 static struct resource irda_resources[] = {
521 .flags = IORESOURCE_MEM,
525 .flags = IORESOURCE_IRQ,
529 static struct platform_device irda_device = {
531 .num_resources = ARRAY_SIZE(irda_resources),
532 .resource = irda_resources,
535 #include <media/ak881x.h>
536 #include <media/sh_vou.h>
538 static struct ak881x_pdata ak881x_pdata = {
539 .flags = AK881X_IF_MODE_SLAVE,
542 static struct i2c_board_info ak8813 = {
543 /* With open J18 jumper address is 0x21 */
544 I2C_BOARD_INFO("ak8813", 0x20),
545 .platform_data = &ak881x_pdata,
548 static struct sh_vou_pdata sh_vou_pdata = {
549 .bus_fmt = SH_VOU_BUS_8BIT,
550 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
551 .board_info = &ak8813,
553 .module_name = "ak881x",
556 static struct resource sh_vou_resources[] = {
560 .flags = IORESOURCE_MEM,
564 .flags = IORESOURCE_IRQ,
568 static struct platform_device vou_device = {
571 .num_resources = ARRAY_SIZE(sh_vou_resources),
572 .resource = sh_vou_resources,
574 .platform_data = &sh_vou_pdata,
577 .hwblk_id = HWBLK_VOU,
581 static struct platform_device *ms7724se_devices[] __initdata = {
590 &sh7724_usb0_host_device,
591 &sh7724_usb1_gadget_device,
600 static struct i2c_board_info i2c0_devices[] = {
602 I2C_BOARD_INFO("ak4642", 0x12),
606 #define EEPROM_OP 0xBA206000
607 #define EEPROM_ADR 0xBA206004
608 #define EEPROM_DATA 0xBA20600C
609 #define EEPROM_STAT 0xBA206010
610 #define EEPROM_STRT 0xBA206014
611 static int __init sh_eth_is_eeprom_ready(void)
616 if (!__raw_readw(EEPROM_STAT))
621 printk(KERN_ERR "ms7724se can not access to eeprom\n");
625 static void __init sh_eth_init(void)
630 /* check EEPROM status */
631 if (!sh_eth_is_eeprom_ready())
634 /* read MAC addr from EEPROM */
635 for (i = 0 ; i < 3 ; i++) {
636 __raw_writew(0x0, EEPROM_OP); /* read */
637 __raw_writew(i*2, EEPROM_ADR);
638 __raw_writew(0x1, EEPROM_STRT);
639 if (!sh_eth_is_eeprom_ready())
642 mac = __raw_readw(EEPROM_DATA);
643 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
644 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
648 #define SW4140 0xBA201000
649 #define FPGA_OUT 0xBA200400
650 #define PORT_HIZA 0xA4050158
651 #define PORT_MSELCRB 0xA4050182
653 #define SW41_A 0x0100
654 #define SW41_B 0x0200
655 #define SW41_C 0x0400
656 #define SW41_D 0x0800
657 #define SW41_E 0x1000
658 #define SW41_F 0x2000
659 #define SW41_G 0x4000
660 #define SW41_H 0x8000
662 extern char ms7724se_sdram_enter_start;
663 extern char ms7724se_sdram_enter_end;
664 extern char ms7724se_sdram_leave_start;
665 extern char ms7724se_sdram_leave_end;
668 static int __init arch_setup(void)
670 /* enable I2C device */
671 i2c_register_board_info(0, i2c0_devices,
672 ARRAY_SIZE(i2c0_devices));
675 arch_initcall(arch_setup);
677 static int __init devices_setup(void)
679 u16 sw = __raw_readw(SW4140); /* select camera, monitor */
683 /* register board specific self-refresh code */
684 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
686 &ms7724se_sdram_enter_start,
687 &ms7724se_sdram_enter_end,
688 &ms7724se_sdram_leave_start,
689 &ms7724se_sdram_leave_end);
691 fpga_out = __raw_readw(FPGA_OUT);
692 /* bit4: NTSC_PDN, bit5: NTSC_RESET */
693 fpga_out &= ~((1 << 1) | /* LAN */
694 (1 << 4) | /* AK8813 PDN */
695 (1 << 5) | /* AK8813 RESET */
696 (1 << 6) | /* VIDEO DAC */
697 (1 << 7) | /* AK4643 */
698 (1 << 8) | /* IrDA */
699 (1 << 12) | /* USB0 */
700 (1 << 14)); /* RMII */
701 __raw_writew(fpga_out | (1 << 4), FPGA_OUT);
706 __raw_writew(fpga_out | (1 << 5), FPGA_OUT);
710 __raw_writew(fpga_out, FPGA_OUT);
712 /* turn on USB clocks, use external clock */
713 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
715 /* Let LED9 show STATUS2 */
716 gpio_request(GPIO_FN_STATUS2, NULL);
718 /* Lit LED10 show STATUS0 */
719 gpio_request(GPIO_FN_STATUS0, NULL);
721 /* Lit LED11 show PDSTATUS */
722 gpio_request(GPIO_FN_PDSTATUS, NULL);
724 /* enable USB0 port */
725 __raw_writew(0x0600, 0xa40501d4);
727 /* enable USB1 port */
728 __raw_writew(0x0600, 0xa4050192);
730 /* enable IRQ 0,1,2 */
731 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
732 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
733 gpio_request(GPIO_FN_INTC_IRQ2, NULL);
736 gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
737 gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
738 gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
739 gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
740 gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
743 gpio_request(GPIO_FN_LCDD23, NULL);
744 gpio_request(GPIO_FN_LCDD22, NULL);
745 gpio_request(GPIO_FN_LCDD21, NULL);
746 gpio_request(GPIO_FN_LCDD20, NULL);
747 gpio_request(GPIO_FN_LCDD19, NULL);
748 gpio_request(GPIO_FN_LCDD18, NULL);
749 gpio_request(GPIO_FN_LCDD17, NULL);
750 gpio_request(GPIO_FN_LCDD16, NULL);
751 gpio_request(GPIO_FN_LCDD15, NULL);
752 gpio_request(GPIO_FN_LCDD14, NULL);
753 gpio_request(GPIO_FN_LCDD13, NULL);
754 gpio_request(GPIO_FN_LCDD12, NULL);
755 gpio_request(GPIO_FN_LCDD11, NULL);
756 gpio_request(GPIO_FN_LCDD10, NULL);
757 gpio_request(GPIO_FN_LCDD9, NULL);
758 gpio_request(GPIO_FN_LCDD8, NULL);
759 gpio_request(GPIO_FN_LCDD7, NULL);
760 gpio_request(GPIO_FN_LCDD6, NULL);
761 gpio_request(GPIO_FN_LCDD5, NULL);
762 gpio_request(GPIO_FN_LCDD4, NULL);
763 gpio_request(GPIO_FN_LCDD3, NULL);
764 gpio_request(GPIO_FN_LCDD2, NULL);
765 gpio_request(GPIO_FN_LCDD1, NULL);
766 gpio_request(GPIO_FN_LCDD0, NULL);
767 gpio_request(GPIO_FN_LCDDISP, NULL);
768 gpio_request(GPIO_FN_LCDHSYN, NULL);
769 gpio_request(GPIO_FN_LCDDCK, NULL);
770 gpio_request(GPIO_FN_LCDVSYN, NULL);
771 gpio_request(GPIO_FN_LCDDON, NULL);
772 gpio_request(GPIO_FN_LCDVEPWC, NULL);
773 gpio_request(GPIO_FN_LCDVCPWC, NULL);
774 gpio_request(GPIO_FN_LCDRD, NULL);
775 gpio_request(GPIO_FN_LCDLCLK, NULL);
776 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
779 gpio_request(GPIO_FN_VIO0_D15, NULL);
780 gpio_request(GPIO_FN_VIO0_D14, NULL);
781 gpio_request(GPIO_FN_VIO0_D13, NULL);
782 gpio_request(GPIO_FN_VIO0_D12, NULL);
783 gpio_request(GPIO_FN_VIO0_D11, NULL);
784 gpio_request(GPIO_FN_VIO0_D10, NULL);
785 gpio_request(GPIO_FN_VIO0_D9, NULL);
786 gpio_request(GPIO_FN_VIO0_D8, NULL);
787 gpio_request(GPIO_FN_VIO0_D7, NULL);
788 gpio_request(GPIO_FN_VIO0_D6, NULL);
789 gpio_request(GPIO_FN_VIO0_D5, NULL);
790 gpio_request(GPIO_FN_VIO0_D4, NULL);
791 gpio_request(GPIO_FN_VIO0_D3, NULL);
792 gpio_request(GPIO_FN_VIO0_D2, NULL);
793 gpio_request(GPIO_FN_VIO0_D1, NULL);
794 gpio_request(GPIO_FN_VIO0_D0, NULL);
795 gpio_request(GPIO_FN_VIO0_VD, NULL);
796 gpio_request(GPIO_FN_VIO0_CLK, NULL);
797 gpio_request(GPIO_FN_VIO0_FLD, NULL);
798 gpio_request(GPIO_FN_VIO0_HD, NULL);
799 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
802 gpio_request(GPIO_FN_VIO1_D7, NULL);
803 gpio_request(GPIO_FN_VIO1_D6, NULL);
804 gpio_request(GPIO_FN_VIO1_D5, NULL);
805 gpio_request(GPIO_FN_VIO1_D4, NULL);
806 gpio_request(GPIO_FN_VIO1_D3, NULL);
807 gpio_request(GPIO_FN_VIO1_D2, NULL);
808 gpio_request(GPIO_FN_VIO1_D1, NULL);
809 gpio_request(GPIO_FN_VIO1_D0, NULL);
810 gpio_request(GPIO_FN_VIO1_FLD, NULL);
811 gpio_request(GPIO_FN_VIO1_HD, NULL);
812 gpio_request(GPIO_FN_VIO1_VD, NULL);
813 gpio_request(GPIO_FN_VIO1_CLK, NULL);
814 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
817 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
818 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
819 gpio_request(GPIO_FN_KEYIN4, NULL);
820 gpio_request(GPIO_FN_KEYIN3, NULL);
821 gpio_request(GPIO_FN_KEYIN2, NULL);
822 gpio_request(GPIO_FN_KEYIN1, NULL);
823 gpio_request(GPIO_FN_KEYIN0, NULL);
824 gpio_request(GPIO_FN_KEYOUT3, NULL);
825 gpio_request(GPIO_FN_KEYOUT2, NULL);
826 gpio_request(GPIO_FN_KEYOUT1, NULL);
827 gpio_request(GPIO_FN_KEYOUT0, NULL);
830 gpio_request(GPIO_FN_FSIMCKB, NULL);
831 gpio_request(GPIO_FN_FSIMCKA, NULL);
832 gpio_request(GPIO_FN_FSIOASD, NULL);
833 gpio_request(GPIO_FN_FSIIABCK, NULL);
834 gpio_request(GPIO_FN_FSIIALRCK, NULL);
835 gpio_request(GPIO_FN_FSIOABCK, NULL);
836 gpio_request(GPIO_FN_FSIOALRCK, NULL);
837 gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
838 gpio_request(GPIO_FN_FSIIBSD, NULL);
839 gpio_request(GPIO_FN_FSIOBSD, NULL);
840 gpio_request(GPIO_FN_FSIIBBCK, NULL);
841 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
842 gpio_request(GPIO_FN_FSIOBBCK, NULL);
843 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
844 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
845 gpio_request(GPIO_FN_FSIIASD, NULL);
847 /* set SPU2 clock to 83.4 MHz */
848 clk = clk_get(NULL, "spu_clk");
850 clk_set_rate(clk, clk_round_rate(clk, 83333333));
854 /* change parent of FSI A */
855 clk = clk_get(NULL, "fsia_clk");
857 clk_register(&fsimcka_clk);
858 clk_set_parent(clk, &fsimcka_clk);
859 clk_set_rate(clk, 11000);
860 clk_set_rate(&fsimcka_clk, 11000);
864 /* SDHI0 connected to cn7 */
865 gpio_request(GPIO_FN_SDHI0CD, NULL);
866 gpio_request(GPIO_FN_SDHI0WP, NULL);
867 gpio_request(GPIO_FN_SDHI0D3, NULL);
868 gpio_request(GPIO_FN_SDHI0D2, NULL);
869 gpio_request(GPIO_FN_SDHI0D1, NULL);
870 gpio_request(GPIO_FN_SDHI0D0, NULL);
871 gpio_request(GPIO_FN_SDHI0CMD, NULL);
872 gpio_request(GPIO_FN_SDHI0CLK, NULL);
874 /* SDHI1 connected to cn8 */
875 gpio_request(GPIO_FN_SDHI1CD, NULL);
876 gpio_request(GPIO_FN_SDHI1WP, NULL);
877 gpio_request(GPIO_FN_SDHI1D3, NULL);
878 gpio_request(GPIO_FN_SDHI1D2, NULL);
879 gpio_request(GPIO_FN_SDHI1D1, NULL);
880 gpio_request(GPIO_FN_SDHI1D0, NULL);
881 gpio_request(GPIO_FN_SDHI1CMD, NULL);
882 gpio_request(GPIO_FN_SDHI1CLK, NULL);
885 gpio_request(GPIO_FN_IRDA_OUT, NULL);
886 gpio_request(GPIO_FN_IRDA_IN, NULL);
891 * please remove J33 pin from your board !!
893 * ms7724 board should not use GPIO_FN_LNKSTA pin
894 * So, This time PTX5 is set to input pin
896 gpio_request(GPIO_FN_RMII_RXD0, NULL);
897 gpio_request(GPIO_FN_RMII_RXD1, NULL);
898 gpio_request(GPIO_FN_RMII_TXD0, NULL);
899 gpio_request(GPIO_FN_RMII_TXD1, NULL);
900 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
901 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
902 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
903 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
904 gpio_request(GPIO_FN_MDIO, NULL);
905 gpio_request(GPIO_FN_MDC, NULL);
906 gpio_request(GPIO_PTX5, NULL);
907 gpio_direction_input(GPIO_PTX5);
912 lcdc_info.ch[0].lcd_cfg.xres = 1280;
913 lcdc_info.ch[0].lcd_cfg.yres = 720;
914 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
915 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
916 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
917 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
918 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
919 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
922 lcdc_info.ch[0].lcd_cfg.xres = 640;
923 lcdc_info.ch[0].lcd_cfg.yres = 480;
924 lcdc_info.ch[0].lcd_cfg.left_margin = 105;
925 lcdc_info.ch[0].lcd_cfg.right_margin = 50;
926 lcdc_info.ch[0].lcd_cfg.hsync_len = 96;
927 lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
928 lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
929 lcdc_info.ch[0].lcd_cfg.vsync_len = 2;
933 /* Digital monitor */
934 lcdc_info.ch[0].interface_type = RGB18;
935 lcdc_info.ch[0].flags = 0;
938 lcdc_info.ch[0].interface_type = RGB24;
939 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
943 gpio_request(GPIO_FN_DV_D15, NULL);
944 gpio_request(GPIO_FN_DV_D14, NULL);
945 gpio_request(GPIO_FN_DV_D13, NULL);
946 gpio_request(GPIO_FN_DV_D12, NULL);
947 gpio_request(GPIO_FN_DV_D11, NULL);
948 gpio_request(GPIO_FN_DV_D10, NULL);
949 gpio_request(GPIO_FN_DV_D9, NULL);
950 gpio_request(GPIO_FN_DV_D8, NULL);
951 gpio_request(GPIO_FN_DV_CLKI, NULL);
952 gpio_request(GPIO_FN_DV_CLK, NULL);
953 gpio_request(GPIO_FN_DV_VSYNC, NULL);
954 gpio_request(GPIO_FN_DV_HSYNC, NULL);
956 return platform_add_devices(ms7724se_devices,
957 ARRAY_SIZE(ms7724se_devices));
959 device_initcall(devices_setup);
961 static struct sh_machine_vector mv_ms7724se __initmv = {
962 .mv_name = "ms7724se",
963 .mv_init_irq = init_se7724_IRQ,
964 .mv_nr_irqs = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,