6 /* Can be used to override the logic in pci_scan_bus for skipping
7 already-configured bus numbers - to be used for buggy BIOSes
8 or architectures with incomplete PCI setup by the loader */
10 #define pcibios_assign_all_busses() 1
13 * A board can define one or more PCI channels that represent built-in (or
14 * external) PCI controllers.
17 struct pci_channel *next;
20 struct pci_ops *pci_ops;
22 struct resource *resources;
23 unsigned int nr_resources;
25 unsigned long io_offset;
26 unsigned long mem_offset;
28 unsigned long reg_base;
29 unsigned long io_map_base;
32 unsigned int need_domain_info;
34 /* Optional error handling */
35 struct timer_list err_timer, serr_timer;
36 unsigned int err_irq, serr_irq;
39 /* arch/sh/drivers/pci/pci.c */
40 extern int register_pci_controller(struct pci_channel *hose);
41 extern void pcibios_report_status(unsigned int status_mask, int warn);
43 /* arch/sh/drivers/pci/common.c */
44 extern int early_read_config_byte(struct pci_channel *hose, int top_bus,
45 int bus, int devfn, int offset, u8 *value);
46 extern int early_read_config_word(struct pci_channel *hose, int top_bus,
47 int bus, int devfn, int offset, u16 *value);
48 extern int early_read_config_dword(struct pci_channel *hose, int top_bus,
49 int bus, int devfn, int offset, u32 *value);
50 extern int early_write_config_byte(struct pci_channel *hose, int top_bus,
51 int bus, int devfn, int offset, u8 value);
52 extern int early_write_config_word(struct pci_channel *hose, int top_bus,
53 int bus, int devfn, int offset, u16 value);
54 extern int early_write_config_dword(struct pci_channel *hose, int top_bus,
55 int bus, int devfn, int offset, u32 value);
56 extern void pcibios_enable_timers(struct pci_channel *hose);
57 extern unsigned int pcibios_handle_status_errors(unsigned long addr,
58 unsigned int status, struct pci_channel *hose);
59 extern int pci_is_66mhz_capable(struct pci_channel *hose,
60 int top_bus, int current_bus);
62 extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM;
67 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
68 enum pci_mmap_state mmap_state, int write_combine);
69 extern void pcibios_set_master(struct pci_dev *dev);
71 static inline void pcibios_penalize_isa_irq(int irq, int active)
73 /* We don't do dynamic PCI IRQ allocation */
76 /* Dynamic DMA mapping stuff.
77 * SuperH has everything mapped statically like x86.
80 /* The PCI address space does equal the physical memory
81 * address space. The networking and block device layers use
82 * this boolean for bounce buffer decisions.
84 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
86 /* pci_unmap_{single,page} being a nop depends upon the
89 #ifdef CONFIG_DMA_NONCOHERENT
90 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
91 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
92 #define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
93 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
94 #define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
95 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
97 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
98 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
99 #define pci_unmap_addr(PTR, ADDR_NAME) (0)
100 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
101 #define pci_unmap_len(PTR, LEN_NAME) (0)
102 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
107 * None of the SH PCI controllers support MWI, it is always treated as a
108 * direct memory write.
110 #define PCI_DISABLE_MWI
112 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
113 enum pci_dma_burst_strategy *strat,
114 unsigned long *strategy_parameter)
116 unsigned long cacheline_size;
119 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
122 cacheline_size = L1_CACHE_BYTES;
124 cacheline_size = byte << 2;
126 *strat = PCI_DMA_BURST_MULTIPLE;
127 *strategy_parameter = cacheline_size;
131 /* Board-specific fixup routines. */
132 int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);
134 extern void pcibios_resource_to_bus(struct pci_dev *dev,
135 struct pci_bus_region *region, struct resource *res);
137 extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
138 struct pci_bus_region *region);
140 #define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index
142 static inline int pci_proc_domain(struct pci_bus *bus)
144 struct pci_channel *hose = bus->sysdata;
145 return hose->need_domain_info;
148 /* Chances are this interrupt is wired PC-style ... */
149 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
151 return channel ? 15 : 14;
154 /* generic DMA-mapping stuff */
155 #include <asm-generic/pci-dma-compat.h>
157 #endif /* __KERNEL__ */
158 #endif /* __ASM_SH_PCI_H */