2 * arch/sh/kernel/hw_breakpoint.c
4 * Unified kernel/user-space hardware breakpoint facility for the on-chip UBC.
6 * Copyright (C) 2009 - 2010 Paul Mundt
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
12 #include <linux/init.h>
13 #include <linux/perf_event.h>
14 #include <linux/sched/signal.h>
15 #include <linux/hw_breakpoint.h>
16 #include <linux/percpu.h>
17 #include <linux/kallsyms.h>
18 #include <linux/notifier.h>
19 #include <linux/kprobes.h>
20 #include <linux/kdebug.h>
22 #include <linux/clk.h>
23 #include <asm/hw_breakpoint.h>
24 #include <asm/mmu_context.h>
25 #include <asm/ptrace.h>
26 #include <asm/traps.h>
29 * Stores the breakpoints currently in use on each breakpoint address
30 * register for each cpus
32 static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
35 * A dummy placeholder for early accesses until the CPUs get a chance to
36 * register their UBCs later in the boot process.
38 static struct sh_ubc ubc_dummy = { .num_events = 0 };
40 static struct sh_ubc *sh_ubc __read_mostly = &ubc_dummy;
43 * Install a perf counter breakpoint.
45 * We seek a free UBC channel and use it for this breakpoint.
47 * Atomic: we hold the counter->ctx->lock and we only handle variables
48 * and registers local to this cpu.
50 int arch_install_hw_breakpoint(struct perf_event *bp)
52 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
55 for (i = 0; i < sh_ubc->num_events; i++) {
56 struct perf_event **slot = this_cpu_ptr(&bp_per_reg[i]);
64 if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
67 clk_enable(sh_ubc->clk);
68 sh_ubc->enable(info, i);
74 * Uninstall the breakpoint contained in the given counter.
76 * First we search the debug address register it uses and then we disable
79 * Atomic: we hold the counter->ctx->lock and we only handle variables
80 * and registers local to this cpu.
82 void arch_uninstall_hw_breakpoint(struct perf_event *bp)
84 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
87 for (i = 0; i < sh_ubc->num_events; i++) {
88 struct perf_event **slot = this_cpu_ptr(&bp_per_reg[i]);
96 if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
99 sh_ubc->disable(info, i);
100 clk_disable(sh_ubc->clk);
103 static int get_hbp_len(u16 hbp_len)
105 unsigned int len_in_bytes = 0;
108 case SH_BREAKPOINT_LEN_1:
111 case SH_BREAKPOINT_LEN_2:
114 case SH_BREAKPOINT_LEN_4:
117 case SH_BREAKPOINT_LEN_8:
125 * Check for virtual address in kernel space.
127 int arch_check_bp_in_kernelspace(struct perf_event *bp)
131 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
134 len = get_hbp_len(info->len);
136 return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
139 int arch_bp_generic_fields(int sh_len, int sh_type,
140 int *gen_len, int *gen_type)
144 case SH_BREAKPOINT_LEN_1:
145 *gen_len = HW_BREAKPOINT_LEN_1;
147 case SH_BREAKPOINT_LEN_2:
148 *gen_len = HW_BREAKPOINT_LEN_2;
150 case SH_BREAKPOINT_LEN_4:
151 *gen_len = HW_BREAKPOINT_LEN_4;
153 case SH_BREAKPOINT_LEN_8:
154 *gen_len = HW_BREAKPOINT_LEN_8;
162 case SH_BREAKPOINT_READ:
163 *gen_type = HW_BREAKPOINT_R;
164 case SH_BREAKPOINT_WRITE:
165 *gen_type = HW_BREAKPOINT_W;
167 case SH_BREAKPOINT_RW:
168 *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
177 static int arch_build_bp_info(struct perf_event *bp)
179 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
181 info->address = bp->attr.bp_addr;
184 switch (bp->attr.bp_len) {
185 case HW_BREAKPOINT_LEN_1:
186 info->len = SH_BREAKPOINT_LEN_1;
188 case HW_BREAKPOINT_LEN_2:
189 info->len = SH_BREAKPOINT_LEN_2;
191 case HW_BREAKPOINT_LEN_4:
192 info->len = SH_BREAKPOINT_LEN_4;
194 case HW_BREAKPOINT_LEN_8:
195 info->len = SH_BREAKPOINT_LEN_8;
202 switch (bp->attr.bp_type) {
203 case HW_BREAKPOINT_R:
204 info->type = SH_BREAKPOINT_READ;
206 case HW_BREAKPOINT_W:
207 info->type = SH_BREAKPOINT_WRITE;
209 case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
210 info->type = SH_BREAKPOINT_RW;
220 * Validate the arch-specific HW Breakpoint register settings
222 int arch_validate_hwbkpt_settings(struct perf_event *bp)
224 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
228 ret = arch_build_bp_info(bp);
235 case SH_BREAKPOINT_LEN_1:
238 case SH_BREAKPOINT_LEN_2:
241 case SH_BREAKPOINT_LEN_4:
244 case SH_BREAKPOINT_LEN_8:
252 * For kernel-addresses, either the address or symbol name can be
256 info->address = (unsigned long)kallsyms_lookup_name(info->name);
259 * Check that the low-order bits of the address are appropriate
260 * for the alignment implied by len.
262 if (info->address & align)
269 * Release the user breakpoints used by ptrace
271 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
274 struct thread_struct *t = &tsk->thread;
276 for (i = 0; i < sh_ubc->num_events; i++) {
277 unregister_hw_breakpoint(t->ptrace_bps[i]);
278 t->ptrace_bps[i] = NULL;
282 static int __kprobes hw_breakpoint_handler(struct die_args *args)
284 int cpu, i, rc = NOTIFY_STOP;
285 struct perf_event *bp;
286 unsigned int cmf, resume_mask;
289 * Do an early return if none of the channels triggered.
291 cmf = sh_ubc->triggered_mask();
296 * By default, resume all of the active channels.
298 resume_mask = sh_ubc->active_mask();
301 * Disable breakpoints during exception handling.
303 sh_ubc->disable_all();
306 for (i = 0; i < sh_ubc->num_events; i++) {
307 unsigned long event_mask = (1 << i);
309 if (likely(!(cmf & event_mask)))
313 * The counter may be concurrently released but that can only
314 * occur from a call_rcu() path. We can then safely fetch
315 * the breakpoint, use its callback, touch its counter
316 * while we are in an rcu_read_lock() path.
320 bp = per_cpu(bp_per_reg[i], cpu);
325 * Reset the condition match flag to denote completion of
326 * exception handling.
328 sh_ubc->clear_triggered_mask(event_mask);
331 * bp can be NULL due to concurrent perf counter
340 * Don't restore the channel if the breakpoint is from
341 * ptrace, as it always operates in one-shot mode.
343 if (bp->overflow_handler == ptrace_triggered)
344 resume_mask &= ~(1 << i);
346 perf_bp_event(bp, args->regs);
348 /* Deliver the signal to userspace */
349 if (!arch_check_bp_in_kernelspace(bp)) {
352 info.si_signo = args->signr;
353 info.si_errno = notifier_to_errno(rc);
354 info.si_code = TRAP_HWBKPT;
356 force_sig_info(args->signr, &info, current);
365 sh_ubc->enable_all(resume_mask);
372 BUILD_TRAP_HANDLER(breakpoint)
374 unsigned long ex = lookup_exception_vector();
377 notify_die(DIE_BREAKPOINT, "breakpoint", regs, 0, ex, SIGTRAP);
381 * Handle debug exception notifications.
383 int __kprobes hw_breakpoint_exceptions_notify(struct notifier_block *unused,
384 unsigned long val, void *data)
386 struct die_args *args = data;
388 if (val != DIE_BREAKPOINT)
392 * If the breakpoint hasn't been triggered by the UBC, it's
393 * probably from a debugger, so don't do anything more here.
395 * This also permits the UBC interface clock to remain off for
396 * non-UBC breakpoints, as we don't need to check the triggered
397 * or active channel masks.
399 if (args->trapnr != sh_ubc->trap_nr)
402 return hw_breakpoint_handler(data);
405 void hw_breakpoint_pmu_read(struct perf_event *bp)
410 int register_sh_ubc(struct sh_ubc *ubc)
412 /* Bail if it's already assigned */
413 if (sh_ubc != &ubc_dummy)
417 pr_info("HW Breakpoints: %s UBC support registered\n", ubc->name);
419 WARN_ON(ubc->num_events > HBP_NUM);