2 * arch/sh/kernel/hw_breakpoint.c
4 * Unified kernel/user-space hardware breakpoint facility for the on-chip UBC.
6 * Copyright (C) 2009 - 2010 Paul Mundt
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
12 #include <linux/init.h>
13 #include <linux/perf_event.h>
14 #include <linux/hw_breakpoint.h>
15 #include <linux/percpu.h>
16 #include <linux/kallsyms.h>
17 #include <linux/notifier.h>
18 #include <linux/kprobes.h>
19 #include <linux/kdebug.h>
21 #include <linux/clk.h>
22 #include <asm/hw_breakpoint.h>
23 #include <asm/mmu_context.h>
24 #include <asm/ptrace.h>
25 #include <asm/traps.h>
28 * Stores the breakpoints currently in use on each breakpoint address
29 * register for each cpus
31 static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
34 * A dummy placeholder for early accesses until the CPUs get a chance to
35 * register their UBCs later in the boot process.
37 static struct sh_ubc ubc_dummy = { .num_events = 0 };
39 static struct sh_ubc *sh_ubc __read_mostly = &ubc_dummy;
42 * Install a perf counter breakpoint.
44 * We seek a free UBC channel and use it for this breakpoint.
46 * Atomic: we hold the counter->ctx->lock and we only handle variables
47 * and registers local to this cpu.
49 int arch_install_hw_breakpoint(struct perf_event *bp)
51 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
54 for (i = 0; i < sh_ubc->num_events; i++) {
55 struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
63 if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
66 clk_enable(sh_ubc->clk);
67 sh_ubc->enable(info, i);
73 * Uninstall the breakpoint contained in the given counter.
75 * First we search the debug address register it uses and then we disable
78 * Atomic: we hold the counter->ctx->lock and we only handle variables
79 * and registers local to this cpu.
81 void arch_uninstall_hw_breakpoint(struct perf_event *bp)
83 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
86 for (i = 0; i < sh_ubc->num_events; i++) {
87 struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
95 if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
98 sh_ubc->disable(info, i);
99 clk_disable(sh_ubc->clk);
102 static int get_hbp_len(u16 hbp_len)
104 unsigned int len_in_bytes = 0;
107 case SH_BREAKPOINT_LEN_1:
110 case SH_BREAKPOINT_LEN_2:
113 case SH_BREAKPOINT_LEN_4:
117 case SH_BREAKPOINT_LEN_8:
126 * Check for virtual address in kernel space.
128 int arch_check_bp_in_kernelspace(struct perf_event *bp)
132 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
135 len = get_hbp_len(info->len);
137 return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
140 int arch_bp_generic_fields(int sh_len, int sh_type,
141 int *gen_len, int *gen_type)
145 case SH_BREAKPOINT_LEN_1:
146 *gen_len = HW_BREAKPOINT_LEN_1;
148 case SH_BREAKPOINT_LEN_2:
149 *gen_len = HW_BREAKPOINT_LEN_2;
151 case SH_BREAKPOINT_LEN_4:
152 *gen_len = HW_BREAKPOINT_LEN_4;
155 case SH_BREAKPOINT_LEN_8:
156 *gen_len = HW_BREAKPOINT_LEN_8;
165 case SH_BREAKPOINT_READ:
166 *gen_type = HW_BREAKPOINT_R;
167 case SH_BREAKPOINT_WRITE:
168 *gen_type = HW_BREAKPOINT_W;
170 case SH_BREAKPOINT_RW:
171 *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
180 static int arch_build_bp_info(struct perf_event *bp)
182 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
184 info->address = bp->attr.bp_addr;
187 switch (bp->attr.bp_len) {
188 case HW_BREAKPOINT_LEN_1:
189 info->len = SH_BREAKPOINT_LEN_1;
191 case HW_BREAKPOINT_LEN_2:
192 info->len = SH_BREAKPOINT_LEN_2;
194 case HW_BREAKPOINT_LEN_4:
195 info->len = SH_BREAKPOINT_LEN_4;
198 case HW_BREAKPOINT_LEN_8:
199 info->len = SH_BREAKPOINT_LEN_8;
207 switch (bp->attr.bp_type) {
208 case HW_BREAKPOINT_R:
209 info->type = SH_BREAKPOINT_READ;
211 case HW_BREAKPOINT_W:
212 info->type = SH_BREAKPOINT_WRITE;
214 case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
215 info->type = SH_BREAKPOINT_RW;
225 * Validate the arch-specific HW Breakpoint register settings
227 int arch_validate_hwbkpt_settings(struct perf_event *bp)
229 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
233 ret = arch_build_bp_info(bp);
240 case SH_BREAKPOINT_LEN_1:
243 case SH_BREAKPOINT_LEN_2:
246 case SH_BREAKPOINT_LEN_4:
250 case SH_BREAKPOINT_LEN_8:
259 * For kernel-addresses, either the address or symbol name can be
263 info->address = (unsigned long)kallsyms_lookup_name(info->name);
266 * Check that the low-order bits of the address are appropriate
267 * for the alignment implied by len.
269 if (info->address & align)
276 * Release the user breakpoints used by ptrace
278 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
281 struct thread_struct *t = &tsk->thread;
283 for (i = 0; i < sh_ubc->num_events; i++) {
284 unregister_hw_breakpoint(t->ptrace_bps[i]);
285 t->ptrace_bps[i] = NULL;
289 static int __kprobes hw_breakpoint_handler(struct die_args *args)
291 int cpu, i, rc = NOTIFY_STOP;
292 struct perf_event *bp;
293 unsigned int cmf, resume_mask;
296 * Do an early return if none of the channels triggered.
298 cmf = sh_ubc->triggered_mask();
303 * By default, resume all of the active channels.
305 resume_mask = sh_ubc->active_mask();
308 * Disable breakpoints during exception handling.
310 sh_ubc->disable_all();
313 for (i = 0; i < sh_ubc->num_events; i++) {
314 unsigned long event_mask = (1 << i);
316 if (likely(!(cmf & event_mask)))
320 * The counter may be concurrently released but that can only
321 * occur from a call_rcu() path. We can then safely fetch
322 * the breakpoint, use its callback, touch its counter
323 * while we are in an rcu_read_lock() path.
327 bp = per_cpu(bp_per_reg[i], cpu);
332 * Reset the condition match flag to denote completion of
333 * exception handling.
335 sh_ubc->clear_triggered_mask(event_mask);
338 * bp can be NULL due to concurrent perf counter
347 * Don't restore the channel if the breakpoint is from
348 * ptrace, as it always operates in one-shot mode.
350 if (bp->overflow_handler == ptrace_triggered)
351 resume_mask &= ~(1 << i);
353 perf_bp_event(bp, args->regs);
355 /* Deliver the signal to userspace */
356 if (!arch_check_bp_in_kernelspace(bp)) {
359 info.si_signo = args->signr;
360 info.si_errno = notifier_to_errno(rc);
361 info.si_code = TRAP_HWBKPT;
363 force_sig_info(args->signr, &info, current);
372 sh_ubc->enable_all(resume_mask);
379 BUILD_TRAP_HANDLER(breakpoint)
381 unsigned long ex = lookup_exception_vector();
384 notify_die(DIE_BREAKPOINT, "breakpoint", regs, 0, ex, SIGTRAP);
388 * Handle debug exception notifications.
390 int __kprobes hw_breakpoint_exceptions_notify(struct notifier_block *unused,
391 unsigned long val, void *data)
393 struct die_args *args = data;
395 if (val != DIE_BREAKPOINT)
399 * If the breakpoint hasn't been triggered by the UBC, it's
400 * probably from a debugger, so don't do anything more here.
402 * This also permits the UBC interface clock to remain off for
403 * non-UBC breakpoints, as we don't need to check the triggered
404 * or active channel masks.
406 if (args->trapnr != sh_ubc->trap_nr)
409 return hw_breakpoint_handler(data);
412 void hw_breakpoint_pmu_read(struct perf_event *bp)
417 int register_sh_ubc(struct sh_ubc *ubc)
419 /* Bail if it's already assigned */
420 if (sh_ubc != &ubc_dummy)
424 pr_info("HW Breakpoints: %s UBC support registered\n", ubc->name);
426 WARN_ON(ubc->num_events > HBP_NUM);