2 * arch/sh/kernel/hw_breakpoint.c
4 * Unified kernel/user-space hardware breakpoint facility for the on-chip UBC.
6 * Copyright (C) 2009 - 2010 Paul Mundt
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
12 #include <linux/init.h>
13 #include <linux/perf_event.h>
14 #include <linux/hw_breakpoint.h>
15 #include <linux/percpu.h>
16 #include <linux/kallsyms.h>
17 #include <linux/notifier.h>
18 #include <linux/kprobes.h>
19 #include <linux/kdebug.h>
21 #include <linux/clk.h>
22 #include <asm/hw_breakpoint.h>
23 #include <asm/mmu_context.h>
24 #include <asm/ptrace.h>
25 #include <asm/traps.h>
28 * Stores the breakpoints currently in use on each breakpoint address
29 * register for each cpus
31 static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
34 * A dummy placeholder for early accesses until the CPUs get a chance to
35 * register their UBCs later in the boot process.
37 static struct sh_ubc ubc_dummy = { .num_events = 0 };
39 static struct sh_ubc *sh_ubc __read_mostly = &ubc_dummy;
42 * Install a perf counter breakpoint.
44 * We seek a free UBC channel and use it for this breakpoint.
46 * Atomic: we hold the counter->ctx->lock and we only handle variables
47 * and registers local to this cpu.
49 int arch_install_hw_breakpoint(struct perf_event *bp)
51 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
54 for (i = 0; i < sh_ubc->num_events; i++) {
55 struct perf_event **slot = this_cpu_ptr(&bp_per_reg[i]);
63 if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
66 clk_enable(sh_ubc->clk);
67 sh_ubc->enable(info, i);
73 * Uninstall the breakpoint contained in the given counter.
75 * First we search the debug address register it uses and then we disable
78 * Atomic: we hold the counter->ctx->lock and we only handle variables
79 * and registers local to this cpu.
81 void arch_uninstall_hw_breakpoint(struct perf_event *bp)
83 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
86 for (i = 0; i < sh_ubc->num_events; i++) {
87 struct perf_event **slot = this_cpu_ptr(&bp_per_reg[i]);
95 if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
98 sh_ubc->disable(info, i);
99 clk_disable(sh_ubc->clk);
102 static int get_hbp_len(u16 hbp_len)
104 unsigned int len_in_bytes = 0;
107 case SH_BREAKPOINT_LEN_1:
110 case SH_BREAKPOINT_LEN_2:
113 case SH_BREAKPOINT_LEN_4:
116 case SH_BREAKPOINT_LEN_8:
124 * Check for virtual address in kernel space.
126 int arch_check_bp_in_kernelspace(struct perf_event *bp)
130 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
133 len = get_hbp_len(info->len);
135 return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
138 int arch_bp_generic_fields(int sh_len, int sh_type,
139 int *gen_len, int *gen_type)
143 case SH_BREAKPOINT_LEN_1:
144 *gen_len = HW_BREAKPOINT_LEN_1;
146 case SH_BREAKPOINT_LEN_2:
147 *gen_len = HW_BREAKPOINT_LEN_2;
149 case SH_BREAKPOINT_LEN_4:
150 *gen_len = HW_BREAKPOINT_LEN_4;
152 case SH_BREAKPOINT_LEN_8:
153 *gen_len = HW_BREAKPOINT_LEN_8;
161 case SH_BREAKPOINT_READ:
162 *gen_type = HW_BREAKPOINT_R;
163 case SH_BREAKPOINT_WRITE:
164 *gen_type = HW_BREAKPOINT_W;
166 case SH_BREAKPOINT_RW:
167 *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
176 static int arch_build_bp_info(struct perf_event *bp)
178 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
180 info->address = bp->attr.bp_addr;
183 switch (bp->attr.bp_len) {
184 case HW_BREAKPOINT_LEN_1:
185 info->len = SH_BREAKPOINT_LEN_1;
187 case HW_BREAKPOINT_LEN_2:
188 info->len = SH_BREAKPOINT_LEN_2;
190 case HW_BREAKPOINT_LEN_4:
191 info->len = SH_BREAKPOINT_LEN_4;
193 case HW_BREAKPOINT_LEN_8:
194 info->len = SH_BREAKPOINT_LEN_8;
201 switch (bp->attr.bp_type) {
202 case HW_BREAKPOINT_R:
203 info->type = SH_BREAKPOINT_READ;
205 case HW_BREAKPOINT_W:
206 info->type = SH_BREAKPOINT_WRITE;
208 case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
209 info->type = SH_BREAKPOINT_RW;
219 * Validate the arch-specific HW Breakpoint register settings
221 int arch_validate_hwbkpt_settings(struct perf_event *bp)
223 struct arch_hw_breakpoint *info = counter_arch_bp(bp);
227 ret = arch_build_bp_info(bp);
234 case SH_BREAKPOINT_LEN_1:
237 case SH_BREAKPOINT_LEN_2:
240 case SH_BREAKPOINT_LEN_4:
243 case SH_BREAKPOINT_LEN_8:
251 * For kernel-addresses, either the address or symbol name can be
255 info->address = (unsigned long)kallsyms_lookup_name(info->name);
258 * Check that the low-order bits of the address are appropriate
259 * for the alignment implied by len.
261 if (info->address & align)
268 * Release the user breakpoints used by ptrace
270 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
273 struct thread_struct *t = &tsk->thread;
275 for (i = 0; i < sh_ubc->num_events; i++) {
276 unregister_hw_breakpoint(t->ptrace_bps[i]);
277 t->ptrace_bps[i] = NULL;
281 static int __kprobes hw_breakpoint_handler(struct die_args *args)
283 int cpu, i, rc = NOTIFY_STOP;
284 struct perf_event *bp;
285 unsigned int cmf, resume_mask;
288 * Do an early return if none of the channels triggered.
290 cmf = sh_ubc->triggered_mask();
295 * By default, resume all of the active channels.
297 resume_mask = sh_ubc->active_mask();
300 * Disable breakpoints during exception handling.
302 sh_ubc->disable_all();
305 for (i = 0; i < sh_ubc->num_events; i++) {
306 unsigned long event_mask = (1 << i);
308 if (likely(!(cmf & event_mask)))
312 * The counter may be concurrently released but that can only
313 * occur from a call_rcu() path. We can then safely fetch
314 * the breakpoint, use its callback, touch its counter
315 * while we are in an rcu_read_lock() path.
319 bp = per_cpu(bp_per_reg[i], cpu);
324 * Reset the condition match flag to denote completion of
325 * exception handling.
327 sh_ubc->clear_triggered_mask(event_mask);
330 * bp can be NULL due to concurrent perf counter
339 * Don't restore the channel if the breakpoint is from
340 * ptrace, as it always operates in one-shot mode.
342 if (bp->overflow_handler == ptrace_triggered)
343 resume_mask &= ~(1 << i);
345 perf_bp_event(bp, args->regs);
347 /* Deliver the signal to userspace */
348 if (!arch_check_bp_in_kernelspace(bp)) {
351 info.si_signo = args->signr;
352 info.si_errno = notifier_to_errno(rc);
353 info.si_code = TRAP_HWBKPT;
355 force_sig_info(args->signr, &info, current);
364 sh_ubc->enable_all(resume_mask);
371 BUILD_TRAP_HANDLER(breakpoint)
373 unsigned long ex = lookup_exception_vector();
376 notify_die(DIE_BREAKPOINT, "breakpoint", regs, 0, ex, SIGTRAP);
380 * Handle debug exception notifications.
382 int __kprobes hw_breakpoint_exceptions_notify(struct notifier_block *unused,
383 unsigned long val, void *data)
385 struct die_args *args = data;
387 if (val != DIE_BREAKPOINT)
391 * If the breakpoint hasn't been triggered by the UBC, it's
392 * probably from a debugger, so don't do anything more here.
394 * This also permits the UBC interface clock to remain off for
395 * non-UBC breakpoints, as we don't need to check the triggered
396 * or active channel masks.
398 if (args->trapnr != sh_ubc->trap_nr)
401 return hw_breakpoint_handler(data);
404 void hw_breakpoint_pmu_read(struct perf_event *bp)
409 int register_sh_ubc(struct sh_ubc *ubc)
411 /* Bail if it's already assigned */
412 if (sh_ubc != &ubc_dummy)
416 pr_info("HW Breakpoints: %s UBC support registered\n", ubc->name);
418 WARN_ON(ubc->num_events > HBP_NUM);