2 * 'traps.c' handles hardware traps and faults after we have saved some
5 * SuperH version: Copyright (C) 1999 Niibe Yutaka
6 * Copyright (C) 2000 Philipp Rumpf
7 * Copyright (C) 2000 David Howells
8 * Copyright (C) 2002 - 2007 Paul Mundt
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
14 #include <linux/kernel.h>
15 #include <linux/ptrace.h>
16 #include <linux/hardirq.h>
17 #include <linux/init.h>
18 #include <linux/spinlock.h>
19 #include <linux/module.h>
20 #include <linux/kallsyms.h>
22 #include <linux/bug.h>
23 #include <linux/debug_locks.h>
24 #include <linux/kdebug.h>
25 #include <linux/kexec.h>
26 #include <linux/limits.h>
27 #include <linux/proc_fs.h>
28 #include <asm/system.h>
29 #include <asm/uaccess.h>
31 #include <asm/kprobes.h>
34 # define TRAP_RESERVED_INST 4
35 # define TRAP_ILLEGAL_SLOT_INST 6
36 # define TRAP_ADDRESS_ERROR 9
37 # ifdef CONFIG_CPU_SH2A
39 # define TRAP_FPU_ERROR 13
40 # define TRAP_DIVZERO_ERROR 17
41 # define TRAP_DIVOVF_ERROR 18
44 #define TRAP_RESERVED_INST 12
45 #define TRAP_ILLEGAL_SLOT_INST 13
48 static unsigned long se_user;
49 static unsigned long se_sys;
50 static unsigned long se_skipped;
51 static unsigned long se_half;
52 static unsigned long se_word;
53 static unsigned long se_dword;
54 static unsigned long se_multi;
55 /* bitfield: 1: warn 2: fixup 4: signal -> combinations 2|4 && 1|2|4 are not
57 static int se_usermode = 3;
58 /* 0: no warning 1: print a warning message */
59 static int se_kernmode_warn = 1;
62 static const char *se_usermode_action[] = {
72 proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
78 p += sprintf(p, "User:\t\t%lu\n", se_user);
79 p += sprintf(p, "System:\t\t%lu\n", se_sys);
80 p += sprintf(p, "Skipped:\t%lu\n", se_skipped);
81 p += sprintf(p, "Half:\t\t%lu\n", se_half);
82 p += sprintf(p, "Word:\t\t%lu\n", se_word);
83 p += sprintf(p, "DWord:\t\t%lu\n", se_dword);
84 p += sprintf(p, "Multi:\t\t%lu\n", se_multi);
85 p += sprintf(p, "User faults:\t%i (%s)\n", se_usermode,
86 se_usermode_action[se_usermode]);
87 p += sprintf(p, "Kernel faults:\t%i (fixup%s)\n", se_kernmode_warn,
88 se_kernmode_warn ? "+warn" : "");
90 len = (p - page) - off;
94 *eof = (len <= count) ? 1 : 0;
100 static int proc_alignment_write(struct file *file, const char __user *buffer,
101 unsigned long count, void *data)
106 if (get_user(mode, buffer))
108 if (mode >= '0' && mode <= '5')
109 se_usermode = mode - '0';
114 static int proc_alignment_kern_write(struct file *file, const char __user *buffer,
115 unsigned long count, void *data)
120 if (get_user(mode, buffer))
122 if (mode >= '0' && mode <= '1')
123 se_kernmode_warn = mode - '0';
129 static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
134 printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
136 for (p = bottom & ~31; p < top; ) {
137 printk("%04lx: ", p & 0xffff);
139 for (i = 0; i < 8; i++, p += 4) {
142 if (p < bottom || p >= top)
145 if (__get_user(val, (unsigned int __user *)p)) {
149 printk("%08x ", val);
156 static DEFINE_SPINLOCK(die_lock);
158 void die(const char * str, struct pt_regs * regs, long err)
160 static int die_counter;
165 spin_lock_irq(&die_lock);
168 printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
173 printk("Process: %s (pid: %d, stack limit = %p)\n", current->comm,
174 task_pid_nr(current), task_stack_page(current) + 1);
176 if (!user_mode(regs) || in_interrupt())
177 dump_mem("Stack: ", regs->regs[15], THREAD_SIZE +
178 (unsigned long)task_stack_page(current));
180 notify_die(DIE_OOPS, str, regs, err, 255, SIGSEGV);
183 add_taint(TAINT_DIE);
184 spin_unlock_irq(&die_lock);
186 if (kexec_should_crash(current))
190 panic("Fatal exception in interrupt");
193 panic("Fatal exception");
199 static inline void die_if_kernel(const char *str, struct pt_regs *regs,
202 if (!user_mode(regs))
207 * try and fix up kernelspace address errors
208 * - userspace errors just cause EFAULT to be returned, resulting in SEGV
209 * - kernel/userspace interfaces cause a jump to an appropriate handler
210 * - other kernel errors are bad
212 static void die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
214 if (!user_mode(regs)) {
215 const struct exception_table_entry *fixup;
216 fixup = search_exception_tables(regs->pc);
218 regs->pc = fixup->fixup;
226 static inline void sign_extend(unsigned int count, unsigned char *dst)
228 #ifdef __LITTLE_ENDIAN__
229 if ((count == 1) && dst[0] & 0x80) {
234 if ((count == 2) && dst[1] & 0x80) {
239 if ((count == 1) && dst[3] & 0x80) {
244 if ((count == 2) && dst[2] & 0x80) {
251 static struct mem_access user_mem_access = {
257 * handle an instruction that does an unaligned memory access by emulating the
259 * - note that PC _may not_ point to the faulting instruction
260 * (if that instruction is in a branch delay slot)
261 * - return 0 if emulation okay, -EFAULT on existential error
263 static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs,
264 struct mem_access *ma)
266 int ret, index, count;
267 unsigned long *rm, *rn;
268 unsigned char *src, *dst;
269 unsigned char __user *srcu, *dstu;
271 index = (instruction>>8)&15; /* 0x0F00 */
272 rn = ®s->regs[index];
274 index = (instruction>>4)&15; /* 0x00F0 */
275 rm = ®s->regs[index];
277 count = 1<<(instruction&3);
280 case 1: se_half += 1; break;
281 case 2: se_word += 1; break;
282 case 4: se_dword += 1; break;
283 case 8: se_multi += 1; break; /* ??? */
287 switch (instruction>>12) {
288 case 0: /* mov.[bwl] to/from memory via r0+rn */
289 if (instruction & 8) {
291 srcu = (unsigned char __user *)*rm;
292 srcu += regs->regs[0];
293 dst = (unsigned char *)rn;
294 *(unsigned long *)dst = 0;
296 #if !defined(__LITTLE_ENDIAN__)
299 if (ma->from(dst, srcu, count))
302 sign_extend(count, dst);
305 src = (unsigned char *)rm;
306 #if !defined(__LITTLE_ENDIAN__)
309 dstu = (unsigned char __user *)*rn;
310 dstu += regs->regs[0];
312 if (ma->to(dstu, src, count))
318 case 1: /* mov.l Rm,@(disp,Rn) */
319 src = (unsigned char*) rm;
320 dstu = (unsigned char __user *)*rn;
321 dstu += (instruction&0x000F)<<2;
323 if (ma->to(dstu, src, 4))
328 case 2: /* mov.[bwl] to memory, possibly with pre-decrement */
331 src = (unsigned char*) rm;
332 dstu = (unsigned char __user *)*rn;
333 #if !defined(__LITTLE_ENDIAN__)
336 if (ma->to(dstu, src, count))
341 case 5: /* mov.l @(disp,Rm),Rn */
342 srcu = (unsigned char __user *)*rm;
343 srcu += (instruction & 0x000F) << 2;
344 dst = (unsigned char *)rn;
345 *(unsigned long *)dst = 0;
347 if (ma->from(dst, srcu, 4))
352 case 6: /* mov.[bwl] from memory, possibly with post-increment */
353 srcu = (unsigned char __user *)*rm;
356 dst = (unsigned char*) rn;
357 *(unsigned long*)dst = 0;
359 #if !defined(__LITTLE_ENDIAN__)
362 if (ma->from(dst, srcu, count))
364 sign_extend(count, dst);
369 switch ((instruction&0xFF00)>>8) {
370 case 0x81: /* mov.w R0,@(disp,Rn) */
371 src = (unsigned char *) ®s->regs[0];
372 #if !defined(__LITTLE_ENDIAN__)
375 dstu = (unsigned char __user *)*rm; /* called Rn in the spec */
376 dstu += (instruction & 0x000F) << 1;
378 if (ma->to(dstu, src, 2))
383 case 0x85: /* mov.w @(disp,Rm),R0 */
384 srcu = (unsigned char __user *)*rm;
385 srcu += (instruction & 0x000F) << 1;
386 dst = (unsigned char *) ®s->regs[0];
387 *(unsigned long *)dst = 0;
389 #if !defined(__LITTLE_ENDIAN__)
392 if (ma->from(dst, srcu, 2))
403 /* Argh. Address not only misaligned but also non-existent.
404 * Raise an EFAULT and see if it's trapped
406 die_if_no_fixup("Fault in unaligned fixup", regs, 0);
411 * emulate the instruction in the delay slot
412 * - fetches the instruction from PC+2
414 static inline int handle_delayslot(struct pt_regs *regs,
415 insn_size_t old_instruction,
416 struct mem_access *ma)
418 insn_size_t instruction;
419 void __user *addr = (void __user *)(regs->pc +
420 instruction_size(old_instruction));
422 if (copy_from_user(&instruction, addr, sizeof(instruction))) {
423 /* the instruction-fetch faulted */
428 die("delay-slot-insn faulting in handle_unaligned_delayslot",
432 return handle_unaligned_ins(instruction, regs, ma);
436 * handle an instruction that does an unaligned memory access
437 * - have to be careful of branch delay-slot instructions that fault
439 * - if the branch would be taken PC points to the branch
440 * - if the branch would not be taken, PC points to delay-slot
442 * - PC always points to delayed branch
443 * - return 0 if handled, -EFAULT if failed (may not return if in kernel)
446 /* Macros to determine offset from current PC for branch instructions */
447 /* Explicit type coercion is used to force sign extension where needed */
448 #define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4)
449 #define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4)
451 int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
452 struct mem_access *ma)
457 index = (instruction>>8)&15; /* 0x0F00 */
458 rm = regs->regs[index];
460 /* shout about fixups */
461 if (printk_ratelimit())
462 printk(KERN_NOTICE "Fixing up unaligned %s access "
463 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
464 user_mode(regs) ? "userspace" : "kernel",
465 current->comm, task_pid_nr(current),
466 (void *)regs->pc, instruction);
469 switch (instruction&0xF000) {
471 if (instruction==0x000B) {
473 ret = handle_delayslot(regs, instruction, ma);
477 else if ((instruction&0x00FF)==0x0023) {
479 ret = handle_delayslot(regs, instruction, ma);
483 else if ((instruction&0x00FF)==0x0003) {
485 ret = handle_delayslot(regs, instruction, ma);
487 regs->pr = regs->pc + 4;
492 /* mov.[bwl] to/from memory via r0+rn */
497 case 0x1000: /* mov.l Rm,@(disp,Rn) */
500 case 0x2000: /* mov.[bwl] to memory, possibly with pre-decrement */
504 if ((instruction&0x00FF)==0x002B) {
506 ret = handle_delayslot(regs, instruction, ma);
510 else if ((instruction&0x00FF)==0x000B) {
512 ret = handle_delayslot(regs, instruction, ma);
514 regs->pr = regs->pc + 4;
519 /* mov.[bwl] to/from memory via r0+rn */
524 case 0x5000: /* mov.l @(disp,Rm),Rn */
527 case 0x6000: /* mov.[bwl] from memory, possibly with post-increment */
530 case 0x8000: /* bf lab, bf/s lab, bt lab, bt/s lab */
531 switch (instruction&0x0F00) {
532 case 0x0100: /* mov.w R0,@(disp,Rm) */
534 case 0x0500: /* mov.w @(disp,Rm),R0 */
536 case 0x0B00: /* bf lab - no delayslot*/
538 case 0x0F00: /* bf/s lab */
539 ret = handle_delayslot(regs, instruction, ma);
541 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
542 if ((regs->sr & 0x00000001) != 0)
543 regs->pc += 4; /* next after slot */
546 regs->pc += SH_PC_8BIT_OFFSET(instruction);
549 case 0x0900: /* bt lab - no delayslot */
551 case 0x0D00: /* bt/s lab */
552 ret = handle_delayslot(regs, instruction, ma);
554 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
555 if ((regs->sr & 0x00000001) == 0)
556 regs->pc += 4; /* next after slot */
559 regs->pc += SH_PC_8BIT_OFFSET(instruction);
565 case 0xA000: /* bra label */
566 ret = handle_delayslot(regs, instruction, ma);
568 regs->pc += SH_PC_12BIT_OFFSET(instruction);
571 case 0xB000: /* bsr label */
572 ret = handle_delayslot(regs, instruction, ma);
574 regs->pr = regs->pc + 4;
575 regs->pc += SH_PC_12BIT_OFFSET(instruction);
581 /* handle non-delay-slot instruction */
583 ret = handle_unaligned_ins(instruction, regs, ma);
585 regs->pc += instruction_size(instruction);
590 * Handle various address error exceptions:
591 * - instruction address error:
593 * PC >= 0x80000000 in user mode
594 * - data address error (read and write)
595 * misaligned data access
596 * access to >= 0x80000000 is user mode
597 * Unfortuntaly we can't distinguish between instruction address error
598 * and data address errors caused by read accesses.
600 asmlinkage void do_address_error(struct pt_regs *regs,
601 unsigned long writeaccess,
602 unsigned long address)
604 unsigned long error_code = 0;
607 insn_size_t instruction;
610 /* Intentional ifdef */
611 #ifdef CONFIG_CPU_HAS_SR_RB
612 error_code = lookup_exception_vector();
617 if (user_mode(regs)) {
618 int si_code = BUS_ADRERR;
624 /* shout about userspace fixups */
626 printk(KERN_NOTICE "Unaligned userspace access "
627 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
628 current->comm, current->pid, (void *)regs->pc,
638 trace_mark(kernel_arch_trap_exit, MARK_NOARGS);
643 /* bad PC is not something we can fix */
645 si_code = BUS_ADRALN;
650 if (copy_from_user(&instruction, (void __user *)(regs->pc),
651 sizeof(instruction))) {
652 /* Argh. Fault on the instruction itself.
653 This should never happen non-SMP
659 tmp = handle_unaligned_access(instruction, regs,
666 printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned "
667 "access (PC %lx PR %lx)\n", current->comm, regs->pc,
670 info.si_signo = SIGBUS;
672 info.si_code = si_code;
673 info.si_addr = (void __user *)address;
674 force_sig_info(SIGBUS, &info, current);
678 if (se_kernmode_warn)
679 printk(KERN_NOTICE "Unaligned kernel access "
680 "on behalf of \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
681 current->comm, current->pid, (void *)regs->pc,
685 die("unaligned program counter", regs, error_code);
688 if (copy_from_user(&instruction, (void __user *)(regs->pc),
689 sizeof(instruction))) {
690 /* Argh. Fault on the instruction itself.
691 This should never happen non-SMP
694 die("insn faulting in do_address_error", regs, 0);
697 handle_unaligned_access(instruction, regs, &user_mem_access);
704 * SH-DSP support gerg@snapgear.com.
706 int is_dsp_inst(struct pt_regs *regs)
708 unsigned short inst = 0;
711 * Safe guard if DSP mode is already enabled or we're lacking
712 * the DSP altogether.
714 if (!(current_cpu_data.flags & CPU_HAS_DSP) || (regs->sr & SR_DSP))
717 get_user(inst, ((unsigned short *) regs->pc));
721 /* Check for any type of DSP or support instruction */
722 if ((inst == 0xf000) || (inst == 0x4000))
728 #define is_dsp_inst(regs) (0)
729 #endif /* CONFIG_SH_DSP */
731 #ifdef CONFIG_CPU_SH2A
732 asmlinkage void do_divide_error(unsigned long r4, unsigned long r5,
733 unsigned long r6, unsigned long r7,
734 struct pt_regs __regs)
739 case TRAP_DIVZERO_ERROR:
740 info.si_code = FPE_INTDIV;
742 case TRAP_DIVOVF_ERROR:
743 info.si_code = FPE_INTOVF;
747 force_sig_info(SIGFPE, &info, current);
751 asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
752 unsigned long r6, unsigned long r7,
753 struct pt_regs __regs)
755 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
756 unsigned long error_code;
757 struct task_struct *tsk = current;
759 #ifdef CONFIG_SH_FPU_EMU
760 unsigned short inst = 0;
763 get_user(inst, (unsigned short*)regs->pc);
765 err = do_fpu_inst(inst, regs);
767 regs->pc += instruction_size(inst);
770 /* not a FPU inst. */
774 /* Check if it's a DSP instruction */
775 if (is_dsp_inst(regs)) {
776 /* Enable DSP mode, and restart instruction. */
779 tsk->thread.dsp_status.status |= SR_DSP;
784 error_code = lookup_exception_vector();
787 force_sig(SIGILL, tsk);
788 die_if_no_fixup("reserved instruction", regs, error_code);
791 #ifdef CONFIG_SH_FPU_EMU
792 static int emulate_branch(unsigned short inst, struct pt_regs *regs)
795 * bfs: 8fxx: PC+=d*2+4;
796 * bts: 8dxx: PC+=d*2+4;
797 * bra: axxx: PC+=D*2+4;
798 * bsr: bxxx: PC+=D*2+4 after PR=PC+4;
799 * braf:0x23: PC+=Rn*2+4;
800 * bsrf:0x03: PC+=Rn*2+4 after PR=PC+4;
802 * jsr: 4x0b: PC=Rn after PR=PC+4;
805 if (((inst & 0xf000) == 0xb000) || /* bsr */
806 ((inst & 0xf0ff) == 0x0003) || /* bsrf */
807 ((inst & 0xf0ff) == 0x400b)) /* jsr */
808 regs->pr = regs->pc + 4;
810 if ((inst & 0xfd00) == 0x8d00) { /* bfs, bts */
811 regs->pc += SH_PC_8BIT_OFFSET(inst);
815 if ((inst & 0xe000) == 0xa000) { /* bra, bsr */
816 regs->pc += SH_PC_12BIT_OFFSET(inst);
820 if ((inst & 0xf0df) == 0x0003) { /* braf, bsrf */
821 regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4;
825 if ((inst & 0xf0df) == 0x400b) { /* jmp, jsr */
826 regs->pc = regs->regs[(inst & 0x0f00) >> 8];
830 if ((inst & 0xffff) == 0x000b) { /* rts */
839 asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
840 unsigned long r6, unsigned long r7,
841 struct pt_regs __regs)
843 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
845 struct task_struct *tsk = current;
847 if (kprobe_handle_illslot(regs->pc) == 0)
850 #ifdef CONFIG_SH_FPU_EMU
851 get_user(inst, (unsigned short *)regs->pc + 1);
852 if (!do_fpu_inst(inst, regs)) {
853 get_user(inst, (unsigned short *)regs->pc);
854 if (!emulate_branch(inst, regs))
856 /* fault in branch.*/
858 /* not a FPU inst. */
861 inst = lookup_exception_vector();
864 force_sig(SIGILL, tsk);
865 die_if_no_fixup("illegal slot instruction", regs, inst);
868 asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
869 unsigned long r6, unsigned long r7,
870 struct pt_regs __regs)
872 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
875 ex = lookup_exception_vector();
876 die_if_kernel("exception", regs, ex);
879 #if defined(CONFIG_SH_STANDARD_BIOS)
880 void *gdb_vbr_vector;
882 static inline void __init gdb_vbr_init(void)
884 register unsigned long vbr;
887 * Read the old value of the VBR register to initialise
888 * the vector through which debug and BIOS traps are
889 * delegated by the Linux trap handler.
891 asm volatile("stc vbr, %0" : "=r" (vbr));
893 gdb_vbr_vector = (void *)(vbr + 0x100);
894 printk("Setting GDB trap vector to 0x%08lx\n",
895 (unsigned long)gdb_vbr_vector);
899 void __cpuinit per_cpu_trap_init(void)
901 extern void *vbr_base;
903 #ifdef CONFIG_SH_STANDARD_BIOS
904 if (raw_smp_processor_id() == 0)
908 /* NOTE: The VBR value should be at P1
909 (or P2, virtural "fixed" address space).
910 It's definitely should not in physical address. */
912 asm volatile("ldc %0, vbr"
918 void *set_exception_table_vec(unsigned int vec, void *handler)
920 extern void *exception_handling_table[];
923 old_handler = exception_handling_table[vec];
924 exception_handling_table[vec] = handler;
928 void __init trap_init(void)
930 set_exception_table_vec(TRAP_RESERVED_INST, do_reserved_inst);
931 set_exception_table_vec(TRAP_ILLEGAL_SLOT_INST, do_illegal_slot_inst);
933 #if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \
934 defined(CONFIG_SH_FPU_EMU)
936 * For SH-4 lacking an FPU, treat floating point instructions as
937 * reserved. They'll be handled in the math-emu case, or faulted on
940 set_exception_table_evt(0x800, do_reserved_inst);
941 set_exception_table_evt(0x820, do_illegal_slot_inst);
942 #elif defined(CONFIG_SH_FPU)
943 #ifdef CONFIG_CPU_SUBTYPE_SHX3
944 set_exception_table_evt(0xd80, fpu_state_restore_trap_handler);
945 set_exception_table_evt(0xda0, fpu_state_restore_trap_handler);
947 set_exception_table_evt(0x800, fpu_state_restore_trap_handler);
948 set_exception_table_evt(0x820, fpu_state_restore_trap_handler);
952 #ifdef CONFIG_CPU_SH2
953 set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_trap_handler);
955 #ifdef CONFIG_CPU_SH2A
956 set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error);
957 set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error);
959 set_exception_table_vec(TRAP_FPU_ERROR, fpu_error_trap_handler);
964 set_exception_table_vec(TRAP_UBC, break_point_trap);
967 /* Setup VBR for boot cpu */
971 void show_stack(struct task_struct *tsk, unsigned long *sp)
978 sp = (unsigned long *)current_stack_pointer;
980 sp = (unsigned long *)tsk->thread.sp;
982 stack = (unsigned long)sp;
983 dump_mem("Stack: ", stack, THREAD_SIZE +
984 (unsigned long)task_stack_page(tsk));
985 show_trace(tsk, sp, NULL);
988 void dump_stack(void)
990 show_stack(NULL, NULL);
992 EXPORT_SYMBOL(dump_stack);
994 #ifdef CONFIG_PROC_FS
996 * This needs to be done after sysctl_init, otherwise sys/ will be
997 * overwritten. Actually, this shouldn't be in sys/ at all since
998 * it isn't a sysctl, and it doesn't contain sysctl information.
999 * We now locate it in /proc/cpu/alignment instead.
1001 static int __init alignment_init(void)
1003 struct proc_dir_entry *dir, *res;
1005 dir = proc_mkdir("cpu", NULL);
1009 res = create_proc_entry("alignment", S_IWUSR | S_IRUGO, dir);
1013 res->read_proc = proc_alignment_read;
1014 res->write_proc = proc_alignment_write;
1016 res = create_proc_entry("kernel_alignment", S_IWUSR | S_IRUGO, dir);
1020 res->read_proc = proc_alignment_read;
1021 res->write_proc = proc_alignment_kern_write;
1026 fs_initcall(alignment_init);