1 #ifndef _SPARC_PGTABLE_H
2 #define _SPARC_PGTABLE_H
4 /* asm/pgtable.h: Defines and functions used to work
5 * with Sparc page tables.
7 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
8 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
11 #include <linux/const.h>
14 #include <asm-generic/4level-fixup.h>
16 #include <linux/spinlock.h>
17 #include <linux/swap.h>
18 #include <asm/types.h>
19 #include <asm/pgtsrmmu.h>
20 #include <asm/vaddrs.h>
21 #include <asm/oplib.h>
22 #include <asm/cpu_type.h>
25 struct vm_area_struct;
28 extern void load_mmu(void);
29 extern unsigned long calc_highpages(void);
31 #define pte_ERROR(e) __builtin_trap()
32 #define pmd_ERROR(e) __builtin_trap()
33 #define pgd_ERROR(e) __builtin_trap()
36 #define PMD_SIZE (1UL << PMD_SHIFT)
37 #define PMD_MASK (~(PMD_SIZE-1))
38 #define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK)
39 #define PGDIR_SHIFT SRMMU_PGDIR_SHIFT
40 #define PGDIR_SIZE SRMMU_PGDIR_SIZE
41 #define PGDIR_MASK SRMMU_PGDIR_MASK
42 #define PTRS_PER_PTE 1024
43 #define PTRS_PER_PMD SRMMU_PTRS_PER_PMD
44 #define PTRS_PER_PGD SRMMU_PTRS_PER_PGD
45 #define USER_PTRS_PER_PGD PAGE_OFFSET / SRMMU_PGDIR_SIZE
46 #define FIRST_USER_ADDRESS 0
47 #define PTE_SIZE (PTRS_PER_PTE*4)
49 #define PAGE_NONE SRMMU_PAGE_NONE
50 #define PAGE_SHARED SRMMU_PAGE_SHARED
51 #define PAGE_COPY SRMMU_PAGE_COPY
52 #define PAGE_READONLY SRMMU_PAGE_RDONLY
53 #define PAGE_KERNEL SRMMU_PAGE_KERNEL
55 /* Top-level page directory */
56 extern pgd_t swapper_pg_dir[1024];
58 extern void paging_init(void);
60 extern unsigned long ptr_in_current_pgd;
63 #define __P000 PAGE_NONE
64 #define __P001 PAGE_READONLY
65 #define __P010 PAGE_COPY
66 #define __P011 PAGE_COPY
67 #define __P100 PAGE_READONLY
68 #define __P101 PAGE_READONLY
69 #define __P110 PAGE_COPY
70 #define __P111 PAGE_COPY
72 #define __S000 PAGE_NONE
73 #define __S001 PAGE_READONLY
74 #define __S010 PAGE_SHARED
75 #define __S011 PAGE_SHARED
76 #define __S100 PAGE_READONLY
77 #define __S101 PAGE_READONLY
78 #define __S110 PAGE_SHARED
79 #define __S111 PAGE_SHARED
81 extern int num_contexts;
83 /* First physical page can be anywhere, the following is needed so that
84 * va-->pa and vice versa conversions work properly without performance
85 * hit for all __pa()/__va() operations.
87 extern unsigned long phys_base;
88 extern unsigned long pfn_base;
91 * BAD_PAGETABLE is used when we need a bogus page-table, while
92 * BAD_PAGE is used for a bogus page.
94 * ZERO_PAGE is a global shared page that is always zero: used
95 * for zero-mapped memory areas etc..
97 extern pte_t * __bad_pagetable(void);
98 extern pte_t __bad_page(void);
99 extern unsigned long empty_zero_page;
101 #define BAD_PAGETABLE __bad_pagetable()
102 #define BAD_PAGE __bad_page()
103 #define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page))
106 * In general all page table modifications should use the V8 atomic
107 * swap instruction. This insures the mmu and the cpu are in sync
108 * with respect to ref/mod bits in the page tables.
110 static inline unsigned long srmmu_swap(unsigned long *addr, unsigned long value)
112 __asm__ __volatile__("swap [%2], %0" : "=&r" (value) : "0" (value), "r" (addr));
116 /* Certain architectures need to do special things when pte's
117 * within a page table are directly modified. Thus, the following
118 * hook is made available.
121 static inline void set_pte(pte_t *ptep, pte_t pteval)
123 srmmu_swap((unsigned long *)ptep, pte_val(pteval));
126 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
128 static inline int srmmu_device_memory(unsigned long x)
130 return ((x & 0xF0000000) != 0);
133 static inline struct page *pmd_page(pmd_t pmd)
135 if (srmmu_device_memory(pmd_val(pmd)))
137 return pfn_to_page((pmd_val(pmd) & SRMMU_PTD_PMASK) >> (PAGE_SHIFT-4));
140 static inline unsigned long pgd_page_vaddr(pgd_t pgd)
142 if (srmmu_device_memory(pgd_val(pgd))) {
145 unsigned long v = pgd_val(pgd) & SRMMU_PTD_PMASK;
146 return (unsigned long)__nocache_va(v << 4);
150 static inline int pte_present(pte_t pte)
152 return ((pte_val(pte) & SRMMU_ET_MASK) == SRMMU_ET_PTE);
155 static inline int pte_none(pte_t pte)
157 return !pte_val(pte);
160 static inline void __pte_clear(pte_t *ptep)
162 set_pte(ptep, __pte(0));
165 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
170 static inline int pmd_bad(pmd_t pmd)
172 return (pmd_val(pmd) & SRMMU_ET_MASK) != SRMMU_ET_PTD;
175 static inline int pmd_present(pmd_t pmd)
177 return ((pmd_val(pmd) & SRMMU_ET_MASK) == SRMMU_ET_PTD);
180 static inline int pmd_none(pmd_t pmd)
182 return !pmd_val(pmd);
185 static inline void pmd_clear(pmd_t *pmdp)
188 for (i = 0; i < PTRS_PER_PTE/SRMMU_REAL_PTRS_PER_PTE; i++)
189 set_pte((pte_t *)&pmdp->pmdv[i], __pte(0));
192 static inline int pgd_none(pgd_t pgd)
194 return !(pgd_val(pgd) & 0xFFFFFFF);
197 static inline int pgd_bad(pgd_t pgd)
199 return (pgd_val(pgd) & SRMMU_ET_MASK) != SRMMU_ET_PTD;
202 static inline int pgd_present(pgd_t pgd)
204 return ((pgd_val(pgd) & SRMMU_ET_MASK) == SRMMU_ET_PTD);
207 static inline void pgd_clear(pgd_t *pgdp)
209 set_pte((pte_t *)pgdp, __pte(0));
213 * The following only work if pte_present() is true.
214 * Undefined behaviour if not..
216 static inline int pte_write(pte_t pte)
218 return pte_val(pte) & SRMMU_WRITE;
221 static inline int pte_dirty(pte_t pte)
223 return pte_val(pte) & SRMMU_DIRTY;
226 static inline int pte_young(pte_t pte)
228 return pte_val(pte) & SRMMU_REF;
232 * The following only work if pte_present() is not true.
234 static inline int pte_file(pte_t pte)
236 return pte_val(pte) & SRMMU_FILE;
239 static inline int pte_special(pte_t pte)
244 static inline pte_t pte_wrprotect(pte_t pte)
246 return __pte(pte_val(pte) & ~SRMMU_WRITE);
249 static inline pte_t pte_mkclean(pte_t pte)
251 return __pte(pte_val(pte) & ~SRMMU_DIRTY);
254 static inline pte_t pte_mkold(pte_t pte)
256 return __pte(pte_val(pte) & ~SRMMU_REF);
259 static inline pte_t pte_mkwrite(pte_t pte)
261 return __pte(pte_val(pte) | SRMMU_WRITE);
264 static inline pte_t pte_mkdirty(pte_t pte)
266 return __pte(pte_val(pte) | SRMMU_DIRTY);
269 static inline pte_t pte_mkyoung(pte_t pte)
271 return __pte(pte_val(pte) | SRMMU_REF);
274 #define pte_mkspecial(pte) (pte)
276 #define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot)
278 static inline unsigned long pte_pfn(pte_t pte)
280 if (srmmu_device_memory(pte_val(pte))) {
281 /* Just return something that will cause
282 * pfn_valid() to return false. This makes
283 * copy_one_pte() to just directly copy to
288 return (pte_val(pte) & SRMMU_PTE_PMASK) >> (PAGE_SHIFT-4);
291 #define pte_page(pte) pfn_to_page(pte_pfn(pte))
294 * Conversion functions: convert a page and protection to a page entry,
295 * and a page entry and page directory to the page they refer to.
297 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
299 return __pte((page_to_pfn(page) << (PAGE_SHIFT-4)) | pgprot_val(pgprot));
302 static inline pte_t mk_pte_phys(unsigned long page, pgprot_t pgprot)
304 return __pte(((page) >> 4) | pgprot_val(pgprot));
307 static inline pte_t mk_pte_io(unsigned long page, pgprot_t pgprot, int space)
309 return __pte(((page) >> 4) | (space << 28) | pgprot_val(pgprot));
312 #define pgprot_noncached pgprot_noncached
313 static inline pgprot_t pgprot_noncached(pgprot_t prot)
315 prot &= ~__pgprot(SRMMU_CACHE);
319 static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__;
320 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
322 return __pte((pte_val(pte) & SRMMU_CHG_MASK) |
323 pgprot_val(newprot));
326 #define pgd_index(address) ((address) >> PGDIR_SHIFT)
328 /* to find an entry in a page-table-directory */
329 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
331 /* to find an entry in a kernel page-table-directory */
332 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
334 /* Find an entry in the second-level page table.. */
335 static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)
337 return (pmd_t *) pgd_page_vaddr(*dir) +
338 ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
341 /* Find an entry in the third-level page table.. */
342 pte_t *pte_offset_kernel(pmd_t * dir, unsigned long address);
345 * This shortcut works on sun4m (and sun4d) because the nocache area is static.
347 #define pte_offset_map(d, a) pte_offset_kernel(d,a)
348 #define pte_unmap(pte) do{}while(0)
351 void mmu_info(struct seq_file *m);
353 /* Fault handler stuff... */
354 #define FAULT_CODE_PROT 0x1
355 #define FAULT_CODE_WRITE 0x2
356 #define FAULT_CODE_USER 0x4
358 #define update_mmu_cache(vma, address, ptep) do { } while (0)
360 void srmmu_mapiorange(unsigned int bus, unsigned long xpa,
361 unsigned long xva, unsigned int len);
362 void srmmu_unmapiorange(unsigned long virt_addr, unsigned int len);
364 /* Encode and de-code a swap entry */
365 static inline unsigned long __swp_type(swp_entry_t entry)
367 return (entry.val >> SRMMU_SWP_TYPE_SHIFT) & SRMMU_SWP_TYPE_MASK;
370 static inline unsigned long __swp_offset(swp_entry_t entry)
372 return (entry.val >> SRMMU_SWP_OFF_SHIFT) & SRMMU_SWP_OFF_MASK;
375 static inline swp_entry_t __swp_entry(unsigned long type, unsigned long offset)
377 return (swp_entry_t) {
378 (type & SRMMU_SWP_TYPE_MASK) << SRMMU_SWP_TYPE_SHIFT
379 | (offset & SRMMU_SWP_OFF_MASK) << SRMMU_SWP_OFF_SHIFT };
382 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
383 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
385 /* file-offset-in-pte helpers */
386 static inline unsigned long pte_to_pgoff(pte_t pte)
388 return pte_val(pte) >> SRMMU_PTE_FILE_SHIFT;
391 static inline pte_t pgoff_to_pte(unsigned long pgoff)
393 return __pte((pgoff << SRMMU_PTE_FILE_SHIFT) | SRMMU_FILE);
397 * This is made a constant because mm/fremap.c required a constant.
399 #define PTE_FILE_MAX_BITS 24
404 struct ctx_list *next;
405 struct ctx_list *prev;
406 unsigned int ctx_number;
407 struct mm_struct *ctx_mm;
410 extern struct ctx_list *ctx_list_pool; /* Dynamically allocated */
411 extern struct ctx_list ctx_free; /* Head of free list */
412 extern struct ctx_list ctx_used; /* Head of used contexts list */
414 #define NO_CONTEXT -1
416 static inline void remove_from_ctx_list(struct ctx_list *entry)
418 entry->next->prev = entry->prev;
419 entry->prev->next = entry->next;
422 static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry)
425 (entry->prev = head->prev)->next = entry;
428 #define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry)
429 #define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry)
431 static inline unsigned long
432 __get_phys (unsigned long addr)
434 switch (sparc_cpu_model){
437 return ((srmmu_get_pte (addr) & 0xffffff00) << 4);
444 __get_iospace (unsigned long addr)
446 switch (sparc_cpu_model){
449 return (srmmu_get_pte (addr) >> 28);
455 extern unsigned long *sparc_valid_addr_bitmap;
457 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
458 #define kern_addr_valid(addr) \
459 (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap))
462 * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
463 * its high 4 bits. These macros/functions put it there or get it from there.
465 #define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4)))
466 #define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4))
467 #define GET_PFN(pfn) (pfn & 0x0fffffffUL)
469 extern int remap_pfn_range(struct vm_area_struct *, unsigned long, unsigned long,
470 unsigned long, pgprot_t);
472 static inline int io_remap_pfn_range(struct vm_area_struct *vma,
473 unsigned long from, unsigned long pfn,
474 unsigned long size, pgprot_t prot)
476 unsigned long long offset, space, phys_base;
478 offset = ((unsigned long long) GET_PFN(pfn)) << PAGE_SHIFT;
479 space = GET_IOSPACE(pfn);
480 phys_base = offset | (space << 32ULL);
482 return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot);
485 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
486 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
488 int __changed = !pte_same(*(__ptep), __entry); \
490 set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \
491 flush_tlb_page(__vma, __address); \
496 #include <asm-generic/pgtable.h>
498 #endif /* !(__ASSEMBLY__) */
500 #define VMALLOC_START _AC(0xfe600000,UL)
501 #define VMALLOC_END _AC(0xffc00000,UL)
503 /* We provide our own get_unmapped_area to cope with VA holes for userland */
504 #define HAVE_ARCH_UNMAPPED_AREA
507 * No page table caches to initialise
509 #define pgtable_cache_init() do { } while (0)
511 #endif /* !(_SPARC_PGTABLE_H) */