1 /* pci_msi.c: Sparc64 MSI support common layer.
3 * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
5 #include <linux/kernel.h>
6 #include <linux/interrupt.h>
7 #include <linux/slab.h>
12 static irqreturn_t sparc64_msiq_interrupt(int irq, void *cookie)
14 struct sparc64_msiq_cookie *msiq_cookie = cookie;
15 struct pci_pbm_info *pbm = msiq_cookie->pbm;
16 unsigned long msiqid = msiq_cookie->msiqid;
17 const struct sparc64_msiq_ops *ops;
18 unsigned long orig_head, head;
23 err = ops->get_head(pbm, msiqid, &head);
24 if (unlikely(err < 0))
31 err = ops->dequeue_msi(pbm, msiqid, &head, &msi);
32 if (likely(err > 0)) {
35 irq = pbm->msi_irq_table[msi - pbm->msi_first];
36 generic_handle_irq(irq);
39 if (unlikely(err < 0))
45 if (likely(head != orig_head)) {
46 err = ops->set_head(pbm, msiqid, head);
47 if (unlikely(err < 0))
53 printk(KERN_EMERG "MSI: Get head on msiqid[%lu] gives error %d\n",
58 printk(KERN_EMERG "MSI: Dequeue head[%lu] from msiqid[%lu] "
64 printk(KERN_EMERG "MSI: Set head[%lu] on msiqid[%lu] "
73 static u32 pick_msiq(struct pci_pbm_info *pbm)
75 static DEFINE_SPINLOCK(rotor_lock);
79 spin_lock_irqsave(&rotor_lock, flags);
81 rotor = pbm->msiq_rotor;
82 ret = pbm->msiq_first + rotor;
84 if (++rotor >= pbm->msiq_num)
86 pbm->msiq_rotor = rotor;
88 spin_unlock_irqrestore(&rotor_lock, flags);
94 static int alloc_msi(struct pci_pbm_info *pbm)
98 for (i = 0; i < pbm->msi_num; i++) {
99 if (!test_and_set_bit(i, pbm->msi_bitmap))
100 return i + pbm->msi_first;
106 static void free_msi(struct pci_pbm_info *pbm, int msi_num)
108 msi_num -= pbm->msi_first;
109 clear_bit(msi_num, pbm->msi_bitmap);
112 static struct irq_chip msi_irq = {
114 .irq_mask = mask_msi_irq,
115 .irq_unmask = unmask_msi_irq,
116 .irq_enable = unmask_msi_irq,
117 .irq_disable = mask_msi_irq,
118 /* XXX affinity XXX */
121 static int sparc64_setup_msi_irq(unsigned int *irq_p,
122 struct pci_dev *pdev,
123 struct msi_desc *entry)
125 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
126 const struct sparc64_msiq_ops *ops = pbm->msi_ops;
131 *irq_p = irq_alloc(0, 0);
136 irq_set_chip_and_handler_name(*irq_p, &msi_irq, handle_simple_irq,
139 err = alloc_msi(pbm);
140 if (unlikely(err < 0))
145 msiqid = pick_msiq(pbm);
147 err = ops->msi_setup(pbm, msiqid, msi,
148 (entry->msi_attrib.is_64 ? 1 : 0));
152 pbm->msi_irq_table[msi - pbm->msi_first] = *irq_p;
154 if (entry->msi_attrib.is_64) {
155 msg.address_hi = pbm->msi64_start >> 32;
156 msg.address_lo = pbm->msi64_start & 0xffffffff;
159 msg.address_lo = pbm->msi32_start;
163 irq_set_msi_desc(*irq_p, entry);
164 write_msi_msg(*irq_p, &msg);
172 irq_set_chip(*irq_p, NULL);
180 static void sparc64_teardown_msi_irq(unsigned int irq,
181 struct pci_dev *pdev)
183 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
184 const struct sparc64_msiq_ops *ops = pbm->msi_ops;
185 unsigned int msi_num;
188 for (i = 0; i < pbm->msi_num; i++) {
189 if (pbm->msi_irq_table[i] == irq)
192 if (i >= pbm->msi_num) {
193 printk(KERN_ERR "%s: teardown: No MSI for irq %u\n",
198 msi_num = pbm->msi_first + i;
199 pbm->msi_irq_table[i] = ~0U;
201 err = ops->msi_teardown(pbm, msi_num);
203 printk(KERN_ERR "%s: teardown: ops->teardown() on MSI %u, "
204 "irq %u, gives error %d\n",
205 pbm->name, msi_num, irq, err);
209 free_msi(pbm, msi_num);
211 irq_set_chip(irq, NULL);
215 static int msi_bitmap_alloc(struct pci_pbm_info *pbm)
217 unsigned long size, bits_per_ulong;
219 bits_per_ulong = sizeof(unsigned long) * 8;
220 size = (pbm->msi_num + (bits_per_ulong - 1)) & ~(bits_per_ulong - 1);
222 BUG_ON(size % sizeof(unsigned long));
224 pbm->msi_bitmap = kzalloc(size, GFP_KERNEL);
225 if (!pbm->msi_bitmap)
231 static void msi_bitmap_free(struct pci_pbm_info *pbm)
233 kfree(pbm->msi_bitmap);
234 pbm->msi_bitmap = NULL;
237 static int msi_table_alloc(struct pci_pbm_info *pbm)
241 size = pbm->msiq_num * sizeof(struct sparc64_msiq_cookie);
242 pbm->msiq_irq_cookies = kzalloc(size, GFP_KERNEL);
243 if (!pbm->msiq_irq_cookies)
246 for (i = 0; i < pbm->msiq_num; i++) {
247 struct sparc64_msiq_cookie *p;
249 p = &pbm->msiq_irq_cookies[i];
251 p->msiqid = pbm->msiq_first + i;
254 size = pbm->msi_num * sizeof(unsigned int);
255 pbm->msi_irq_table = kzalloc(size, GFP_KERNEL);
256 if (!pbm->msi_irq_table) {
257 kfree(pbm->msiq_irq_cookies);
258 pbm->msiq_irq_cookies = NULL;
265 static void msi_table_free(struct pci_pbm_info *pbm)
267 kfree(pbm->msiq_irq_cookies);
268 pbm->msiq_irq_cookies = NULL;
270 kfree(pbm->msi_irq_table);
271 pbm->msi_irq_table = NULL;
274 static int bringup_one_msi_queue(struct pci_pbm_info *pbm,
275 const struct sparc64_msiq_ops *ops,
276 unsigned long msiqid,
277 unsigned long devino)
279 int irq = ops->msiq_build_irq(pbm, msiqid, devino);
285 nid = pbm->numa_node;
289 cpumask_copy(&numa_mask, cpumask_of_node(nid));
290 irq_set_affinity(irq, &numa_mask);
292 err = request_irq(irq, sparc64_msiq_interrupt, 0,
294 &pbm->msiq_irq_cookies[msiqid - pbm->msiq_first]);
301 static int sparc64_bringup_msi_queues(struct pci_pbm_info *pbm,
302 const struct sparc64_msiq_ops *ops)
306 for (i = 0; i < pbm->msiq_num; i++) {
307 unsigned long msiqid = i + pbm->msiq_first;
308 unsigned long devino = i + pbm->msiq_first_devino;
311 err = bringup_one_msi_queue(pbm, ops, msiqid, devino);
319 void sparc64_pbm_msi_init(struct pci_pbm_info *pbm,
320 const struct sparc64_msiq_ops *ops)
325 val = of_get_property(pbm->op->dev.of_node, "#msi-eqs", &len);
326 if (!val || len != 4)
328 pbm->msiq_num = *val;
330 const struct msiq_prop {
335 const struct msi_range_prop {
339 const struct addr_range_prop {
348 val = of_get_property(pbm->op->dev.of_node, "msi-eq-size", &len);
349 if (!val || len != 4)
352 pbm->msiq_ent_count = *val;
354 mqp = of_get_property(pbm->op->dev.of_node,
355 "msi-eq-to-devino", &len);
357 mqp = of_get_property(pbm->op->dev.of_node,
358 "msi-eq-devino", &len);
359 if (!mqp || len != sizeof(struct msiq_prop))
362 pbm->msiq_first = mqp->first_msiq;
363 pbm->msiq_first_devino = mqp->first_devino;
365 val = of_get_property(pbm->op->dev.of_node, "#msi", &len);
366 if (!val || len != 4)
370 mrng = of_get_property(pbm->op->dev.of_node, "msi-ranges", &len);
371 if (!mrng || len != sizeof(struct msi_range_prop))
373 pbm->msi_first = mrng->first_msi;
375 val = of_get_property(pbm->op->dev.of_node, "msi-data-mask", &len);
376 if (!val || len != 4)
378 pbm->msi_data_mask = *val;
380 val = of_get_property(pbm->op->dev.of_node, "msix-data-width", &len);
381 if (!val || len != 4)
383 pbm->msix_data_width = *val;
385 arng = of_get_property(pbm->op->dev.of_node, "msi-address-ranges",
387 if (!arng || len != sizeof(struct addr_range_prop))
389 pbm->msi32_start = ((u64)arng->msi32_high << 32) |
390 (u64) arng->msi32_low;
391 pbm->msi64_start = ((u64)arng->msi64_high << 32) |
392 (u64) arng->msi64_low;
393 pbm->msi32_len = arng->msi32_len;
394 pbm->msi64_len = arng->msi64_len;
396 if (msi_bitmap_alloc(pbm))
399 if (msi_table_alloc(pbm)) {
400 msi_bitmap_free(pbm);
404 if (ops->msiq_alloc(pbm)) {
406 msi_bitmap_free(pbm);
410 if (sparc64_bringup_msi_queues(pbm, ops)) {
413 msi_bitmap_free(pbm);
417 printk(KERN_INFO "%s: MSI Queue first[%u] num[%u] count[%u] "
420 pbm->msiq_first, pbm->msiq_num,
422 pbm->msiq_first_devino);
423 printk(KERN_INFO "%s: MSI first[%u] num[%u] mask[0x%x] "
426 pbm->msi_first, pbm->msi_num, pbm->msi_data_mask,
427 pbm->msix_data_width);
428 printk(KERN_INFO "%s: MSI addr32[0x%llx:0x%x] "
429 "addr64[0x%llx:0x%x]\n",
431 pbm->msi32_start, pbm->msi32_len,
432 pbm->msi64_start, pbm->msi64_len);
433 printk(KERN_INFO "%s: MSI queues at RA [%016lx]\n",
435 __pa(pbm->msi_queues));
438 pbm->setup_msi_irq = sparc64_setup_msi_irq;
439 pbm->teardown_msi_irq = sparc64_teardown_msi_irq;
445 printk(KERN_INFO "%s: No MSI support.\n", pbm->name);