1 /* pcr.c: Generic sparc64 performance counter infrastructure.
3 * Copyright (C) 2009 David S. Miller (davem@davemloft.net)
5 #include <linux/kernel.h>
6 #include <linux/module.h>
7 #include <linux/init.h>
10 #include <linux/perf_event.h>
16 /* This code is shared between various users of the performance
17 * counters. Users will be oprofile, pseudo-NMI watchdog, and the
18 * perf_event support layer.
21 #define PCR_SUN4U_ENABLE (PCR_PIC_PRIV | PCR_STRACE | PCR_UTRACE)
22 #define PCR_N2_ENABLE (PCR_PIC_PRIV | PCR_STRACE | PCR_UTRACE | \
24 (2 << PCR_N2_SL1_SHIFT) | \
25 (0xff << PCR_N2_MASK1_SHIFT))
28 unsigned int picl_shift;
30 /* Performance counter interrupts run unmasked at PIL level 15.
31 * Therefore we can't do things like wakeups and other work
32 * that expects IRQ disabling to be adhered to in locking etc.
34 * Therefore in such situations we defer the work by signalling
35 * a lower level cpu IRQ.
37 void deferred_pcr_work_irq(int irq, struct pt_regs *regs)
39 struct pt_regs *old_regs;
41 clear_softint(1 << PIL_DEFERRED_PCR_WORK);
43 old_regs = set_irq_regs(regs);
45 #ifdef CONFIG_PERF_EVENTS
46 perf_event_do_pending();
49 set_irq_regs(old_regs);
52 void set_perf_event_pending(void)
54 set_softint(1 << PIL_DEFERRED_PCR_WORK);
57 const struct pcr_ops *pcr_ops;
58 EXPORT_SYMBOL_GPL(pcr_ops);
60 static u64 direct_pcr_read(void)
68 static void direct_pcr_write(u64 val)
73 static const struct pcr_ops direct_pcr_ops = {
74 .read = direct_pcr_read,
75 .write = direct_pcr_write,
78 static void n2_pcr_write(u64 val)
82 ret = sun4v_niagara2_setperf(HV_N2_PERF_SPARC_CTL, val);
87 static const struct pcr_ops n2_pcr_ops = {
88 .read = direct_pcr_read,
89 .write = n2_pcr_write,
92 static unsigned long perf_hsvc_group;
93 static unsigned long perf_hsvc_major;
94 static unsigned long perf_hsvc_minor;
96 static int __init register_perf_hsvc(void)
98 if (tlb_type == hypervisor) {
99 switch (sun4v_chip_type) {
100 case SUN4V_CHIP_NIAGARA1:
101 perf_hsvc_group = HV_GRP_NIAG_PERF;
104 case SUN4V_CHIP_NIAGARA2:
105 perf_hsvc_group = HV_GRP_N2_CPU;
115 if (sun4v_hvapi_register(perf_hsvc_group,
118 printk("perfmon: Could not register hvapi.\n");
125 static void __init unregister_perf_hsvc(void)
127 if (tlb_type != hypervisor)
129 sun4v_hvapi_unregister(perf_hsvc_group);
132 int __init pcr_arch_init(void)
134 int err = register_perf_hsvc();
141 pcr_ops = &n2_pcr_ops;
142 pcr_enable = PCR_N2_ENABLE;
148 pcr_ops = &direct_pcr_ops;
149 pcr_enable = PCR_SUN4U_ENABLE;
153 /* UltraSPARC-I/II and derivatives lack a profile
154 * counter overflow interrupt so we can't make use of
155 * their hardware currently.
166 unregister_perf_hsvc();
170 arch_initcall(pcr_arch_init);