1 /* Sparc SS1000/SC2000 SMP support.
3 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
5 * Based on sun4m's smp.c, which is:
6 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
9 #include <linux/interrupt.h>
10 #include <linux/profile.h>
11 #include <linux/delay.h>
12 #include <linux/cpu.h>
16 #include <asm/tlbflush.h>
17 #include <asm/cacheflush.h>
22 #define IRQ_CROSS_CALL 15
24 static volatile int smp_processors_ready;
25 static int smp_highest_cpu;
27 static inline unsigned long sun4d_swap(volatile unsigned long *ptr, unsigned long val)
29 __asm__ __volatile__("swap [%1], %0\n\t" :
30 "=&r" (val), "=&r" (ptr) :
31 "0" (val), "1" (ptr));
35 static void smp4d_ipi_init(void);
36 static void smp_setup_percpu_timer(void);
38 static unsigned char cpu_leds[32];
40 static inline void show_leds(int cpuid)
43 __asm__ __volatile__ ("stba %0, [%1] %2" : :
44 "r" ((cpu_leds[cpuid] << 4) | cpu_leds[cpuid+1]),
45 "r" (ECSR_BASE(cpuid) | BB_LEDS),
49 void __cpuinit smp4d_callin(void)
51 int cpuid = hard_smp4d_processor_id();
54 /* Show we are alive */
55 cpu_leds[cpuid] = 0x6;
58 /* Enable level15 interrupt, disable level14 interrupt for now */
59 cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
61 local_flush_cache_all();
62 local_flush_tlb_all();
64 notify_cpu_starting(cpuid);
66 * Unblock the master CPU _only_ when the scheduler state
67 * of all secondary CPUs will be up-to-date, so after
68 * the SMP initialization the master will be just allowed
69 * to call the scheduler code.
71 /* Get our local ticker going. */
72 smp_setup_percpu_timer();
75 smp_store_cpu_info(cpuid);
76 local_flush_cache_all();
77 local_flush_tlb_all();
79 /* Allow master to continue. */
80 sun4d_swap((unsigned long *)&cpu_callin_map[cpuid], 1);
81 local_flush_cache_all();
82 local_flush_tlb_all();
84 while ((unsigned long)current_set[cpuid] < PAGE_OFFSET)
87 while (current_set[cpuid]->cpu != cpuid)
90 /* Fix idle thread fields. */
91 __asm__ __volatile__("ld [%0], %%g6\n\t"
92 : : "r" (¤t_set[cpuid])
93 : "memory" /* paranoid */);
95 cpu_leds[cpuid] = 0x9;
98 /* Attach to the address space of init_task. */
99 atomic_inc(&init_mm.mm_count);
100 current->active_mm = &init_mm;
102 local_flush_cache_all();
103 local_flush_tlb_all();
105 local_irq_enable(); /* We don't allow PIL 14 yet */
107 while (!cpumask_test_cpu(cpuid, &smp_commenced_mask))
110 spin_lock_irqsave(&sun4d_imsk_lock, flags);
111 cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
112 spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
113 set_cpu_online(cpuid, true);
118 * Cycle through the processors asking the PROM to start each one.
120 void __init smp4d_boot_cpus(void)
124 current_set[0] = NULL;
125 smp_setup_percpu_timer();
126 local_flush_cache_all();
129 int __cpuinit smp4d_boot_one_cpu(int i)
131 unsigned long *entry = &sun4d_cpu_startup;
132 struct task_struct *p;
136 cpu_find_by_instance(i, &cpu_node, NULL);
137 /* Cook up an idler for this guy. */
139 current_set[i] = task_thread_info(p);
142 * Initialize the contexts table
143 * Since the call to prom_startcpu() trashes the structure,
144 * we need to re-initialize it for each cpu
146 smp_penguin_ctable.which_io = 0;
147 smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
148 smp_penguin_ctable.reg_size = 0;
150 /* whirrr, whirrr, whirrrrrrrrr... */
151 printk(KERN_INFO "Starting CPU %d at %p\n", i, entry);
152 local_flush_cache_all();
153 prom_startcpu(cpu_node,
154 &smp_penguin_ctable, 0, (char *)entry);
156 printk(KERN_INFO "prom_startcpu returned :)\n");
158 /* wheee... it's going... */
159 for (timeout = 0; timeout < 10000; timeout++) {
160 if (cpu_callin_map[i])
165 if (!(cpu_callin_map[i])) {
166 printk(KERN_ERR "Processor %d is stuck.\n", i);
170 local_flush_cache_all();
174 void __init smp4d_smp_done(void)
179 /* setup cpu list for irq rotation */
182 for_each_online_cpu(i) {
184 prev = &cpu_data(i).next;
187 local_flush_cache_all();
189 /* Ok, they are spinning and ready to go. */
190 smp_processors_ready = 1;
191 sun4d_distribute_irqs();
194 /* Memory structure giving interrupt handler information about IPI generated */
195 struct sun4d_ipi_work {
201 static DEFINE_PER_CPU_SHARED_ALIGNED(struct sun4d_ipi_work, sun4d_ipi_work);
203 /* Initialize IPIs on the SUN4D SMP machine */
204 static void __init smp4d_ipi_init(void)
207 struct sun4d_ipi_work *work;
209 printk(KERN_INFO "smp4d: setup IPI at IRQ %d\n", SUN4D_IPI_IRQ);
211 for_each_possible_cpu(cpu) {
212 work = &per_cpu(sun4d_ipi_work, cpu);
213 work->single = work->msk = work->resched = 0;
217 void sun4d_ipi_interrupt(void)
219 struct sun4d_ipi_work *work = &__get_cpu_var(sun4d_ipi_work);
223 smp_call_function_single_interrupt();
227 smp_call_function_interrupt();
231 smp_resched_interrupt();
235 static void smp4d_ipi_single(int cpu)
237 struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
242 /* Generate IRQ on the CPU */
243 sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
246 static void smp4d_ipi_mask_one(int cpu)
248 struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
253 /* Generate IRQ on the CPU */
254 sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
257 static void smp4d_ipi_resched(int cpu)
259 struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
264 /* Generate IRQ on the CPU (any IRQ will cause resched) */
265 sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
268 static struct smp_funcall {
275 unsigned char processors_in[NR_CPUS]; /* Set when ipi entered. */
276 unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
277 } ccall_info __attribute__((aligned(8)));
279 static DEFINE_SPINLOCK(cross_call_lock);
281 /* Cross calls must be serialized, at least currently. */
282 static void smp4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
283 unsigned long arg2, unsigned long arg3,
286 if (smp_processors_ready) {
287 register int high = smp_highest_cpu;
290 spin_lock_irqsave(&cross_call_lock, flags);
294 * If you make changes here, make sure
295 * gcc generates proper code...
297 register smpfunc_t f asm("i0") = func;
298 register unsigned long a1 asm("i1") = arg1;
299 register unsigned long a2 asm("i2") = arg2;
300 register unsigned long a3 asm("i3") = arg3;
301 register unsigned long a4 asm("i4") = arg4;
302 register unsigned long a5 asm("i5") = 0;
304 __asm__ __volatile__(
306 "std %2, [%6 + 8]\n\t"
307 "std %4, [%6 + 16]\n\t" : :
308 "r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
309 "r" (&ccall_info.func));
312 /* Init receive/complete mapping, plus fire the IPI's off. */
316 cpumask_clear_cpu(smp_processor_id(), &mask);
317 cpumask_and(&mask, cpu_online_mask, &mask);
318 for (i = 0; i <= high; i++) {
319 if (cpumask_test_cpu(i, &mask)) {
320 ccall_info.processors_in[i] = 0;
321 ccall_info.processors_out[i] = 0;
322 sun4d_send_ipi(i, IRQ_CROSS_CALL);
332 if (!cpumask_test_cpu(i, &mask))
334 while (!ccall_info.processors_in[i])
336 } while (++i <= high);
340 if (!cpumask_test_cpu(i, &mask))
342 while (!ccall_info.processors_out[i])
344 } while (++i <= high);
347 spin_unlock_irqrestore(&cross_call_lock, flags);
351 /* Running cross calls. */
352 void smp4d_cross_call_irq(void)
354 int i = hard_smp4d_processor_id();
356 ccall_info.processors_in[i] = 1;
357 ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
358 ccall_info.arg4, ccall_info.arg5);
359 ccall_info.processors_out[i] = 1;
362 void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
364 struct pt_regs *old_regs;
365 int cpu = hard_smp4d_processor_id();
366 static int cpu_tick[NR_CPUS];
367 static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
369 old_regs = set_irq_regs(regs);
370 bw_get_prof_limit(cpu);
371 bw_clear_intr_mask(0, 1); /* INTR_TABLE[0] & 1 is Profile IRQ */
374 if (!(cpu_tick[cpu] & 15)) {
375 if (cpu_tick[cpu] == 0x60)
377 cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
381 profile_tick(CPU_PROFILING);
383 if (!--prof_counter(cpu)) {
384 int user = user_mode(regs);
387 update_process_times(user);
390 prof_counter(cpu) = prof_multiplier(cpu);
392 set_irq_regs(old_regs);
395 static void __cpuinit smp_setup_percpu_timer(void)
397 int cpu = hard_smp4d_processor_id();
399 prof_counter(cpu) = prof_multiplier(cpu) = 1;
400 load_profile_irq(cpu, lvl14_resolution);
403 void __init smp4d_blackbox_id(unsigned *addr)
405 int rd = *addr & 0x3e000000;
407 addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
408 addr[1] = 0x01000000; /* nop */
409 addr[2] = 0x01000000; /* nop */
412 void __init smp4d_blackbox_current(unsigned *addr)
414 int rd = *addr & 0x3e000000;
416 addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
417 addr[2] = 0x81282002 | rd | (rd >> 11); /* sll reg, 2, reg */
418 addr[4] = 0x01000000; /* nop */
421 void __init sun4d_init_smp(void)
425 /* Patch ipi15 trap table */
426 t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
428 /* And set btfixup... */
429 BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4d_blackbox_id);
430 BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);
431 BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);
432 BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);
433 BTFIXUPSET_CALL(smp_ipi_resched, smp4d_ipi_resched, BTFIXUPCALL_NORM);
434 BTFIXUPSET_CALL(smp_ipi_single, smp4d_ipi_single, BTFIXUPCALL_NORM);
435 BTFIXUPSET_CALL(smp_ipi_mask_one, smp4d_ipi_mask_one, BTFIXUPCALL_NORM);
437 for (i = 0; i < NR_CPUS; i++) {
438 ccall_info.processors_in[i] = 1;
439 ccall_info.processors_out[i] = 1;